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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Realtek RTL2832 DVB-T demodulator driver
0004  *
0005  * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
0006  * Copyright (C) 2012-2014 Antti Palosaari <crope@iki.fi>
0007  */
0008 
0009 #ifndef RTL2832_PRIV_H
0010 #define RTL2832_PRIV_H
0011 
0012 #include <linux/regmap.h>
0013 #include <linux/math64.h>
0014 #include <linux/bitops.h>
0015 
0016 #include <media/dvb_frontend.h>
0017 #include <media/dvb_math.h>
0018 #include "rtl2832.h"
0019 
0020 struct rtl2832_dev {
0021     struct rtl2832_platform_data *pdata;
0022     struct i2c_client *client;
0023     struct regmap_config regmap_config;
0024     struct regmap *regmap;
0025     struct i2c_mux_core *muxc;
0026     struct dvb_frontend fe;
0027     enum fe_status fe_status;
0028     u64 post_bit_error_prev; /* for old DVBv3 read_ber() calculation */
0029     u64 post_bit_error;
0030     u64 post_bit_count;
0031     bool sleeping;
0032     struct delayed_work i2c_gate_work;
0033     unsigned long filters; /* PID filter */
0034     bool slave_ts;
0035 };
0036 
0037 struct rtl2832_reg_entry {
0038     u16 start_address;
0039     u8 msb;
0040     u8 lsb;
0041 };
0042 
0043 struct rtl2832_reg_value {
0044     int reg;
0045     u32 value;
0046 };
0047 
0048 /* Demod register bit names */
0049 enum DVBT_REG_BIT_NAME {
0050     DVBT_SOFT_RST,
0051     DVBT_IIC_REPEAT,
0052     DVBT_TR_WAIT_MIN_8K,
0053     DVBT_RSD_BER_FAIL_VAL,
0054     DVBT_EN_BK_TRK,
0055     DVBT_REG_PI,
0056     DVBT_REG_PFREQ_1_0,
0057     DVBT_PD_DA8,
0058     DVBT_LOCK_TH,
0059     DVBT_BER_PASS_SCAL,
0060     DVBT_CE_FFSM_BYPASS,
0061     DVBT_ALPHAIIR_N,
0062     DVBT_ALPHAIIR_DIF,
0063     DVBT_EN_TRK_SPAN,
0064     DVBT_LOCK_TH_LEN,
0065     DVBT_CCI_THRE,
0066     DVBT_CCI_MON_SCAL,
0067     DVBT_CCI_M0,
0068     DVBT_CCI_M1,
0069     DVBT_CCI_M2,
0070     DVBT_CCI_M3,
0071     DVBT_SPEC_INIT_0,
0072     DVBT_SPEC_INIT_1,
0073     DVBT_SPEC_INIT_2,
0074     DVBT_AD_EN_REG,
0075     DVBT_AD_EN_REG1,
0076     DVBT_EN_BBIN,
0077     DVBT_MGD_THD0,
0078     DVBT_MGD_THD1,
0079     DVBT_MGD_THD2,
0080     DVBT_MGD_THD3,
0081     DVBT_MGD_THD4,
0082     DVBT_MGD_THD5,
0083     DVBT_MGD_THD6,
0084     DVBT_MGD_THD7,
0085     DVBT_EN_CACQ_NOTCH,
0086     DVBT_AD_AV_REF,
0087     DVBT_PIP_ON,
0088     DVBT_SCALE1_B92,
0089     DVBT_SCALE1_B93,
0090     DVBT_SCALE1_BA7,
0091     DVBT_SCALE1_BA9,
0092     DVBT_SCALE1_BAA,
0093     DVBT_SCALE1_BAB,
0094     DVBT_SCALE1_BAC,
0095     DVBT_SCALE1_BB0,
0096     DVBT_SCALE1_BB1,
0097     DVBT_KB_P1,
0098     DVBT_KB_P2,
0099     DVBT_KB_P3,
0100     DVBT_OPT_ADC_IQ,
0101     DVBT_AD_AVI,
0102     DVBT_AD_AVQ,
0103     DVBT_K1_CR_STEP12,
0104     DVBT_TRK_KS_P2,
0105     DVBT_TRK_KS_I2,
0106     DVBT_TR_THD_SET2,
0107     DVBT_TRK_KC_P2,
0108     DVBT_TRK_KC_I2,
0109     DVBT_CR_THD_SET2,
0110     DVBT_PSET_IFFREQ,
0111     DVBT_SPEC_INV,
0112     DVBT_BW_INDEX,
0113     DVBT_RSAMP_RATIO,
0114     DVBT_CFREQ_OFF_RATIO,
0115     DVBT_FSM_STAGE,
0116     DVBT_RX_CONSTEL,
0117     DVBT_RX_HIER,
0118     DVBT_RX_C_RATE_LP,
0119     DVBT_RX_C_RATE_HP,
0120     DVBT_GI_IDX,
0121     DVBT_FFT_MODE_IDX,
0122     DVBT_RSD_BER_EST,
0123     DVBT_CE_EST_EVM,
0124     DVBT_RF_AGC_VAL,
0125     DVBT_IF_AGC_VAL,
0126     DVBT_DAGC_VAL,
0127     DVBT_SFREQ_OFF,
0128     DVBT_CFREQ_OFF,
0129     DVBT_POLAR_RF_AGC,
0130     DVBT_POLAR_IF_AGC,
0131     DVBT_AAGC_HOLD,
0132     DVBT_EN_RF_AGC,
0133     DVBT_EN_IF_AGC,
0134     DVBT_IF_AGC_MIN,
0135     DVBT_IF_AGC_MAX,
0136     DVBT_RF_AGC_MIN,
0137     DVBT_RF_AGC_MAX,
0138     DVBT_IF_AGC_MAN,
0139     DVBT_IF_AGC_MAN_VAL,
0140     DVBT_RF_AGC_MAN,
0141     DVBT_RF_AGC_MAN_VAL,
0142     DVBT_DAGC_TRG_VAL,
0143     DVBT_AGC_TARG_VAL,
0144     DVBT_LOOP_GAIN_3_0,
0145     DVBT_LOOP_GAIN_4,
0146     DVBT_VTOP,
0147     DVBT_KRF,
0148     DVBT_AGC_TARG_VAL_0,
0149     DVBT_AGC_TARG_VAL_8_1,
0150     DVBT_AAGC_LOOP_GAIN,
0151     DVBT_LOOP_GAIN2_3_0,
0152     DVBT_LOOP_GAIN2_4,
0153     DVBT_LOOP_GAIN3,
0154     DVBT_VTOP1,
0155     DVBT_VTOP2,
0156     DVBT_VTOP3,
0157     DVBT_KRF1,
0158     DVBT_KRF2,
0159     DVBT_KRF3,
0160     DVBT_KRF4,
0161     DVBT_EN_GI_PGA,
0162     DVBT_THD_LOCK_UP,
0163     DVBT_THD_LOCK_DW,
0164     DVBT_THD_UP1,
0165     DVBT_THD_DW1,
0166     DVBT_INTER_CNT_LEN,
0167     DVBT_GI_PGA_STATE,
0168     DVBT_EN_AGC_PGA,
0169     DVBT_CKOUTPAR,
0170     DVBT_CKOUT_PWR,
0171     DVBT_SYNC_DUR,
0172     DVBT_ERR_DUR,
0173     DVBT_SYNC_LVL,
0174     DVBT_ERR_LVL,
0175     DVBT_VAL_LVL,
0176     DVBT_SERIAL,
0177     DVBT_SER_LSB,
0178     DVBT_CDIV_PH0,
0179     DVBT_CDIV_PH1,
0180     DVBT_MPEG_IO_OPT_2_2,
0181     DVBT_MPEG_IO_OPT_1_0,
0182     DVBT_CKOUTPAR_PIP,
0183     DVBT_CKOUT_PWR_PIP,
0184     DVBT_SYNC_LVL_PIP,
0185     DVBT_ERR_LVL_PIP,
0186     DVBT_VAL_LVL_PIP,
0187     DVBT_CKOUTPAR_PID,
0188     DVBT_CKOUT_PWR_PID,
0189     DVBT_SYNC_LVL_PID,
0190     DVBT_ERR_LVL_PID,
0191     DVBT_VAL_LVL_PID,
0192     DVBT_SM_PASS,
0193     DVBT_UPDATE_REG_2,
0194     DVBT_BTHD_P3,
0195     DVBT_BTHD_D3,
0196     DVBT_FUNC4_REG0,
0197     DVBT_FUNC4_REG1,
0198     DVBT_FUNC4_REG2,
0199     DVBT_FUNC4_REG3,
0200     DVBT_FUNC4_REG4,
0201     DVBT_FUNC4_REG5,
0202     DVBT_FUNC4_REG6,
0203     DVBT_FUNC4_REG7,
0204     DVBT_FUNC4_REG8,
0205     DVBT_FUNC4_REG9,
0206     DVBT_FUNC4_REG10,
0207     DVBT_FUNC5_REG0,
0208     DVBT_FUNC5_REG1,
0209     DVBT_FUNC5_REG2,
0210     DVBT_FUNC5_REG3,
0211     DVBT_FUNC5_REG4,
0212     DVBT_FUNC5_REG5,
0213     DVBT_FUNC5_REG6,
0214     DVBT_FUNC5_REG7,
0215     DVBT_FUNC5_REG8,
0216     DVBT_FUNC5_REG9,
0217     DVBT_FUNC5_REG10,
0218     DVBT_FUNC5_REG11,
0219     DVBT_FUNC5_REG12,
0220     DVBT_FUNC5_REG13,
0221     DVBT_FUNC5_REG14,
0222     DVBT_FUNC5_REG15,
0223     DVBT_FUNC5_REG16,
0224     DVBT_FUNC5_REG17,
0225     DVBT_FUNC5_REG18,
0226     DVBT_AD7_SETTING,
0227     DVBT_RSSI_R,
0228     DVBT_ACI_DET_IND,
0229     DVBT_REG_MON,
0230     DVBT_REG_MONSEL,
0231     DVBT_REG_GPE,
0232     DVBT_REG_GPO,
0233     DVBT_REG_4MSEL,
0234     DVBT_TEST_REG_1,
0235     DVBT_TEST_REG_2,
0236     DVBT_TEST_REG_3,
0237     DVBT_TEST_REG_4,
0238     DVBT_REG_BIT_NAME_ITEM_TERMINATOR,
0239 };
0240 
0241 static const struct rtl2832_reg_value rtl2832_tuner_init_fc2580[] = {
0242     {DVBT_DAGC_TRG_VAL,             0x39},
0243     {DVBT_AGC_TARG_VAL_0,            0x0},
0244     {DVBT_AGC_TARG_VAL_8_1,         0x5a},
0245     {DVBT_AAGC_LOOP_GAIN,           0x16},
0246     {DVBT_LOOP_GAIN2_3_0,            0x6},
0247     {DVBT_LOOP_GAIN2_4,              0x1},
0248     {DVBT_LOOP_GAIN3,               0x16},
0249     {DVBT_VTOP1,                    0x35},
0250     {DVBT_VTOP2,                    0x21},
0251     {DVBT_VTOP3,                    0x21},
0252     {DVBT_KRF1,                      0x0},
0253     {DVBT_KRF2,                     0x40},
0254     {DVBT_KRF3,                     0x10},
0255     {DVBT_KRF4,                     0x10},
0256     {DVBT_IF_AGC_MIN,               0x80},
0257     {DVBT_IF_AGC_MAX,               0x7f},
0258     {DVBT_RF_AGC_MIN,               0x9c},
0259     {DVBT_RF_AGC_MAX,               0x7f},
0260     {DVBT_POLAR_RF_AGC,              0x0},
0261     {DVBT_POLAR_IF_AGC,              0x0},
0262     {DVBT_AD7_SETTING,            0xe9f4},
0263 };
0264 
0265 static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = {
0266     {DVBT_DAGC_TRG_VAL,             0x39},
0267     {DVBT_AGC_TARG_VAL_0,            0x0},
0268     {DVBT_AGC_TARG_VAL_8_1,         0x5a},
0269     {DVBT_AAGC_LOOP_GAIN,           0x16},
0270     {DVBT_LOOP_GAIN2_3_0,            0x6},
0271     {DVBT_LOOP_GAIN2_4,              0x1},
0272     {DVBT_LOOP_GAIN3,               0x16},
0273     {DVBT_VTOP1,                    0x35},
0274     {DVBT_VTOP2,                    0x21},
0275     {DVBT_VTOP3,                    0x21},
0276     {DVBT_KRF1,                      0x0},
0277     {DVBT_KRF2,                     0x40},
0278     {DVBT_KRF3,                     0x10},
0279     {DVBT_KRF4,                     0x10},
0280     {DVBT_IF_AGC_MIN,               0x80},
0281     {DVBT_IF_AGC_MAX,               0x7f},
0282     {DVBT_RF_AGC_MIN,               0x9c},
0283     {DVBT_RF_AGC_MAX,               0x7f},
0284     {DVBT_POLAR_RF_AGC,              0x0},
0285     {DVBT_POLAR_IF_AGC,              0x0},
0286     {DVBT_AD7_SETTING,            0xe9f4},
0287     {DVBT_OPT_ADC_IQ,                0x1},
0288     {DVBT_AD_AVI,                    0x0},
0289     {DVBT_AD_AVQ,                    0x0},
0290     {DVBT_SPEC_INV,                  0x0},
0291 };
0292 
0293 static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
0294     {DVBT_DAGC_TRG_VAL,             0x5a},
0295     {DVBT_AGC_TARG_VAL_0,            0x0},
0296     {DVBT_AGC_TARG_VAL_8_1,         0x5a},
0297     {DVBT_AAGC_LOOP_GAIN,           0x16},
0298     {DVBT_LOOP_GAIN2_3_0,            0x6},
0299     {DVBT_LOOP_GAIN2_4,              0x1},
0300     {DVBT_LOOP_GAIN3,               0x16},
0301     {DVBT_VTOP1,                    0x35},
0302     {DVBT_VTOP2,                    0x21},
0303     {DVBT_VTOP3,                    0x21},
0304     {DVBT_KRF1,                      0x0},
0305     {DVBT_KRF2,                     0x40},
0306     {DVBT_KRF3,                     0x10},
0307     {DVBT_KRF4,                     0x10},
0308     {DVBT_IF_AGC_MIN,               0x80},
0309     {DVBT_IF_AGC_MAX,               0x7f},
0310     {DVBT_RF_AGC_MIN,               0x80},
0311     {DVBT_RF_AGC_MAX,               0x7f},
0312     {DVBT_POLAR_RF_AGC,              0x0},
0313     {DVBT_POLAR_IF_AGC,              0x0},
0314     {DVBT_AD7_SETTING,            0xe9bf},
0315     {DVBT_EN_GI_PGA,                 0x0},
0316     {DVBT_THD_LOCK_UP,               0x0},
0317     {DVBT_THD_LOCK_DW,               0x0},
0318     {DVBT_THD_UP1,                  0x11},
0319     {DVBT_THD_DW1,                  0xef},
0320     {DVBT_INTER_CNT_LEN,             0xc},
0321     {DVBT_GI_PGA_STATE,              0x0},
0322     {DVBT_EN_AGC_PGA,                0x1},
0323     {DVBT_IF_AGC_MAN,                0x0},
0324     {DVBT_SPEC_INV,                  0x0},
0325 };
0326 
0327 static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
0328     {DVBT_DAGC_TRG_VAL,             0x5a},
0329     {DVBT_AGC_TARG_VAL_0,            0x0},
0330     {DVBT_AGC_TARG_VAL_8_1,         0x5a},
0331     {DVBT_AAGC_LOOP_GAIN,           0x18},
0332     {DVBT_LOOP_GAIN2_3_0,            0x8},
0333     {DVBT_LOOP_GAIN2_4,              0x1},
0334     {DVBT_LOOP_GAIN3,               0x18},
0335     {DVBT_VTOP1,                    0x35},
0336     {DVBT_VTOP2,                    0x21},
0337     {DVBT_VTOP3,                    0x21},
0338     {DVBT_KRF1,                      0x0},
0339     {DVBT_KRF2,                     0x40},
0340     {DVBT_KRF3,                     0x10},
0341     {DVBT_KRF4,                     0x10},
0342     {DVBT_IF_AGC_MIN,               0x80},
0343     {DVBT_IF_AGC_MAX,               0x7f},
0344     {DVBT_RF_AGC_MIN,               0x80},
0345     {DVBT_RF_AGC_MAX,               0x7f},
0346     {DVBT_POLAR_RF_AGC,              0x0},
0347     {DVBT_POLAR_IF_AGC,              0x0},
0348     {DVBT_AD7_SETTING,            0xe9d4},
0349     {DVBT_EN_GI_PGA,                 0x0},
0350     {DVBT_THD_LOCK_UP,               0x0},
0351     {DVBT_THD_LOCK_DW,               0x0},
0352     {DVBT_THD_UP1,                  0x14},
0353     {DVBT_THD_DW1,                  0xec},
0354     {DVBT_INTER_CNT_LEN,             0xc},
0355     {DVBT_GI_PGA_STATE,              0x0},
0356     {DVBT_EN_AGC_PGA,                0x1},
0357     {DVBT_REG_GPE,                   0x1},
0358     {DVBT_REG_GPO,                   0x1},
0359     {DVBT_REG_MONSEL,                0x1},
0360     {DVBT_REG_MON,                   0x1},
0361     {DVBT_REG_4MSEL,                 0x0},
0362     {DVBT_SPEC_INV,                  0x0},
0363 };
0364 
0365 static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {
0366     {DVBT_DAGC_TRG_VAL,             0x39},
0367     {DVBT_AGC_TARG_VAL_0,            0x0},
0368     {DVBT_AGC_TARG_VAL_8_1,         0x40},
0369     {DVBT_AAGC_LOOP_GAIN,           0x16},
0370     {DVBT_LOOP_GAIN2_3_0,            0x8},
0371     {DVBT_LOOP_GAIN2_4,              0x1},
0372     {DVBT_LOOP_GAIN3,               0x18},
0373     {DVBT_VTOP1,                    0x35},
0374     {DVBT_VTOP2,                    0x21},
0375     {DVBT_VTOP3,                    0x21},
0376     {DVBT_KRF1,                      0x0},
0377     {DVBT_KRF2,                     0x40},
0378     {DVBT_KRF3,                     0x10},
0379     {DVBT_KRF4,                     0x10},
0380     {DVBT_IF_AGC_MIN,               0x80},
0381     {DVBT_IF_AGC_MAX,               0x7f},
0382     {DVBT_RF_AGC_MIN,               0x80},
0383     {DVBT_RF_AGC_MAX,               0x7f},
0384     {DVBT_POLAR_RF_AGC,              0x0},
0385     {DVBT_POLAR_IF_AGC,              0x0},
0386     {DVBT_AD7_SETTING,            0xe9f4},
0387     {DVBT_SPEC_INV,                  0x1},
0388 };
0389 
0390 static const struct rtl2832_reg_value rtl2832_tuner_init_si2157[] = {
0391     {DVBT_DAGC_TRG_VAL,             0x39},
0392     {DVBT_AGC_TARG_VAL_0,            0x0},
0393     {DVBT_AGC_TARG_VAL_8_1,         0x40},
0394     {DVBT_AAGC_LOOP_GAIN,           0x16},
0395     {DVBT_LOOP_GAIN2_3_0,            0x8},
0396     {DVBT_LOOP_GAIN2_4,              0x1},
0397     {DVBT_LOOP_GAIN3,               0x18},
0398     {DVBT_VTOP1,                    0x35},
0399     {DVBT_VTOP2,                    0x21},
0400     {DVBT_VTOP3,                    0x21},
0401     {DVBT_KRF1,                      0x0},
0402     {DVBT_KRF2,                     0x40},
0403     {DVBT_KRF3,                     0x10},
0404     {DVBT_KRF4,                     0x10},
0405     {DVBT_IF_AGC_MIN,               0x80},
0406     {DVBT_IF_AGC_MAX,               0x7f},
0407     {DVBT_RF_AGC_MIN,               0x80},
0408     {DVBT_RF_AGC_MAX,               0x7f},
0409     {DVBT_POLAR_RF_AGC,              0x0},
0410     {DVBT_POLAR_IF_AGC,              0x0},
0411     {DVBT_AD7_SETTING,            0xe9f4},
0412     {DVBT_SPEC_INV,                  0x0},
0413 };
0414 
0415 #endif /* RTL2832_PRIV_H */
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