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0008 #include "rtl2830_priv.h"
0009
0010
0011 static int rtl2830_bulk_write(struct i2c_client *client, unsigned int reg,
0012 const void *val, size_t val_count)
0013 {
0014 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0015 int ret;
0016
0017 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
0018 ret = regmap_bulk_write(dev->regmap, reg, val, val_count);
0019 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
0020 return ret;
0021 }
0022
0023 static int rtl2830_update_bits(struct i2c_client *client, unsigned int reg,
0024 unsigned int mask, unsigned int val)
0025 {
0026 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0027 int ret;
0028
0029 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
0030 ret = regmap_update_bits(dev->regmap, reg, mask, val);
0031 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
0032 return ret;
0033 }
0034
0035 static int rtl2830_bulk_read(struct i2c_client *client, unsigned int reg,
0036 void *val, size_t val_count)
0037 {
0038 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0039 int ret;
0040
0041 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
0042 ret = regmap_bulk_read(dev->regmap, reg, val, val_count);
0043 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
0044 return ret;
0045 }
0046
0047 static int rtl2830_init(struct dvb_frontend *fe)
0048 {
0049 struct i2c_client *client = fe->demodulator_priv;
0050 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0051 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
0052 int ret, i;
0053 struct rtl2830_reg_val_mask tab[] = {
0054 {0x00d, 0x01, 0x03},
0055 {0x00d, 0x10, 0x10},
0056 {0x104, 0x00, 0x1e},
0057 {0x105, 0x80, 0x80},
0058 {0x110, 0x02, 0x03},
0059 {0x110, 0x08, 0x0c},
0060 {0x17b, 0x00, 0x40},
0061 {0x17d, 0x05, 0x0f},
0062 {0x17d, 0x50, 0xf0},
0063 {0x18c, 0x08, 0x0f},
0064 {0x18d, 0x00, 0xc0},
0065 {0x188, 0x05, 0x0f},
0066 {0x189, 0x00, 0xfc},
0067 {0x2d5, 0x02, 0x02},
0068 {0x2f1, 0x02, 0x06},
0069 {0x2f1, 0x20, 0xf8},
0070 {0x16d, 0x00, 0x01},
0071 {0x1a6, 0x00, 0x80},
0072 {0x106, dev->pdata->vtop, 0x3f},
0073 {0x107, dev->pdata->krf, 0x3f},
0074 {0x112, 0x28, 0xff},
0075 {0x103, dev->pdata->agc_targ_val, 0xff},
0076 {0x00a, 0x02, 0x07},
0077 {0x140, 0x0c, 0x3c},
0078 {0x140, 0x40, 0xc0},
0079 {0x15b, 0x05, 0x07},
0080 {0x15b, 0x28, 0x38},
0081 {0x15c, 0x05, 0x07},
0082 {0x15c, 0x28, 0x38},
0083 {0x115, dev->pdata->spec_inv, 0x01},
0084 {0x16f, 0x01, 0x07},
0085 {0x170, 0x18, 0x38},
0086 {0x172, 0x0f, 0x0f},
0087 {0x173, 0x08, 0x38},
0088 {0x175, 0x01, 0x07},
0089 {0x176, 0x00, 0xc0},
0090 };
0091
0092 for (i = 0; i < ARRAY_SIZE(tab); i++) {
0093 ret = rtl2830_update_bits(client, tab[i].reg, tab[i].mask,
0094 tab[i].val);
0095 if (ret)
0096 goto err;
0097 }
0098
0099 ret = rtl2830_bulk_write(client, 0x18f, "\x28\x00", 2);
0100 if (ret)
0101 goto err;
0102
0103 ret = rtl2830_bulk_write(client, 0x195,
0104 "\x04\x06\x0a\x12\x0a\x12\x1e\x28", 8);
0105 if (ret)
0106 goto err;
0107
0108
0109
0110
0111 ret = rtl2830_update_bits(client, 0x101, 0x04, 0x04);
0112 if (ret)
0113 goto err;
0114
0115 ret = rtl2830_update_bits(client, 0x101, 0x04, 0x00);
0116 if (ret)
0117 goto err;
0118
0119
0120 c->strength.len = 1;
0121 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0122 c->cnr.len = 1;
0123 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0124 c->post_bit_error.len = 1;
0125 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0126 c->post_bit_count.len = 1;
0127 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0128
0129 dev->sleeping = false;
0130
0131 return ret;
0132 err:
0133 dev_dbg(&client->dev, "failed=%d\n", ret);
0134 return ret;
0135 }
0136
0137 static int rtl2830_sleep(struct dvb_frontend *fe)
0138 {
0139 struct i2c_client *client = fe->demodulator_priv;
0140 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0141
0142 dev->sleeping = true;
0143 dev->fe_status = 0;
0144
0145 return 0;
0146 }
0147
0148 static int rtl2830_get_tune_settings(struct dvb_frontend *fe,
0149 struct dvb_frontend_tune_settings *s)
0150 {
0151 s->min_delay_ms = 500;
0152 s->step_size = fe->ops.info.frequency_stepsize_hz * 2;
0153 s->max_drift = (fe->ops.info.frequency_stepsize_hz * 2) + 1;
0154
0155 return 0;
0156 }
0157
0158 static int rtl2830_set_frontend(struct dvb_frontend *fe)
0159 {
0160 struct i2c_client *client = fe->demodulator_priv;
0161 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0162 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0163 int ret, i;
0164 u64 num;
0165 u8 buf[3], u8tmp;
0166 u32 if_ctl, if_frequency;
0167 static const u8 bw_params1[3][34] = {
0168 {
0169 0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
0170 0x00, 0x64, 0x00, 0x67, 0x00, 0x38, 0x1f, 0xde, 0x1f, 0x7a,
0171 0x1f, 0x47, 0x1f, 0x7c, 0x00, 0x30, 0x01, 0x4b, 0x02, 0x82,
0172 0x03, 0x73, 0x03, 0xcf,
0173 }, {
0174 0x1f, 0xfa, 0x1f, 0xda, 0x1f, 0xc1, 0x1f, 0xb3, 0x1f, 0xca,
0175 0x00, 0x07, 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x40, 0x1f, 0xca,
0176 0x1f, 0x4d, 0x1f, 0x2a, 0x1f, 0xb2, 0x00, 0xec, 0x02, 0x7e,
0177 0x03, 0xd0, 0x04, 0x53,
0178 }, {
0179 0x00, 0x10, 0x00, 0x0e, 0x1f, 0xf7, 0x1f, 0xc9, 0x1f, 0xa0,
0180 0x1f, 0xa6, 0x1f, 0xec, 0x00, 0x4e, 0x00, 0x7d, 0x00, 0x3a,
0181 0x1f, 0x98, 0x1f, 0x10, 0x1f, 0x40, 0x00, 0x75, 0x02, 0x5f,
0182 0x04, 0x24, 0x04, 0xdb,
0183 },
0184 };
0185 static const u8 bw_params2[3][6] = {
0186 {0xc3, 0x0c, 0x44, 0x33, 0x33, 0x30},
0187 {0xb8, 0xe3, 0x93, 0x99, 0x99, 0x98},
0188 {0xae, 0xba, 0xf3, 0x26, 0x66, 0x64},
0189 };
0190
0191 dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
0192 c->frequency, c->bandwidth_hz, c->inversion);
0193
0194
0195 if (fe->ops.tuner_ops.set_params)
0196 fe->ops.tuner_ops.set_params(fe);
0197
0198 switch (c->bandwidth_hz) {
0199 case 6000000:
0200 i = 0;
0201 break;
0202 case 7000000:
0203 i = 1;
0204 break;
0205 case 8000000:
0206 i = 2;
0207 break;
0208 default:
0209 dev_err(&client->dev, "invalid bandwidth_hz %u\n",
0210 c->bandwidth_hz);
0211 return -EINVAL;
0212 }
0213
0214 ret = rtl2830_update_bits(client, 0x008, 0x06, i << 1);
0215 if (ret)
0216 goto err;
0217
0218
0219 if (fe->ops.tuner_ops.get_if_frequency)
0220 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
0221 else
0222 ret = -EINVAL;
0223 if (ret)
0224 goto err;
0225
0226 num = if_frequency % dev->pdata->clk;
0227 num *= 0x400000;
0228 num = div_u64(num, dev->pdata->clk);
0229 num = -num;
0230 if_ctl = num & 0x3fffff;
0231 dev_dbg(&client->dev, "if_frequency=%d if_ctl=%08x\n",
0232 if_frequency, if_ctl);
0233
0234 buf[0] = (if_ctl >> 16) & 0x3f;
0235 buf[1] = (if_ctl >> 8) & 0xff;
0236 buf[2] = (if_ctl >> 0) & 0xff;
0237
0238 ret = rtl2830_bulk_read(client, 0x119, &u8tmp, 1);
0239 if (ret)
0240 goto err;
0241
0242 buf[0] |= u8tmp & 0xc0;
0243
0244 ret = rtl2830_bulk_write(client, 0x119, buf, 3);
0245 if (ret)
0246 goto err;
0247
0248
0249 ret = rtl2830_bulk_write(client, 0x11c, &bw_params1[i][0], 17);
0250 if (ret)
0251 goto err;
0252
0253
0254 ret = rtl2830_bulk_write(client, 0x12d, &bw_params1[i][17], 17);
0255 if (ret)
0256 goto err;
0257
0258 ret = rtl2830_bulk_write(client, 0x19d, bw_params2[i], 6);
0259 if (ret)
0260 goto err;
0261
0262 return ret;
0263 err:
0264 dev_dbg(&client->dev, "failed=%d\n", ret);
0265 return ret;
0266 }
0267
0268 static int rtl2830_get_frontend(struct dvb_frontend *fe,
0269 struct dtv_frontend_properties *c)
0270 {
0271 struct i2c_client *client = fe->demodulator_priv;
0272 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0273 int ret;
0274 u8 buf[3];
0275
0276 if (dev->sleeping)
0277 return 0;
0278
0279 ret = rtl2830_bulk_read(client, 0x33c, buf, 2);
0280 if (ret)
0281 goto err;
0282
0283 ret = rtl2830_bulk_read(client, 0x351, &buf[2], 1);
0284 if (ret)
0285 goto err;
0286
0287 dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
0288
0289 switch ((buf[0] >> 2) & 3) {
0290 case 0:
0291 c->modulation = QPSK;
0292 break;
0293 case 1:
0294 c->modulation = QAM_16;
0295 break;
0296 case 2:
0297 c->modulation = QAM_64;
0298 break;
0299 }
0300
0301 switch ((buf[2] >> 2) & 1) {
0302 case 0:
0303 c->transmission_mode = TRANSMISSION_MODE_2K;
0304 break;
0305 case 1:
0306 c->transmission_mode = TRANSMISSION_MODE_8K;
0307 }
0308
0309 switch ((buf[2] >> 0) & 3) {
0310 case 0:
0311 c->guard_interval = GUARD_INTERVAL_1_32;
0312 break;
0313 case 1:
0314 c->guard_interval = GUARD_INTERVAL_1_16;
0315 break;
0316 case 2:
0317 c->guard_interval = GUARD_INTERVAL_1_8;
0318 break;
0319 case 3:
0320 c->guard_interval = GUARD_INTERVAL_1_4;
0321 break;
0322 }
0323
0324 switch ((buf[0] >> 4) & 7) {
0325 case 0:
0326 c->hierarchy = HIERARCHY_NONE;
0327 break;
0328 case 1:
0329 c->hierarchy = HIERARCHY_1;
0330 break;
0331 case 2:
0332 c->hierarchy = HIERARCHY_2;
0333 break;
0334 case 3:
0335 c->hierarchy = HIERARCHY_4;
0336 break;
0337 }
0338
0339 switch ((buf[1] >> 3) & 7) {
0340 case 0:
0341 c->code_rate_HP = FEC_1_2;
0342 break;
0343 case 1:
0344 c->code_rate_HP = FEC_2_3;
0345 break;
0346 case 2:
0347 c->code_rate_HP = FEC_3_4;
0348 break;
0349 case 3:
0350 c->code_rate_HP = FEC_5_6;
0351 break;
0352 case 4:
0353 c->code_rate_HP = FEC_7_8;
0354 break;
0355 }
0356
0357 switch ((buf[1] >> 0) & 7) {
0358 case 0:
0359 c->code_rate_LP = FEC_1_2;
0360 break;
0361 case 1:
0362 c->code_rate_LP = FEC_2_3;
0363 break;
0364 case 2:
0365 c->code_rate_LP = FEC_3_4;
0366 break;
0367 case 3:
0368 c->code_rate_LP = FEC_5_6;
0369 break;
0370 case 4:
0371 c->code_rate_LP = FEC_7_8;
0372 break;
0373 }
0374
0375 return 0;
0376 err:
0377 dev_dbg(&client->dev, "failed=%d\n", ret);
0378 return ret;
0379 }
0380
0381 static int rtl2830_read_status(struct dvb_frontend *fe, enum fe_status *status)
0382 {
0383 struct i2c_client *client = fe->demodulator_priv;
0384 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0385 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
0386 int ret, stmp;
0387 unsigned int utmp;
0388 u8 u8tmp, buf[2];
0389
0390 *status = 0;
0391
0392 if (dev->sleeping)
0393 return 0;
0394
0395 ret = rtl2830_bulk_read(client, 0x351, &u8tmp, 1);
0396 if (ret)
0397 goto err;
0398
0399 u8tmp = (u8tmp >> 3) & 0x0f;
0400 if (u8tmp == 11) {
0401 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
0402 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
0403 } else if (u8tmp == 10) {
0404 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
0405 FE_HAS_VITERBI;
0406 }
0407
0408 dev->fe_status = *status;
0409
0410
0411 if (dev->fe_status & FE_HAS_SIGNAL) {
0412
0413 ret = rtl2830_bulk_read(client, 0x359, buf, 2);
0414 if (ret)
0415 goto err;
0416
0417 stmp = buf[0] << 8 | buf[1] << 0;
0418 stmp = sign_extend32(stmp, 13);
0419 utmp = clamp_val(-4 * stmp + 32767, 0x0000, 0xffff);
0420
0421 dev_dbg(&client->dev, "IF AGC=%d\n", stmp);
0422
0423 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
0424 c->strength.stat[0].uvalue = utmp;
0425 } else {
0426 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0427 }
0428
0429
0430 if (dev->fe_status & FE_HAS_VITERBI) {
0431 unsigned int hierarchy, constellation;
0432 #define CONSTELLATION_NUM 3
0433 #define HIERARCHY_NUM 4
0434 static const u32 constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
0435 {70705899, 70705899, 70705899, 70705899},
0436 {82433173, 82433173, 87483115, 94445660},
0437 {92888734, 92888734, 95487525, 99770748},
0438 };
0439
0440 ret = rtl2830_bulk_read(client, 0x33c, &u8tmp, 1);
0441 if (ret)
0442 goto err;
0443
0444 constellation = (u8tmp >> 2) & 0x03;
0445 if (constellation > CONSTELLATION_NUM - 1)
0446 goto err;
0447
0448 hierarchy = (u8tmp >> 4) & 0x07;
0449 if (hierarchy > HIERARCHY_NUM - 1)
0450 goto err;
0451
0452 ret = rtl2830_bulk_read(client, 0x40c, buf, 2);
0453 if (ret)
0454 goto err;
0455
0456 utmp = buf[0] << 8 | buf[1] << 0;
0457 if (utmp)
0458 stmp = (constant[constellation][hierarchy] -
0459 intlog10(utmp)) / ((1 << 24) / 10000);
0460 else
0461 stmp = 0;
0462
0463 dev_dbg(&client->dev, "CNR raw=%u\n", utmp);
0464
0465 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0466 c->cnr.stat[0].svalue = stmp;
0467 } else {
0468 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0469 }
0470
0471
0472 if (dev->fe_status & FE_HAS_LOCK) {
0473 ret = rtl2830_bulk_read(client, 0x34e, buf, 2);
0474 if (ret)
0475 goto err;
0476
0477 utmp = buf[0] << 8 | buf[1] << 0;
0478 dev->post_bit_error += utmp;
0479 dev->post_bit_count += 1000000;
0480
0481 dev_dbg(&client->dev, "BER errors=%u total=1000000\n", utmp);
0482
0483 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
0484 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
0485 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
0486 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
0487 } else {
0488 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0489 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0490 }
0491
0492
0493 return ret;
0494 err:
0495 dev_dbg(&client->dev, "failed=%d\n", ret);
0496 return ret;
0497 }
0498
0499 static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)
0500 {
0501 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0502
0503 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
0504 *snr = div_s64(c->cnr.stat[0].svalue, 100);
0505 else
0506 *snr = 0;
0507
0508 return 0;
0509 }
0510
0511 static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)
0512 {
0513 struct i2c_client *client = fe->demodulator_priv;
0514 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0515
0516 *ber = (dev->post_bit_error - dev->post_bit_error_prev);
0517 dev->post_bit_error_prev = dev->post_bit_error;
0518
0519 return 0;
0520 }
0521
0522 static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0523 {
0524 *ucblocks = 0;
0525
0526 return 0;
0527 }
0528
0529 static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
0530 {
0531 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0532
0533 if (c->strength.stat[0].scale == FE_SCALE_RELATIVE)
0534 *strength = c->strength.stat[0].uvalue;
0535 else
0536 *strength = 0;
0537
0538 return 0;
0539 }
0540
0541 static const struct dvb_frontend_ops rtl2830_ops = {
0542 .delsys = {SYS_DVBT},
0543 .info = {
0544 .name = "Realtek RTL2830 (DVB-T)",
0545 .caps = FE_CAN_FEC_1_2 |
0546 FE_CAN_FEC_2_3 |
0547 FE_CAN_FEC_3_4 |
0548 FE_CAN_FEC_5_6 |
0549 FE_CAN_FEC_7_8 |
0550 FE_CAN_FEC_AUTO |
0551 FE_CAN_QPSK |
0552 FE_CAN_QAM_16 |
0553 FE_CAN_QAM_64 |
0554 FE_CAN_QAM_AUTO |
0555 FE_CAN_TRANSMISSION_MODE_AUTO |
0556 FE_CAN_GUARD_INTERVAL_AUTO |
0557 FE_CAN_HIERARCHY_AUTO |
0558 FE_CAN_RECOVER |
0559 FE_CAN_MUTE_TS
0560 },
0561
0562 .init = rtl2830_init,
0563 .sleep = rtl2830_sleep,
0564
0565 .get_tune_settings = rtl2830_get_tune_settings,
0566
0567 .set_frontend = rtl2830_set_frontend,
0568 .get_frontend = rtl2830_get_frontend,
0569
0570 .read_status = rtl2830_read_status,
0571 .read_snr = rtl2830_read_snr,
0572 .read_ber = rtl2830_read_ber,
0573 .read_ucblocks = rtl2830_read_ucblocks,
0574 .read_signal_strength = rtl2830_read_signal_strength,
0575 };
0576
0577 static int rtl2830_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
0578 {
0579 struct i2c_client *client = fe->demodulator_priv;
0580 int ret;
0581 u8 u8tmp;
0582
0583 dev_dbg(&client->dev, "onoff=%d\n", onoff);
0584
0585
0586 if (onoff)
0587 u8tmp = 0x80;
0588 else
0589 u8tmp = 0x00;
0590
0591 ret = rtl2830_update_bits(client, 0x061, 0x80, u8tmp);
0592 if (ret)
0593 goto err;
0594
0595 return 0;
0596 err:
0597 dev_dbg(&client->dev, "failed=%d\n", ret);
0598 return ret;
0599 }
0600
0601 static int rtl2830_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid, int onoff)
0602 {
0603 struct i2c_client *client = fe->demodulator_priv;
0604 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0605 int ret;
0606 u8 buf[4];
0607
0608 dev_dbg(&client->dev, "index=%d pid=%04x onoff=%d\n",
0609 index, pid, onoff);
0610
0611
0612 if (pid > 0x1fff || index > 32)
0613 return 0;
0614
0615 if (onoff)
0616 set_bit(index, &dev->filters);
0617 else
0618 clear_bit(index, &dev->filters);
0619
0620
0621 buf[0] = (dev->filters >> 0) & 0xff;
0622 buf[1] = (dev->filters >> 8) & 0xff;
0623 buf[2] = (dev->filters >> 16) & 0xff;
0624 buf[3] = (dev->filters >> 24) & 0xff;
0625 ret = rtl2830_bulk_write(client, 0x062, buf, 4);
0626 if (ret)
0627 goto err;
0628
0629
0630 buf[0] = (pid >> 8) & 0xff;
0631 buf[1] = (pid >> 0) & 0xff;
0632 ret = rtl2830_bulk_write(client, 0x066 + 2 * index, buf, 2);
0633 if (ret)
0634 goto err;
0635
0636 return 0;
0637 err:
0638 dev_dbg(&client->dev, "failed=%d\n", ret);
0639 return ret;
0640 }
0641
0642
0643
0644
0645
0646
0647
0648 static int rtl2830_select(struct i2c_mux_core *muxc, u32 chan_id)
0649 {
0650 struct i2c_client *client = i2c_mux_priv(muxc);
0651 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0652 int ret;
0653
0654 dev_dbg(&client->dev, "\n");
0655
0656
0657
0658 ret = regmap_update_bits(dev->regmap, 0x101, 0x08, 0x08);
0659 if (ret)
0660 goto err;
0661
0662 return 0;
0663 err:
0664 dev_dbg(&client->dev, "failed=%d\n", ret);
0665 return ret;
0666 }
0667
0668 static struct dvb_frontend *rtl2830_get_dvb_frontend(struct i2c_client *client)
0669 {
0670 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0671
0672 dev_dbg(&client->dev, "\n");
0673
0674 return &dev->fe;
0675 }
0676
0677 static struct i2c_adapter *rtl2830_get_i2c_adapter(struct i2c_client *client)
0678 {
0679 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0680
0681 dev_dbg(&client->dev, "\n");
0682
0683 return dev->muxc->adapter[0];
0684 }
0685
0686
0687
0688
0689
0690 static int rtl2830_regmap_read(void *context, const void *reg_buf,
0691 size_t reg_size, void *val_buf, size_t val_size)
0692 {
0693 struct i2c_client *client = context;
0694 int ret;
0695 struct i2c_msg msg[2] = {
0696 {
0697 .addr = client->addr,
0698 .flags = 0,
0699 .len = reg_size,
0700 .buf = (u8 *)reg_buf,
0701 }, {
0702 .addr = client->addr,
0703 .flags = I2C_M_RD,
0704 .len = val_size,
0705 .buf = val_buf,
0706 }
0707 };
0708
0709 ret = __i2c_transfer(client->adapter, msg, 2);
0710 if (ret != 2) {
0711 dev_warn(&client->dev, "i2c reg read failed %d\n", ret);
0712 if (ret >= 0)
0713 ret = -EREMOTEIO;
0714 return ret;
0715 }
0716 return 0;
0717 }
0718
0719 static int rtl2830_regmap_write(void *context, const void *data, size_t count)
0720 {
0721 struct i2c_client *client = context;
0722 int ret;
0723 struct i2c_msg msg[1] = {
0724 {
0725 .addr = client->addr,
0726 .flags = 0,
0727 .len = count,
0728 .buf = (u8 *)data,
0729 }
0730 };
0731
0732 ret = __i2c_transfer(client->adapter, msg, 1);
0733 if (ret != 1) {
0734 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
0735 if (ret >= 0)
0736 ret = -EREMOTEIO;
0737 return ret;
0738 }
0739 return 0;
0740 }
0741
0742 static int rtl2830_regmap_gather_write(void *context, const void *reg,
0743 size_t reg_len, const void *val,
0744 size_t val_len)
0745 {
0746 struct i2c_client *client = context;
0747 int ret;
0748 u8 buf[256];
0749 struct i2c_msg msg[1] = {
0750 {
0751 .addr = client->addr,
0752 .flags = 0,
0753 .len = 1 + val_len,
0754 .buf = buf,
0755 }
0756 };
0757
0758 buf[0] = *(u8 const *)reg;
0759 memcpy(&buf[1], val, val_len);
0760
0761 ret = __i2c_transfer(client->adapter, msg, 1);
0762 if (ret != 1) {
0763 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
0764 if (ret >= 0)
0765 ret = -EREMOTEIO;
0766 return ret;
0767 }
0768 return 0;
0769 }
0770
0771 static int rtl2830_probe(struct i2c_client *client,
0772 const struct i2c_device_id *id)
0773 {
0774 struct rtl2830_platform_data *pdata = client->dev.platform_data;
0775 struct rtl2830_dev *dev;
0776 int ret;
0777 u8 u8tmp;
0778 static const struct regmap_bus regmap_bus = {
0779 .read = rtl2830_regmap_read,
0780 .write = rtl2830_regmap_write,
0781 .gather_write = rtl2830_regmap_gather_write,
0782 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
0783 };
0784 static const struct regmap_range_cfg regmap_range_cfg[] = {
0785 {
0786 .selector_reg = 0x00,
0787 .selector_mask = 0xff,
0788 .selector_shift = 0,
0789 .window_start = 0,
0790 .window_len = 0x100,
0791 .range_min = 0 * 0x100,
0792 .range_max = 5 * 0x100,
0793 },
0794 };
0795 static const struct regmap_config regmap_config = {
0796 .reg_bits = 8,
0797 .val_bits = 8,
0798 .max_register = 5 * 0x100,
0799 .ranges = regmap_range_cfg,
0800 .num_ranges = ARRAY_SIZE(regmap_range_cfg),
0801 };
0802
0803 dev_dbg(&client->dev, "\n");
0804
0805 if (pdata == NULL) {
0806 ret = -EINVAL;
0807 goto err;
0808 }
0809
0810
0811 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
0812 if (dev == NULL) {
0813 ret = -ENOMEM;
0814 goto err;
0815 }
0816
0817
0818 i2c_set_clientdata(client, dev);
0819 dev->client = client;
0820 dev->pdata = client->dev.platform_data;
0821 dev->sleeping = true;
0822 dev->regmap = regmap_init(&client->dev, ®map_bus, client,
0823 ®map_config);
0824 if (IS_ERR(dev->regmap)) {
0825 ret = PTR_ERR(dev->regmap);
0826 goto err_kfree;
0827 }
0828
0829
0830 ret = rtl2830_bulk_read(client, 0x000, &u8tmp, 1);
0831 if (ret)
0832 goto err_regmap_exit;
0833
0834
0835 dev->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
0836 rtl2830_select, NULL);
0837 if (!dev->muxc) {
0838 ret = -ENOMEM;
0839 goto err_regmap_exit;
0840 }
0841 dev->muxc->priv = client;
0842 ret = i2c_mux_add_adapter(dev->muxc, 0, 0, 0);
0843 if (ret)
0844 goto err_regmap_exit;
0845
0846
0847 memcpy(&dev->fe.ops, &rtl2830_ops, sizeof(dev->fe.ops));
0848 dev->fe.demodulator_priv = client;
0849
0850
0851 pdata->get_dvb_frontend = rtl2830_get_dvb_frontend;
0852 pdata->get_i2c_adapter = rtl2830_get_i2c_adapter;
0853 pdata->pid_filter = rtl2830_pid_filter;
0854 pdata->pid_filter_ctrl = rtl2830_pid_filter_ctrl;
0855
0856 dev_info(&client->dev, "Realtek RTL2830 successfully attached\n");
0857
0858 return 0;
0859 err_regmap_exit:
0860 regmap_exit(dev->regmap);
0861 err_kfree:
0862 kfree(dev);
0863 err:
0864 dev_dbg(&client->dev, "failed=%d\n", ret);
0865 return ret;
0866 }
0867
0868 static int rtl2830_remove(struct i2c_client *client)
0869 {
0870 struct rtl2830_dev *dev = i2c_get_clientdata(client);
0871
0872 dev_dbg(&client->dev, "\n");
0873
0874 i2c_mux_del_adapters(dev->muxc);
0875 regmap_exit(dev->regmap);
0876 kfree(dev);
0877
0878 return 0;
0879 }
0880
0881 static const struct i2c_device_id rtl2830_id_table[] = {
0882 {"rtl2830", 0},
0883 {}
0884 };
0885 MODULE_DEVICE_TABLE(i2c, rtl2830_id_table);
0886
0887 static struct i2c_driver rtl2830_driver = {
0888 .driver = {
0889 .name = "rtl2830",
0890 .suppress_bind_attrs = true,
0891 },
0892 .probe = rtl2830_probe,
0893 .remove = rtl2830_remove,
0894 .id_table = rtl2830_id_table,
0895 };
0896
0897 module_i2c_driver(rtl2830_driver);
0898
0899 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
0900 MODULE_DESCRIPTION("Realtek RTL2830 DVB-T demodulator driver");
0901 MODULE_LICENSE("GPL");