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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
0004  *
0005  *    Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
0006  *
0007  *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
0008  *
0009  *    Based on code from Jack Kelliher (kelliher@xmission.com)
0010  *                           Copyright (C) 2002 & pcHDTV, inc.
0011 */
0012 
0013 /*
0014  * This driver needs two external firmware files. Please copy
0015  * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
0016  * /usr/lib/hotplug/firmware/ or /lib/firmware/
0017  * (depending on configuration of firmware hotplug).
0018  */
0019 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
0020 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
0021 
0022 #include <linux/kernel.h>
0023 #include <linux/module.h>
0024 #include <linux/init.h>
0025 #include <linux/delay.h>
0026 #include <linux/string.h>
0027 #include <linux/slab.h>
0028 #include <asm/byteorder.h>
0029 
0030 #include <media/dvb_math.h>
0031 #include <media/dvb_frontend.h>
0032 #include "or51132.h"
0033 
0034 static int debug;
0035 #define dprintk(args...) \
0036     do { \
0037         if (debug) printk(KERN_DEBUG "or51132: " args); \
0038     } while (0)
0039 
0040 
0041 struct or51132_state
0042 {
0043     struct i2c_adapter* i2c;
0044 
0045     /* Configuration settings */
0046     const struct or51132_config* config;
0047 
0048     struct dvb_frontend frontend;
0049 
0050     /* Demodulator private data */
0051     enum fe_modulation current_modulation;
0052     u32 snr; /* Result of last SNR calculation */
0053 
0054     /* Tuner private data */
0055     u32 current_frequency;
0056 };
0057 
0058 
0059 /* Write buffer to demod */
0060 static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
0061 {
0062     int err;
0063     struct i2c_msg msg = { .addr = state->config->demod_address,
0064                    .flags = 0, .buf = (u8*)buf, .len = len };
0065 
0066     /* msleep(20); */ /* doesn't appear to be necessary */
0067     if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
0068         printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
0069                msg.addr, msg.len, err);
0070         return -EREMOTEIO;
0071     }
0072     return 0;
0073 }
0074 
0075 /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
0076    Less code and more efficient that loading a buffer on the stack with
0077    the bytes to send and then calling or51132_writebuf() on that. */
0078 #define or51132_writebytes(state, data...)  \
0079     ({ static const u8 _data[] = {data}; \
0080     or51132_writebuf(state, _data, sizeof(_data)); })
0081 
0082 /* Read data from demod into buffer.  Returns 0 on success. */
0083 static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
0084 {
0085     int err;
0086     struct i2c_msg msg = { .addr = state->config->demod_address,
0087                    .flags = I2C_M_RD, .buf = buf, .len = len };
0088 
0089     /* msleep(20); */ /* doesn't appear to be necessary */
0090     if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
0091         printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
0092                msg.addr, msg.len, err);
0093         return -EREMOTEIO;
0094     }
0095     return 0;
0096 }
0097 
0098 /* Reads a 16-bit demod register.  Returns <0 on error. */
0099 static int or51132_readreg(struct or51132_state *state, u8 reg)
0100 {
0101     u8 buf[2] = { 0x04, reg };
0102     struct i2c_msg msg[2] = {
0103         {.addr = state->config->demod_address, .flags = 0,
0104          .buf = buf, .len = 2 },
0105         {.addr = state->config->demod_address, .flags = I2C_M_RD,
0106          .buf = buf, .len = 2 }};
0107     int err;
0108 
0109     if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
0110         printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
0111                reg, err);
0112         return -EREMOTEIO;
0113     }
0114     return buf[0] | (buf[1] << 8);
0115 }
0116 
0117 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
0118 {
0119     struct or51132_state* state = fe->demodulator_priv;
0120     static const u8 run_buf[] = {0x7F,0x01};
0121     u8 rec_buf[8];
0122     u32 firmwareAsize, firmwareBsize;
0123     int i,ret;
0124 
0125     dprintk("Firmware is %zd bytes\n",fw->size);
0126 
0127     /* Get size of firmware A and B */
0128     firmwareAsize = le32_to_cpu(*((__le32*)fw->data));
0129     dprintk("FirmwareA is %i bytes\n",firmwareAsize);
0130     firmwareBsize = le32_to_cpu(*((__le32*)(fw->data+4)));
0131     dprintk("FirmwareB is %i bytes\n",firmwareBsize);
0132 
0133     /* Upload firmware */
0134     if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
0135         printk(KERN_WARNING "or51132: load_firmware error 1\n");
0136         return ret;
0137     }
0138     if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
0139                     firmwareBsize))) {
0140         printk(KERN_WARNING "or51132: load_firmware error 2\n");
0141         return ret;
0142     }
0143 
0144     if ((ret = or51132_writebuf(state, run_buf, 2))) {
0145         printk(KERN_WARNING "or51132: load_firmware error 3\n");
0146         return ret;
0147     }
0148     if ((ret = or51132_writebuf(state, run_buf, 2))) {
0149         printk(KERN_WARNING "or51132: load_firmware error 4\n");
0150         return ret;
0151     }
0152 
0153     /* 50ms for operation to begin */
0154     msleep(50);
0155 
0156     /* Read back ucode version to besure we loaded correctly and are really up and running */
0157     /* Get uCode version */
0158     if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
0159         printk(KERN_WARNING "or51132: load_firmware error a\n");
0160         return ret;
0161     }
0162     if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
0163         printk(KERN_WARNING "or51132: load_firmware error b\n");
0164         return ret;
0165     }
0166     if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
0167         printk(KERN_WARNING "or51132: load_firmware error c\n");
0168         return ret;
0169     }
0170     for (i=0;i<4;i++) {
0171         /* Once upon a time, this command might have had something
0172            to do with getting the firmware version, but it's
0173            not used anymore:
0174            {0x04,0x00,0x30,0x00,i+1} */
0175         /* Read 8 bytes, two bytes at a time */
0176         if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
0177             printk(KERN_WARNING
0178                    "or51132: load_firmware error d - %d\n",i);
0179             return ret;
0180         }
0181     }
0182 
0183     printk(KERN_WARNING
0184            "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
0185            rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
0186            rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
0187            rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
0188            rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
0189 
0190     if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
0191         printk(KERN_WARNING "or51132: load_firmware error e\n");
0192         return ret;
0193     }
0194     return 0;
0195 };
0196 
0197 static int or51132_init(struct dvb_frontend* fe)
0198 {
0199     return 0;
0200 }
0201 
0202 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
0203 {
0204     *ber = 0;
0205     return 0;
0206 }
0207 
0208 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
0209 {
0210     *ucblocks = 0;
0211     return 0;
0212 }
0213 
0214 static int or51132_sleep(struct dvb_frontend* fe)
0215 {
0216     return 0;
0217 }
0218 
0219 static int or51132_setmode(struct dvb_frontend* fe)
0220 {
0221     struct or51132_state* state = fe->demodulator_priv;
0222     u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
0223     u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
0224 
0225     dprintk("setmode %d\n",(int)state->current_modulation);
0226 
0227     switch (state->current_modulation) {
0228     case VSB_8:
0229         /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
0230         cmd_buf1[2] = 0x50;
0231         /* REC MODE inv IF spectrum, Normal */
0232         cmd_buf2[1] = 0x03;
0233         /* Channel MODE ATSC/VSB8 */
0234         cmd_buf2[2] = 0x06;
0235         break;
0236     /* All QAM modes are:
0237        Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
0238        REC MODE Normal Carrier Lock */
0239     case QAM_AUTO:
0240         /* Channel MODE Auto QAM64/256 */
0241         cmd_buf2[2] = 0x4f;
0242         break;
0243     case QAM_256:
0244         /* Channel MODE QAM256 */
0245         cmd_buf2[2] = 0x45;
0246         break;
0247     case QAM_64:
0248         /* Channel MODE QAM64 */
0249         cmd_buf2[2] = 0x43;
0250         break;
0251     default:
0252         printk(KERN_WARNING
0253                "or51132: setmode: Modulation set to unsupported value (%d)\n",
0254                state->current_modulation);
0255         return -EINVAL;
0256     }
0257 
0258     /* Set Receiver 1 register */
0259     if (or51132_writebuf(state, cmd_buf1, 3)) {
0260         printk(KERN_WARNING "or51132: set_mode error 1\n");
0261         return -EREMOTEIO;
0262     }
0263     dprintk("set #1 to %02x\n", cmd_buf1[2]);
0264 
0265     /* Set operation mode in Receiver 6 register */
0266     if (or51132_writebuf(state, cmd_buf2, 3)) {
0267         printk(KERN_WARNING "or51132: set_mode error 2\n");
0268         return -EREMOTEIO;
0269     }
0270     dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
0271 
0272     return 0;
0273 }
0274 
0275 /* Some modulations use the same firmware.  This classifies modulations
0276    by the firmware they use. */
0277 #define MOD_FWCLASS_UNKNOWN 0
0278 #define MOD_FWCLASS_VSB     1
0279 #define MOD_FWCLASS_QAM     2
0280 static int modulation_fw_class(enum fe_modulation modulation)
0281 {
0282     switch(modulation) {
0283     case VSB_8:
0284         return MOD_FWCLASS_VSB;
0285     case QAM_AUTO:
0286     case QAM_64:
0287     case QAM_256:
0288         return MOD_FWCLASS_QAM;
0289     default:
0290         return MOD_FWCLASS_UNKNOWN;
0291     }
0292 }
0293 
0294 static int or51132_set_parameters(struct dvb_frontend *fe)
0295 {
0296     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0297     int ret;
0298     struct or51132_state* state = fe->demodulator_priv;
0299     const struct firmware *fw;
0300     const char *fwname;
0301     int clock_mode;
0302 
0303     /* Upload new firmware only if we need a different one */
0304     if (modulation_fw_class(state->current_modulation) !=
0305         modulation_fw_class(p->modulation)) {
0306         switch (modulation_fw_class(p->modulation)) {
0307         case MOD_FWCLASS_VSB:
0308             dprintk("set_parameters VSB MODE\n");
0309             fwname = OR51132_VSB_FIRMWARE;
0310 
0311             /* Set non-punctured clock for VSB */
0312             clock_mode = 0;
0313             break;
0314         case MOD_FWCLASS_QAM:
0315             dprintk("set_parameters QAM MODE\n");
0316             fwname = OR51132_QAM_FIRMWARE;
0317 
0318             /* Set punctured clock for QAM */
0319             clock_mode = 1;
0320             break;
0321         default:
0322             printk("or51132: Modulation type(%d) UNSUPPORTED\n",
0323                    p->modulation);
0324             return -1;
0325         }
0326         printk("or51132: Waiting for firmware upload(%s)...\n",
0327                fwname);
0328         ret = request_firmware(&fw, fwname, state->i2c->dev.parent);
0329         if (ret) {
0330             printk(KERN_WARNING "or51132: No firmware uploaded(timeout or file not found?)\n");
0331             return ret;
0332         }
0333         ret = or51132_load_firmware(fe, fw);
0334         release_firmware(fw);
0335         if (ret) {
0336             printk(KERN_WARNING "or51132: Writing firmware to device failed!\n");
0337             return ret;
0338         }
0339         printk("or51132: Firmware upload complete.\n");
0340         state->config->set_ts_params(fe, clock_mode);
0341     }
0342     /* Change only if we are actually changing the modulation */
0343     if (state->current_modulation != p->modulation) {
0344         state->current_modulation = p->modulation;
0345         or51132_setmode(fe);
0346     }
0347 
0348     if (fe->ops.tuner_ops.set_params) {
0349         fe->ops.tuner_ops.set_params(fe);
0350         if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
0351     }
0352 
0353     /* Set to current mode */
0354     or51132_setmode(fe);
0355 
0356     /* Update current frequency */
0357     state->current_frequency = p->frequency;
0358     return 0;
0359 }
0360 
0361 static int or51132_get_parameters(struct dvb_frontend* fe,
0362                   struct dtv_frontend_properties *p)
0363 {
0364     struct or51132_state* state = fe->demodulator_priv;
0365     int status;
0366     int retry = 1;
0367 
0368 start:
0369     /* Receiver Status */
0370     if ((status = or51132_readreg(state, 0x00)) < 0) {
0371         printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
0372         return -EREMOTEIO;
0373     }
0374     switch(status&0xff) {
0375     case 0x06:
0376         p->modulation = VSB_8;
0377         break;
0378     case 0x43:
0379         p->modulation = QAM_64;
0380         break;
0381     case 0x45:
0382         p->modulation = QAM_256;
0383         break;
0384     default:
0385         if (retry--)
0386             goto start;
0387         printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
0388                status&0xff);
0389         return -EREMOTEIO;
0390     }
0391 
0392     /* FIXME: Read frequency from frontend, take AFC into account */
0393     p->frequency = state->current_frequency;
0394 
0395     /* FIXME: How to read inversion setting? Receiver 6 register? */
0396     p->inversion = INVERSION_AUTO;
0397 
0398     return 0;
0399 }
0400 
0401 static int or51132_read_status(struct dvb_frontend *fe, enum fe_status *status)
0402 {
0403     struct or51132_state* state = fe->demodulator_priv;
0404     int reg;
0405 
0406     /* Receiver Status */
0407     if ((reg = or51132_readreg(state, 0x00)) < 0) {
0408         printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
0409         *status = 0;
0410         return -EREMOTEIO;
0411     }
0412     dprintk("%s: read_status %04x\n", __func__, reg);
0413 
0414     if (reg & 0x0100) /* Receiver Lock */
0415         *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
0416               FE_HAS_SYNC|FE_HAS_LOCK;
0417     else
0418         *status = 0;
0419     return 0;
0420 }
0421 
0422 /* Calculate SNR estimation (scaled by 2^24)
0423 
0424    8-VSB SNR and QAM equations from Oren datasheets
0425 
0426    For 8-VSB:
0427      SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
0428 
0429      Where K = 0 if NTSC rejection filter is OFF; and
0430        K = 3 if NTSC rejection filter is ON
0431 
0432    For QAM64:
0433      SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
0434 
0435    For QAM256:
0436      SNR[dB] = 10 * log10(907832426.314266  / MSE^2 )
0437 
0438    We re-write the snr equation as:
0439      SNR * 2^24 = 10*(c - 2*intlog10(MSE))
0440    Where for QAM256, c = log10(907832426.314266) * 2^24
0441    and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
0442 
0443 static u32 calculate_snr(u32 mse, u32 c)
0444 {
0445     if (mse == 0) /* No signal */
0446         return 0;
0447 
0448     mse = 2*intlog10(mse);
0449     if (mse > c) {
0450         /* Negative SNR, which is possible, but realisticly the
0451         demod will lose lock before the signal gets this bad.  The
0452         API only allows for unsigned values, so just return 0 */
0453         return 0;
0454     }
0455     return 10*(c - mse);
0456 }
0457 
0458 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
0459 {
0460     struct or51132_state* state = fe->demodulator_priv;
0461     int noise, reg;
0462     u32 c, usK = 0;
0463     int retry = 1;
0464 
0465 start:
0466     /* SNR after Equalizer */
0467     noise = or51132_readreg(state, 0x02);
0468     if (noise < 0) {
0469         printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
0470         return -EREMOTEIO;
0471     }
0472     dprintk("read_snr noise (%d)\n", noise);
0473 
0474     /* Read status, contains modulation type for QAM_AUTO and
0475        NTSC filter for VSB */
0476     reg = or51132_readreg(state, 0x00);
0477     if (reg < 0) {
0478         printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
0479         return -EREMOTEIO;
0480     }
0481 
0482     switch (reg&0xff) {
0483     case 0x06:
0484         if (reg & 0x1000) usK = 3 << 24;
0485         fallthrough;
0486     case 0x43: /* QAM64 */
0487         c = 150204167;
0488         break;
0489     case 0x45:
0490         c = 150290396;
0491         break;
0492     default:
0493         printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
0494         if (retry--) goto start;
0495         return -EREMOTEIO;
0496     }
0497     dprintk("%s: modulation %02x, NTSC rej O%s\n", __func__,
0498         reg&0xff, reg&0x1000?"n":"ff");
0499 
0500     /* Calculate SNR using noise, c, and NTSC rejection correction */
0501     state->snr = calculate_snr(noise, c) - usK;
0502     *snr = (state->snr) >> 16;
0503 
0504     dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
0505         state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
0506 
0507     return 0;
0508 }
0509 
0510 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
0511 {
0512     /* Calculate Strength from SNR up to 35dB */
0513     /* Even though the SNR can go higher than 35dB, there is some comfort */
0514     /* factor in having a range of strong signals that can show at 100%   */
0515     struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
0516     u16 snr;
0517     int ret;
0518 
0519     ret = fe->ops.read_snr(fe, &snr);
0520     if (ret != 0)
0521         return ret;
0522     /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
0523     /* scale the range 0 - 35*2^24 into 0 - 65535 */
0524     if (state->snr >= 8960 * 0x10000)
0525         *strength = 0xffff;
0526     else
0527         *strength = state->snr / 8960;
0528 
0529     return 0;
0530 }
0531 
0532 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
0533 {
0534     fe_tune_settings->min_delay_ms = 500;
0535     fe_tune_settings->step_size = 0;
0536     fe_tune_settings->max_drift = 0;
0537 
0538     return 0;
0539 }
0540 
0541 static void or51132_release(struct dvb_frontend* fe)
0542 {
0543     struct or51132_state* state = fe->demodulator_priv;
0544     kfree(state);
0545 }
0546 
0547 static const struct dvb_frontend_ops or51132_ops;
0548 
0549 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
0550                     struct i2c_adapter* i2c)
0551 {
0552     struct or51132_state* state = NULL;
0553 
0554     /* Allocate memory for the internal state */
0555     state = kzalloc(sizeof(struct or51132_state), GFP_KERNEL);
0556     if (state == NULL)
0557         return NULL;
0558 
0559     /* Setup the state */
0560     state->config = config;
0561     state->i2c = i2c;
0562     state->current_frequency = -1;
0563     state->current_modulation = -1;
0564 
0565     /* Create dvb_frontend */
0566     memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
0567     state->frontend.demodulator_priv = state;
0568     return &state->frontend;
0569 }
0570 
0571 static const struct dvb_frontend_ops or51132_ops = {
0572     .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
0573     .info = {
0574         .name           = "Oren OR51132 VSB/QAM Frontend",
0575         .frequency_min_hz   =  44 * MHz,
0576         .frequency_max_hz   = 958 * MHz,
0577         .frequency_stepsize_hz  = 166666,
0578         .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
0579             FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
0580             FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
0581             FE_CAN_8VSB
0582     },
0583 
0584     .release = or51132_release,
0585 
0586     .init = or51132_init,
0587     .sleep = or51132_sleep,
0588 
0589     .set_frontend = or51132_set_parameters,
0590     .get_frontend = or51132_get_parameters,
0591     .get_tune_settings = or51132_get_tune_settings,
0592 
0593     .read_status = or51132_read_status,
0594     .read_ber = or51132_read_ber,
0595     .read_signal_strength = or51132_read_signal_strength,
0596     .read_snr = or51132_read_snr,
0597     .read_ucblocks = or51132_read_ucblocks,
0598 };
0599 
0600 module_param(debug, int, 0644);
0601 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
0602 
0603 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
0604 MODULE_AUTHOR("Kirk Lapray");
0605 MODULE_AUTHOR("Trent Piepho");
0606 MODULE_LICENSE("GPL");
0607 
0608 EXPORT_SYMBOL(or51132_attach);
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