media/dvb-frontends/mxl692_defs.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Driver for the MaxLinear MxL69x family of combo tuners/demods
0004  *
0005  * Copyright (C) 2020 Brad Love <brad@nextdimension.cc>
0006  *
0007  * based on code:
0008  * Copyright (c) 2016 MaxLinear, Inc. All rights reserved
0009  * which was released under GPL V2
0010  */
0011
0012 /*****************************************************************************
0013  *  Defines
0014  *****************************************************************************
0015  */
0016 #define MXL_EAGLE_HOST_MSG_HEADER_SIZE  8
0017 #define MXL_EAGLE_FW_MAX_SIZE_IN_KB     76
0018 #define MXL_EAGLE_QAM_FFE_TAPS_LENGTH   16
0019 #define MXL_EAGLE_QAM_SPUR_TAPS_LENGTH  32
0020 #define MXL_EAGLE_QAM_DFE_TAPS_LENGTH   72
0021 #define MXL_EAGLE_ATSC_FFE_TAPS_LENGTH  4096
0022 #define MXL_EAGLE_ATSC_DFE_TAPS_LENGTH  384
0023 #define MXL_EAGLE_VERSION_SIZE          5     /* A.B.C.D-RCx */
0024 #define MXL_EAGLE_FW_LOAD_TIME          50
0025
0026 #define MXL_EAGLE_FW_MAX_SIZE_IN_KB       76
0027 #define MXL_EAGLE_FW_HEADER_SIZE          16
0028 #define MXL_EAGLE_FW_SEGMENT_HEADER_SIZE  8
0029 #define MXL_EAGLE_MAX_I2C_PACKET_SIZE     58
0030 #define MXL_EAGLE_I2C_MHEADER_SIZE        6
0031 #define MXL_EAGLE_I2C_PHEADER_SIZE        2
0032
0033 /* Enum of Eagle family devices */
0034 enum MXL_EAGLE_DEVICE_E {
0035     MXL_EAGLE_DEVICE_691 = 1,    /* Device Mxl691 */
0036     MXL_EAGLE_DEVICE_248 = 2,    /* Device Mxl248 */
0037     MXL_EAGLE_DEVICE_692 = 3,    /* Device Mxl692 */
0038     MXL_EAGLE_DEVICE_MAX,        /* No such device */
0039 };
0040
0041 #define VER_A   1
0042 #define VER_B   1
0043 #define VER_C   1
0044 #define VER_D   3
0045 #define VER_E   6
0046
0047 /* Enum of Host to Eagle I2C protocol opcodes */
0048 enum MXL_EAGLE_OPCODE_E {
0049     /* DEVICE */
0050     MXL_EAGLE_OPCODE_DEVICE_DEMODULATOR_TYPE_SET,
0051     MXL_EAGLE_OPCODE_DEVICE_MPEG_OUT_PARAMS_SET,
0052     MXL_EAGLE_OPCODE_DEVICE_POWERMODE_SET,
0053     MXL_EAGLE_OPCODE_DEVICE_GPIO_DIRECTION_SET,
0054     MXL_EAGLE_OPCODE_DEVICE_GPO_LEVEL_SET,
0055     MXL_EAGLE_OPCODE_DEVICE_INTR_MASK_SET,
0056     MXL_EAGLE_OPCODE_DEVICE_IO_MUX_SET,
0057     MXL_EAGLE_OPCODE_DEVICE_VERSION_GET,
0058     MXL_EAGLE_OPCODE_DEVICE_STATUS_GET,
0059     MXL_EAGLE_OPCODE_DEVICE_GPI_LEVEL_GET,
0060
0061     /* TUNER */
0062     MXL_EAGLE_OPCODE_TUNER_CHANNEL_TUNE_SET,
0063     MXL_EAGLE_OPCODE_TUNER_LOCK_STATUS_GET,
0064     MXL_EAGLE_OPCODE_TUNER_AGC_STATUS_GET,
0065
0066     /* ATSC */
0067     MXL_EAGLE_OPCODE_ATSC_INIT_SET,
0068     MXL_EAGLE_OPCODE_ATSC_ACQUIRE_CARRIER_SET,
0069     MXL_EAGLE_OPCODE_ATSC_STATUS_GET,
0070     MXL_EAGLE_OPCODE_ATSC_ERROR_COUNTERS_GET,
0071     MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_DFE_TAPS_GET,
0072     MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_FFE_TAPS_GET,
0073
0074     /* QAM */
0075     MXL_EAGLE_OPCODE_QAM_PARAMS_SET,
0076     MXL_EAGLE_OPCODE_QAM_RESTART_SET,
0077     MXL_EAGLE_OPCODE_QAM_STATUS_GET,
0078     MXL_EAGLE_OPCODE_QAM_ERROR_COUNTERS_GET,
0079     MXL_EAGLE_OPCODE_QAM_CONSTELLATION_VALUE_GET,
0080     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_FFE_GET,
0081     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_START_GET,
0082     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_END_GET,
0083     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET,
0084     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_START_GET,
0085     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET,
0086     MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_END_GET,
0087
0088     /* OOB */
0089     MXL_EAGLE_OPCODE_OOB_PARAMS_SET,
0090     MXL_EAGLE_OPCODE_OOB_RESTART_SET,
0091     MXL_EAGLE_OPCODE_OOB_ERROR_COUNTERS_GET,
0092     MXL_EAGLE_OPCODE_OOB_STATUS_GET,
0093
0094     /* SMA */
0095     MXL_EAGLE_OPCODE_SMA_INIT_SET,
0096     MXL_EAGLE_OPCODE_SMA_PARAMS_SET,
0097     MXL_EAGLE_OPCODE_SMA_TRANSMIT_SET,
0098     MXL_EAGLE_OPCODE_SMA_RECEIVE_GET,
0099
0100     /* DEBUG */
0101     MXL_EAGLE_OPCODE_INTERNAL,
0102
0103     MXL_EAGLE_OPCODE_MAX = 70,
0104 };
0105
0106 /* Enum of Host to Eagle I2C protocol opcodes */
0107 static const char * const MXL_EAGLE_OPCODE_STRING[] = {
0108     /* DEVICE */
0109     "DEVICE_DEMODULATOR_TYPE_SET",
0110     "DEVICE_MPEG_OUT_PARAMS_SET",
0111     "DEVICE_POWERMODE_SET",
0112     "DEVICE_GPIO_DIRECTION_SET",
0113     "DEVICE_GPO_LEVEL_SET",
0114     "DEVICE_INTR_MASK_SET",
0115     "DEVICE_IO_MUX_SET",
0116     "DEVICE_VERSION_GET",
0117     "DEVICE_STATUS_GET",
0118     "DEVICE_GPI_LEVEL_GET",
0119
0120     /* TUNER */
0121     "TUNER_CHANNEL_TUNE_SET",
0122     "TUNER_LOCK_STATUS_GET",
0123     "TUNER_AGC_STATUS_GET",
0124
0125     /* ATSC */
0126     "ATSC_INIT_SET",
0127     "ATSC_ACQUIRE_CARRIER_SET",
0128     "ATSC_STATUS_GET",
0129     "ATSC_ERROR_COUNTERS_GET",
0130     "ATSC_EQUALIZER_FILTER_DFE_TAPS_GET",
0131     "ATSC_EQUALIZER_FILTER_FFE_TAPS_GET",
0132
0133     /* QAM */
0134     "QAM_PARAMS_SET",
0135     "QAM_RESTART_SET",
0136     "QAM_STATUS_GET",
0137     "QAM_ERROR_COUNTERS_GET",
0138     "QAM_CONSTELLATION_VALUE_GET",
0139     "QAM_EQUALIZER_FILTER_FFE_GET",
0140     "QAM_EQUALIZER_FILTER_SPUR_START_GET",
0141     "QAM_EQUALIZER_FILTER_SPUR_END_GET",
0142     "QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET",
0143     "QAM_EQUALIZER_FILTER_DFE_START_GET",
0144     "QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET",
0145     "QAM_EQUALIZER_FILTER_DFE_END_GET",
0146
0147     /* OOB */
0148     "OOB_PARAMS_SET",
0149     "OOB_RESTART_SET",
0150     "OOB_ERROR_COUNTERS_GET",
0151     "OOB_STATUS_GET",
0152
0153     /* SMA */
0154     "SMA_INIT_SET",
0155     "SMA_PARAMS_SET",
0156     "SMA_TRANSMIT_SET",
0157     "SMA_RECEIVE_GET",
0158
0159     /* DEBUG */
0160     "INTERNAL",
0161 };
0162
0163 /* Enum of Callabck function types */
0164 enum MXL_EAGLE_CB_TYPE_E {
0165     MXL_EAGLE_CB_FW_DOWNLOAD = 0,
0166 };
0167
0168 /* Enum of power supply types */
0169 enum MXL_EAGLE_POWER_SUPPLY_SOURCE_E {
0170     MXL_EAGLE_POWER_SUPPLY_SOURCE_SINGLE,   /* Single supply of 3.3V */
0171     MXL_EAGLE_POWER_SUPPLY_SOURCE_DUAL,     /* Dual supply, 1.8V & 3.3V */
0172 };
0173
0174 /* Enum of I/O pad drive modes */
0175 enum MXL_EAGLE_IO_MUX_DRIVE_MODE_E {
0176     MXL_EAGLE_IO_MUX_DRIVE_MODE_1X,
0177     MXL_EAGLE_IO_MUX_DRIVE_MODE_2X,
0178     MXL_EAGLE_IO_MUX_DRIVE_MODE_3X,
0179     MXL_EAGLE_IO_MUX_DRIVE_MODE_4X,
0180     MXL_EAGLE_IO_MUX_DRIVE_MODE_5X,
0181     MXL_EAGLE_IO_MUX_DRIVE_MODE_6X,
0182     MXL_EAGLE_IO_MUX_DRIVE_MODE_7X,
0183     MXL_EAGLE_IO_MUX_DRIVE_MODE_8X,
0184 };
0185
0186 /* Enum of demodulator types. Used for selection of demodulator
0187  * type in relevant devices, e.g. ATSC vs. QAM in Mxl691
0188  */
0189 enum MXL_EAGLE_DEMOD_TYPE_E {
0190     MXL_EAGLE_DEMOD_TYPE_QAM,    /* Mxl248 or Mxl692 */
0191     MXL_EAGLE_DEMOD_TYPE_OOB,    /* Mxl248 only */
0192     MXL_EAGLE_DEMOD_TYPE_ATSC    /* Mxl691 or Mxl692 */
0193 };
0194
0195 /* Enum of power modes. Used for initial
0196  * activation, or for activating sleep mode
0197  */
0198 enum MXL_EAGLE_POWER_MODE_E {
0199     MXL_EAGLE_POWER_MODE_SLEEP,
0200     MXL_EAGLE_POWER_MODE_ACTIVE
0201 };
0202
0203 /* Enum of GPIOs, used in device GPIO APIs */
0204 enum MXL_EAGLE_GPIO_NUMBER_E {
0205     MXL_EAGLE_GPIO_NUMBER_0,
0206     MXL_EAGLE_GPIO_NUMBER_1,
0207     MXL_EAGLE_GPIO_NUMBER_2,
0208     MXL_EAGLE_GPIO_NUMBER_3,
0209     MXL_EAGLE_GPIO_NUMBER_4,
0210     MXL_EAGLE_GPIO_NUMBER_5,
0211     MXL_EAGLE_GPIO_NUMBER_6
0212 };
0213
0214 /* Enum of GPIO directions, used in GPIO direction configuration API */
0215 enum MXL_EAGLE_GPIO_DIRECTION_E {
0216     MXL_EAGLE_GPIO_DIRECTION_INPUT,
0217     MXL_EAGLE_GPIO_DIRECTION_OUTPUT
0218 };
0219
0220 /* Enum of GPIO level, used in device GPIO APIs */
0221 enum MXL_EAGLE_GPIO_LEVEL_E {
0222     MXL_EAGLE_GPIO_LEVEL_LOW,
0223     MXL_EAGLE_GPIO_LEVEL_HIGH,
0224 };
0225
0226 /* Enum of I/O Mux function, used in device I/O mux configuration API */
0227 enum MXL_EAGLE_IOMUX_FUNCTION_E {
0228     MXL_EAGLE_IOMUX_FUNC_FEC_LOCK,
0229     MXL_EAGLE_IOMUX_FUNC_MERR,
0230 };
0231
0232 /* Enum of MPEG Data format, used in MPEG and OOB output configuration */
0233 enum MXL_EAGLE_MPEG_DATA_FORMAT_E {
0234     MXL_EAGLE_DATA_SERIAL_LSB_1ST = 0,
0235     MXL_EAGLE_DATA_SERIAL_MSB_1ST,
0236
0237     MXL_EAGLE_DATA_SYNC_WIDTH_BIT = 0,
0238     MXL_EAGLE_DATA_SYNC_WIDTH_BYTE
0239 };
0240
0241 /* Enum of MPEG Clock format, used in MPEG and OOB output configuration */
0242 enum MXL_EAGLE_MPEG_CLOCK_FORMAT_E {
0243     MXL_EAGLE_CLOCK_ACTIVE_HIGH = 0,
0244     MXL_EAGLE_CLOCK_ACTIVE_LOW,
0245
0246     MXL_EAGLE_CLOCK_POSITIVE  = 0,
0247     MXL_EAGLE_CLOCK_NEGATIVE,
0248
0249     MXL_EAGLE_CLOCK_IN_PHASE = 0,
0250     MXL_EAGLE_CLOCK_INVERTED,
0251 };
0252
0253 /* Enum of MPEG Clock speeds, used in MPEG output configuration */
0254 enum MXL_EAGLE_MPEG_CLOCK_RATE_E {
0255     MXL_EAGLE_MPEG_CLOCK_54MHZ,
0256     MXL_EAGLE_MPEG_CLOCK_40_5MHZ,
0257     MXL_EAGLE_MPEG_CLOCK_27MHZ,
0258     MXL_EAGLE_MPEG_CLOCK_13_5MHZ,
0259 };
0260
0261 /* Enum of Interrupt mask bit, used in host interrupt configuration */
0262 enum MXL_EAGLE_INTR_MASK_BITS_E {
0263     MXL_EAGLE_INTR_MASK_DEMOD = 0,
0264     MXL_EAGLE_INTR_MASK_SMA_RX = 1,
0265     MXL_EAGLE_INTR_MASK_WDOG = 31
0266 };
0267
0268 /* Enum of QAM Demodulator type, used in QAM configuration */
0269 enum MXL_EAGLE_QAM_DEMOD_ANNEX_TYPE_E {
0270     MXL_EAGLE_QAM_DEMOD_ANNEX_B,    /* J.83B */
0271     MXL_EAGLE_QAM_DEMOD_ANNEX_A,    /* DVB-C */
0272 };
0273
0274 /* Enum of QAM Demodulator modulation, used in QAM configuration and status */
0275 enum MXL_EAGLE_QAM_DEMOD_QAM_TYPE_E {
0276     MXL_EAGLE_QAM_DEMOD_QAM16,
0277     MXL_EAGLE_QAM_DEMOD_QAM64,
0278     MXL_EAGLE_QAM_DEMOD_QAM256,
0279     MXL_EAGLE_QAM_DEMOD_QAM1024,
0280     MXL_EAGLE_QAM_DEMOD_QAM32,
0281     MXL_EAGLE_QAM_DEMOD_QAM128,
0282     MXL_EAGLE_QAM_DEMOD_QPSK,
0283     MXL_EAGLE_QAM_DEMOD_AUTO,
0284 };
0285
0286 /* Enum of Demodulator IQ setup, used in QAM, OOB configuration and status */
0287 enum MXL_EAGLE_IQ_FLIP_E {
0288     MXL_EAGLE_DEMOD_IQ_NORMAL,
0289     MXL_EAGLE_DEMOD_IQ_FLIPPED,
0290     MXL_EAGLE_DEMOD_IQ_AUTO,
0291 };
0292
0293 /* Enum of OOB Demodulator symbol rates, used in OOB configuration */
0294 enum MXL_EAGLE_OOB_DEMOD_SYMB_RATE_E {
0295     MXL_EAGLE_OOB_DEMOD_SYMB_RATE_0_772MHZ,  /* ANSI/SCTE 55-2 0.772 MHz */
0296     MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_024MHZ,  /* ANSI/SCTE 55-1 1.024 MHz */
0297     MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_544MHZ,  /* ANSI/SCTE 55-2 1.544 MHz */
0298 };
0299
0300 /* Enum of tuner channel tuning mode */
0301 enum MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_E {
0302     MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_VIEW,    /* Normal "view" mode */
0303     MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_SCAN,    /* Fast "scan" mode */
0304 };
0305
0306 /* Enum of tuner bandwidth */
0307 enum MXL_EAGLE_TUNER_BW_E {
0308     MXL_EAGLE_TUNER_BW_6MHZ,
0309     MXL_EAGLE_TUNER_BW_7MHZ,
0310     MXL_EAGLE_TUNER_BW_8MHZ,
0311 };
0312
0313 /* Enum of tuner bandwidth */
0314 enum MXL_EAGLE_JUNCTION_TEMPERATURE_E {
0315     MXL_EAGLE_JUNCTION_TEMPERATURE_BELOW_0_CELSIUS          = 0,
0316     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_0_TO_14_CELSIUS  = 1,
0317     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_14_TO_28_CELSIUS = 3,
0318     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_28_TO_42_CELSIUS = 2,
0319     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_42_TO_57_CELSIUS = 6,
0320     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_57_TO_71_CELSIUS = 7,
0321     MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_71_TO_85_CELSIUS = 5,
0322     MXL_EAGLE_JUNCTION_TEMPERATURE_ABOVE_85_CELSIUS         = 4,
0323 };
0324
0325 /* Struct passed in optional callback used during FW download */
0326 struct MXL_EAGLE_FW_DOWNLOAD_CB_PAYLOAD_T {
0327     u32  total_len;
0328     u32  downloaded_len;
0329 };
0330
0331 /* Struct used of I2C protocol between host and Eagle, internal use only */
0332 struct __packed MXL_EAGLE_HOST_MSG_HEADER_T {
0333     u8   opcode;
0334     u8   seqnum;
0335     u8   payload_size;
0336     u8   status;
0337     u32  checksum;
0338 };
0339
0340 /* Device version information struct */
0341 struct __packed MXL_EAGLE_DEV_VER_T {
0342     u8   chip_id;
0343     u8   firmware_ver[MXL_EAGLE_VERSION_SIZE];
0344     u8   mxlware_ver[MXL_EAGLE_VERSION_SIZE];
0345 };
0346
0347 /* Xtal configuration struct */
0348 struct __packed MXL_EAGLE_DEV_XTAL_T {
0349     u8   xtal_cap;           /* accepted range is 1..31 pF. Default is 26 */
0350     u8   clk_out_enable;
0351     u8   clk_out_div_enable;   /* clock out freq is xtal freq / 6 */
0352     u8   xtal_sharing_enable; /* if enabled set xtal_cap to 25 pF */
0353     u8   xtal_calibration_enable;  /* enable for master, disable for slave */
0354 };
0355
0356 /* GPIO direction struct, internally used in GPIO configuration API */
0357 struct __packed MXL_EAGLE_DEV_GPIO_DIRECTION_T {
0358     u8   gpio_number;
0359     u8   gpio_direction;
0360 };
0361
0362 /* GPO level struct, internally used in GPIO configuration API */
0363 struct __packed MXL_EAGLE_DEV_GPO_LEVEL_T {
0364     u8   gpio_number;
0365     u8   gpo_level;
0366 };
0367
0368 /* Device Status struct */
0369 struct MXL_EAGLE_DEV_STATUS_T {
0370     u8   temperature;
0371     u8   demod_type;
0372     u8   power_mode;
0373     u8   cpu_utilization_percent;
0374 };
0375
0376 /* Device interrupt configuration struct */
0377 struct __packed MXL_EAGLE_DEV_INTR_CFG_T {
0378     u32  intr_mask;
0379     u8   edge_trigger;
0380     u8   positive_trigger;
0381     u8   global_enable_interrupt;
0382 };
0383
0384 /* MPEG pad drive parameters, used on MPEG output configuration */
0385 /* See MXL_EAGLE_IO_MUX_DRIVE_MODE_E */
0386 struct MXL_EAGLE_MPEG_PAD_DRIVE_T {
0387     u8   pad_drv_mpeg_syn;
0388     u8   pad_drv_mpeg_dat;
0389     u8   pad_drv_mpeg_val;
0390     u8   pad_drv_mpeg_clk;
0391 };
0392
0393 /* MPEGOUT parameter struct, used in MPEG output configuration */
0394 struct MXL_EAGLE_MPEGOUT_PARAMS_T {
0395     u8   mpeg_parallel;
0396     u8   msb_first;
0397     u8   mpeg_sync_pulse_width;    /* See MXL_EAGLE_MPEG_DATA_FORMAT_E */
0398     u8   mpeg_valid_pol;
0399     u8   mpeg_sync_pol;
0400     u8   mpeg_clk_pol;
0401     u8   mpeg3wire_mode_enable;
0402     u8   mpeg_clk_freq;
0403     struct MXL_EAGLE_MPEG_PAD_DRIVE_T mpeg_pad_drv;
0404 };
0405
0406 /* QAM Demodulator parameters struct, used in QAM params configuration */
0407 struct __packed MXL_EAGLE_QAM_DEMOD_PARAMS_T {
0408     u8   annex_type;
0409     u8   qam_type;
0410     u8   iq_flip;
0411     u8   search_range_idx;
0412     u8   spur_canceller_enable;
0413     u32  symbol_rate_hz;
0414     u32  symbol_rate_256qam_hz;
0415 };
0416
0417 /* QAM Demodulator status */
0418 struct MXL_EAGLE_QAM_DEMOD_STATUS_T {
0419     u8   annex_type;
0420     u8   qam_type;
0421     u8   iq_flip;
0422     u8   interleaver_depth_i;
0423     u8   interleaver_depth_j;
0424     u8   qam_locked;
0425     u8   fec_locked;
0426     u8   mpeg_locked;
0427     u16  snr_db_tenths;
0428     s16  timing_offset;
0429     s32  carrier_offset_hz;
0430 };
0431
0432 /* QAM Demodulator error counters */
0433 struct MXL_EAGLE_QAM_DEMOD_ERROR_COUNTERS_T {
0434     u32  corrected_code_words;
0435     u32  uncorrected_code_words;
0436     u32  total_code_words_received;
0437     u32  corrected_bits;
0438     u32  error_mpeg_frames;
0439     u32  mpeg_frames_received;
0440     u32  erasures;
0441 };
0442
0443 /* QAM Demodulator constellation point */
0444 struct MXL_EAGLE_QAM_DEMOD_CONSTELLATION_VAL_T {
0445     s16  i_value[12];
0446     s16  q_value[12];
0447 };
0448
0449 /* QAM Demodulator equalizer filter taps */
0450 struct MXL_EAGLE_QAM_DEMOD_EQU_FILTER_T {
0451     s16  ffe_taps[MXL_EAGLE_QAM_FFE_TAPS_LENGTH];
0452     s16  spur_taps[MXL_EAGLE_QAM_SPUR_TAPS_LENGTH];
0453     s16  dfe_taps[MXL_EAGLE_QAM_DFE_TAPS_LENGTH];
0454     u8   ffe_leading_tap_index;
0455     u8   dfe_taps_number;
0456 };
0457
0458 /* OOB Demodulator parameters struct, used in OOB params configuration */
0459 struct __packed MXL_EAGLE_OOB_DEMOD_PARAMS_T {
0460     u8   symbol_rate;
0461     u8   iq_flip;
0462     u8   clk_pol;
0463 };
0464
0465 /* OOB Demodulator error counters */
0466 struct MXL_EAGLE_OOB_DEMOD_ERROR_COUNTERS_T {
0467     u32  corrected_packets;
0468     u32  uncorrected_packets;
0469     u32  total_packets_received;
0470 };
0471
0472 /* OOB status */
0473 struct __packed MXL_EAGLE_OOB_DEMOD_STATUS_T {
0474     u16  snr_db_tenths;
0475     s16  timing_offset;
0476     s32  carrier_offsetHz;
0477     u8   qam_locked;
0478     u8   fec_locked;
0479     u8   mpeg_locked;
0480     u8   retune_required;
0481     u8   iq_flip;
0482 };
0483
0484 /* ATSC Demodulator status */
0485 struct __packed MXL_EAGLE_ATSC_DEMOD_STATUS_T {
0486     s16  snr_db_tenths;
0487     s16  timing_offset;
0488     s32  carrier_offset_hz;
0489     u8   frame_lock;
0490     u8   atsc_lock;
0491     u8   fec_lock;
0492 };
0493
0494 /* ATSC Demodulator error counters */
0495 struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T {
0496     u32  error_packets;
0497     u32  total_packets;
0498     u32  error_bytes;
0499 };
0500
0501 /* ATSC Demodulator equalizers filter taps */
0502 struct __packed MXL_EAGLE_ATSC_DEMOD_EQU_FILTER_T {
0503     s16  ffe_taps[MXL_EAGLE_ATSC_FFE_TAPS_LENGTH];
0504     s8   dfe_taps[MXL_EAGLE_ATSC_DFE_TAPS_LENGTH];
0505 };
0506
0507 /* Tuner AGC Status */
0508 struct __packed MXL_EAGLE_TUNER_AGC_STATUS_T {
0509     u8   locked;
0510     u16  raw_agc_gain;    /* AGC gain [dB] = rawAgcGain / 2^6 */
0511     s16  rx_power_db_hundredths;
0512 };
0513
0514 /* Tuner channel tune parameters */
0515 struct __packed MXL_EAGLE_TUNER_CHANNEL_PARAMS_T {
0516     u32  freq_hz;
0517     u8   tune_mode;
0518     u8   bandwidth;
0519 };
0520
0521 /* Tuner channel lock indications */
0522 struct __packed MXL_EAGLE_TUNER_LOCK_STATUS_T {
0523     u8   rf_pll_locked;
0524     u8   ref_pll_locked;
0525 };
0526
0527 /* Smart antenna parameters  used in Smart antenna params configuration */
0528 struct __packed MXL_EAGLE_SMA_PARAMS_T {
0529     u8   full_duplex_enable;
0530     u8   rx_disable;
0531     u8   idle_logic_high;
0532 };
0533
0534 /* Smart antenna message format */
0535 struct __packed MXL_EAGLE_SMA_MESSAGE_T {
0536     u32  payload_bits;
0537     u8   total_num_bits;
0538 };
0539