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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Panasonic MN88473 DVB-T/T2/C demodulator driver
0004  *
0005  * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
0006  */
0007 
0008 #include "mn88473_priv.h"
0009 
0010 static int mn88473_get_tune_settings(struct dvb_frontend *fe,
0011                      struct dvb_frontend_tune_settings *s)
0012 {
0013     s->min_delay_ms = 1000;
0014     return 0;
0015 }
0016 
0017 static int mn88473_set_frontend(struct dvb_frontend *fe)
0018 {
0019     struct i2c_client *client = fe->demodulator_priv;
0020     struct mn88473_dev *dev = i2c_get_clientdata(client);
0021     struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0022     int ret, i;
0023     unsigned int uitmp;
0024     u32 if_frequency;
0025     u8 delivery_system_val, if_val[3], *conf_val_ptr;
0026     u8 reg_bank2_2d_val, reg_bank0_d2_val;
0027 
0028     dev_dbg(&client->dev,
0029         "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
0030         c->delivery_system, c->modulation, c->frequency,
0031         c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
0032 
0033     if (!dev->active) {
0034         ret = -EAGAIN;
0035         goto err;
0036     }
0037 
0038     switch (c->delivery_system) {
0039     case SYS_DVBT:
0040         delivery_system_val = 0x02;
0041         reg_bank2_2d_val = 0x23;
0042         reg_bank0_d2_val = 0x2a;
0043         break;
0044     case SYS_DVBT2:
0045         delivery_system_val = 0x03;
0046         reg_bank2_2d_val = 0x3b;
0047         reg_bank0_d2_val = 0x29;
0048         break;
0049     case SYS_DVBC_ANNEX_A:
0050         delivery_system_val = 0x04;
0051         reg_bank2_2d_val = 0x3b;
0052         reg_bank0_d2_val = 0x29;
0053         break;
0054     default:
0055         ret = -EINVAL;
0056         goto err;
0057     }
0058 
0059     switch (c->delivery_system) {
0060     case SYS_DVBT:
0061     case SYS_DVBT2:
0062         switch (c->bandwidth_hz) {
0063         case 6000000:
0064             conf_val_ptr = "\xe9\x55\x55\x1c\x29\x1c\x29";
0065             break;
0066         case 7000000:
0067             conf_val_ptr = "\xc8\x00\x00\x17\x0a\x17\x0a";
0068             break;
0069         case 8000000:
0070             conf_val_ptr = "\xaf\x00\x00\x11\xec\x11\xec";
0071             break;
0072         default:
0073             ret = -EINVAL;
0074             goto err;
0075         }
0076         break;
0077     case SYS_DVBC_ANNEX_A:
0078         conf_val_ptr = "\x10\xab\x0d\xae\x1d\x9d";
0079         break;
0080     default:
0081         break;
0082     }
0083 
0084     /* Program tuner */
0085     if (fe->ops.tuner_ops.set_params) {
0086         ret = fe->ops.tuner_ops.set_params(fe);
0087         if (ret)
0088             goto err;
0089     }
0090 
0091     if (fe->ops.tuner_ops.get_if_frequency) {
0092         ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
0093         if (ret)
0094             goto err;
0095 
0096         dev_dbg(&client->dev, "get_if_frequency=%u\n", if_frequency);
0097     } else {
0098         ret = -EINVAL;
0099         goto err;
0100     }
0101 
0102     /* Calculate IF registers */
0103     uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);
0104     if_val[0] = (uitmp >> 16) & 0xff;
0105     if_val[1] = (uitmp >>  8) & 0xff;
0106     if_val[2] = (uitmp >>  0) & 0xff;
0107 
0108     ret = regmap_write(dev->regmap[2], 0x05, 0x00);
0109     if (ret)
0110         goto err;
0111     ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
0112     if (ret)
0113         goto err;
0114     ret = regmap_write(dev->regmap[2], 0xef, 0x13);
0115     if (ret)
0116         goto err;
0117     ret = regmap_write(dev->regmap[2], 0xf9, 0x13);
0118     if (ret)
0119         goto err;
0120     ret = regmap_write(dev->regmap[2], 0x00, 0x18);
0121     if (ret)
0122         goto err;
0123     ret = regmap_write(dev->regmap[2], 0x01, 0x01);
0124     if (ret)
0125         goto err;
0126     ret = regmap_write(dev->regmap[2], 0x02, 0x21);
0127     if (ret)
0128         goto err;
0129     ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
0130     if (ret)
0131         goto err;
0132     ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
0133     if (ret)
0134         goto err;
0135 
0136     for (i = 0; i < sizeof(if_val); i++) {
0137         ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]);
0138         if (ret)
0139             goto err;
0140     }
0141 
0142     switch (c->delivery_system) {
0143     case SYS_DVBT:
0144     case SYS_DVBT2:
0145         for (i = 0; i < 7; i++) {
0146             ret = regmap_write(dev->regmap[2], 0x13 + i,
0147                        conf_val_ptr[i]);
0148             if (ret)
0149                 goto err;
0150         }
0151         break;
0152     case SYS_DVBC_ANNEX_A:
0153         ret = regmap_bulk_write(dev->regmap[1], 0x10, conf_val_ptr, 6);
0154         if (ret)
0155             goto err;
0156         break;
0157     default:
0158         break;
0159     }
0160 
0161     ret = regmap_write(dev->regmap[2], 0x2d, reg_bank2_2d_val);
0162     if (ret)
0163         goto err;
0164     ret = regmap_write(dev->regmap[2], 0x2e, 0x00);
0165     if (ret)
0166         goto err;
0167     ret = regmap_write(dev->regmap[2], 0x56, 0x0d);
0168     if (ret)
0169         goto err;
0170     ret = regmap_bulk_write(dev->regmap[0], 0x01,
0171                 "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
0172     if (ret)
0173         goto err;
0174     ret = regmap_write(dev->regmap[0], 0x0a, 0x1a);
0175     if (ret)
0176         goto err;
0177     ret = regmap_write(dev->regmap[0], 0x13, 0x1f);
0178     if (ret)
0179         goto err;
0180     ret = regmap_write(dev->regmap[0], 0x19, 0x03);
0181     if (ret)
0182         goto err;
0183     ret = regmap_write(dev->regmap[0], 0x1d, 0xb0);
0184     if (ret)
0185         goto err;
0186     ret = regmap_write(dev->regmap[0], 0x2a, 0x72);
0187     if (ret)
0188         goto err;
0189     ret = regmap_write(dev->regmap[0], 0x2d, 0x00);
0190     if (ret)
0191         goto err;
0192     ret = regmap_write(dev->regmap[0], 0x3c, 0x00);
0193     if (ret)
0194         goto err;
0195     ret = regmap_write(dev->regmap[0], 0x3f, 0xf8);
0196     if (ret)
0197         goto err;
0198     ret = regmap_bulk_write(dev->regmap[0], 0x40, "\xf4\x08", 2);
0199     if (ret)
0200         goto err;
0201     ret = regmap_write(dev->regmap[0], 0xd2, reg_bank0_d2_val);
0202     if (ret)
0203         goto err;
0204     ret = regmap_write(dev->regmap[0], 0xd4, 0x55);
0205     if (ret)
0206         goto err;
0207     ret = regmap_write(dev->regmap[1], 0xbe, 0x08);
0208     if (ret)
0209         goto err;
0210     ret = regmap_write(dev->regmap[0], 0xb2, 0x37);
0211     if (ret)
0212         goto err;
0213     ret = regmap_write(dev->regmap[0], 0xd7, 0x04);
0214     if (ret)
0215         goto err;
0216 
0217     /* PLP */
0218     if (c->delivery_system == SYS_DVBT2) {
0219         ret = regmap_write(dev->regmap[2], 0x36,
0220                 (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
0221                 c->stream_id );
0222         if (ret)
0223             goto err;
0224     }
0225 
0226     /* Reset FSM */
0227     ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
0228     if (ret)
0229         goto err;
0230 
0231     return 0;
0232 err:
0233     dev_dbg(&client->dev, "failed=%d\n", ret);
0234     return ret;
0235 }
0236 
0237 static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
0238 {
0239     struct i2c_client *client = fe->demodulator_priv;
0240     struct mn88473_dev *dev = i2c_get_clientdata(client);
0241     struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0242     int ret, i, stmp;
0243     unsigned int utmp, utmp1, utmp2;
0244     u8 buf[5];
0245 
0246     if (!dev->active) {
0247         ret = -EAGAIN;
0248         goto err;
0249     }
0250 
0251     /* Lock detection */
0252     switch (c->delivery_system) {
0253     case SYS_DVBT:
0254         ret = regmap_read(dev->regmap[0], 0x62, &utmp);
0255         if (ret)
0256             goto err;
0257 
0258         if (!(utmp & 0xa0)) {
0259             if ((utmp & 0x0f) >= 0x09)
0260                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0261                       FE_HAS_VITERBI | FE_HAS_SYNC |
0262                       FE_HAS_LOCK;
0263             else if ((utmp & 0x0f) >= 0x03)
0264                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
0265         } else {
0266             *status = 0;
0267         }
0268         break;
0269     case SYS_DVBT2:
0270         ret = regmap_read(dev->regmap[2], 0x8b, &utmp);
0271         if (ret)
0272             goto err;
0273 
0274         if (!(utmp & 0x40)) {
0275             if ((utmp & 0x0f) >= 0x0d)
0276                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0277                       FE_HAS_VITERBI | FE_HAS_SYNC |
0278                       FE_HAS_LOCK;
0279             else if ((utmp & 0x0f) >= 0x0a)
0280                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0281                       FE_HAS_VITERBI;
0282             else if ((utmp & 0x0f) >= 0x07)
0283                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
0284         } else {
0285             *status = 0;
0286         }
0287         break;
0288     case SYS_DVBC_ANNEX_A:
0289         ret = regmap_read(dev->regmap[1], 0x85, &utmp);
0290         if (ret)
0291             goto err;
0292 
0293         if (!(utmp & 0x40)) {
0294             ret = regmap_read(dev->regmap[1], 0x89, &utmp);
0295             if (ret)
0296                 goto err;
0297 
0298             if (utmp & 0x01)
0299                 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0300                         FE_HAS_VITERBI | FE_HAS_SYNC |
0301                         FE_HAS_LOCK;
0302         } else {
0303             *status = 0;
0304         }
0305         break;
0306     default:
0307         ret = -EINVAL;
0308         goto err;
0309     }
0310 
0311     /* Signal strength */
0312     if (*status & FE_HAS_SIGNAL) {
0313         for (i = 0; i < 2; i++) {
0314             ret = regmap_bulk_read(dev->regmap[2], 0x86 + i,
0315                            &buf[i], 1);
0316             if (ret)
0317                 goto err;
0318         }
0319 
0320         /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
0321         utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
0322         dev_dbg(&client->dev, "strength=%u\n", utmp1);
0323 
0324         c->strength.stat[0].scale = FE_SCALE_RELATIVE;
0325         c->strength.stat[0].uvalue = utmp1;
0326     } else {
0327         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0328     }
0329 
0330     /* CNR */
0331     if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
0332         /* DVB-T CNR */
0333         ret = regmap_bulk_read(dev->regmap[0], 0x8f, buf, 2);
0334         if (ret)
0335             goto err;
0336 
0337         utmp = buf[0] << 8 | buf[1] << 0;
0338         if (utmp) {
0339             /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
0340             /* log10(65536) = 80807124, 0.2 = 3355443 */
0341             stmp = div_u64(((u64)80807124 - intlog10(utmp)
0342                     + 3355443) * 10000, 1 << 24);
0343             dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
0344         } else {
0345             stmp = 0;
0346         }
0347 
0348         c->cnr.stat[0].svalue = stmp;
0349         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0350     } else if (*status & FE_HAS_VITERBI &&
0351            c->delivery_system == SYS_DVBT2) {
0352         /* DVB-T2 CNR */
0353         for (i = 0; i < 3; i++) {
0354             ret = regmap_bulk_read(dev->regmap[2], 0xb7 + i,
0355                            &buf[i], 1);
0356             if (ret)
0357                 goto err;
0358         }
0359 
0360         utmp = buf[1] << 8 | buf[2] << 0;
0361         utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
0362         if (utmp) {
0363             if (utmp1) {
0364                 /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
0365                 /* log10(16384) = 70706234, 0.6 = 10066330 */
0366                 stmp = div_u64(((u64)70706234 - intlog10(utmp)
0367                         - 10066330) * 10000, 1 << 24);
0368                 dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
0369                     stmp, utmp);
0370             } else {
0371                 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
0372                 /* log10(65536) = 80807124, 0.2 = 3355443 */
0373                 stmp = div_u64(((u64)80807124 - intlog10(utmp)
0374                         + 3355443) * 10000, 1 << 24);
0375                 dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
0376                     stmp, utmp);
0377             }
0378         } else {
0379             stmp = 0;
0380         }
0381 
0382         c->cnr.stat[0].svalue = stmp;
0383         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0384     } else if (*status & FE_HAS_VITERBI &&
0385            c->delivery_system == SYS_DVBC_ANNEX_A) {
0386         /* DVB-C CNR */
0387         ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
0388         if (ret)
0389             goto err;
0390 
0391         utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
0392         utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
0393         if (utmp1 && utmp2) {
0394             /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
0395             /* log10(8) = 15151336 */
0396             stmp = div_u64(((u64)15151336 + intlog10(utmp1)
0397                     - intlog10(utmp2)) * 10000, 1 << 24);
0398             dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
0399                 stmp, utmp1, utmp2);
0400         } else {
0401             stmp = 0;
0402         }
0403 
0404         c->cnr.stat[0].svalue = stmp;
0405         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0406     } else {
0407         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0408     }
0409 
0410     /* BER */
0411     if (*status & FE_HAS_LOCK && (c->delivery_system == SYS_DVBT ||
0412                       c->delivery_system == SYS_DVBC_ANNEX_A)) {
0413         /* DVB-T & DVB-C BER */
0414         ret = regmap_bulk_read(dev->regmap[0], 0x92, buf, 5);
0415         if (ret)
0416             goto err;
0417 
0418         utmp1 = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
0419         utmp2 = buf[3] << 8 | buf[4] << 0;
0420         utmp2 = utmp2 * 8 * 204;
0421         dev_dbg(&client->dev, "post_bit_error=%u post_bit_count=%u\n",
0422             utmp1, utmp2);
0423 
0424         c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
0425         c->post_bit_error.stat[0].uvalue += utmp1;
0426         c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
0427         c->post_bit_count.stat[0].uvalue += utmp2;
0428     } else {
0429         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0430         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0431     }
0432 
0433     /* PER */
0434     if (*status & FE_HAS_LOCK) {
0435         ret = regmap_bulk_read(dev->regmap[0], 0xdd, buf, 4);
0436         if (ret)
0437             goto err;
0438 
0439         utmp1 = buf[0] << 8 | buf[1] << 0;
0440         utmp2 = buf[2] << 8 | buf[3] << 0;
0441         dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
0442             utmp1, utmp2);
0443 
0444         c->block_error.stat[0].scale = FE_SCALE_COUNTER;
0445         c->block_error.stat[0].uvalue += utmp1;
0446         c->block_count.stat[0].scale = FE_SCALE_COUNTER;
0447         c->block_count.stat[0].uvalue += utmp2;
0448     } else {
0449         c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0450         c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0451     }
0452 
0453     return 0;
0454 err:
0455     dev_dbg(&client->dev, "failed=%d\n", ret);
0456     return ret;
0457 }
0458 
0459 static int mn88473_init(struct dvb_frontend *fe)
0460 {
0461     struct i2c_client *client = fe->demodulator_priv;
0462     struct mn88473_dev *dev = i2c_get_clientdata(client);
0463     struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0464     int ret, len, remain;
0465     unsigned int uitmp;
0466     const struct firmware *fw;
0467     const char *name = MN88473_FIRMWARE;
0468 
0469     dev_dbg(&client->dev, "\n");
0470 
0471     /* Check if firmware is already running */
0472     ret = regmap_read(dev->regmap[0], 0xf5, &uitmp);
0473     if (ret)
0474         goto err;
0475 
0476     if (!(uitmp & 0x01))
0477         goto warm;
0478 
0479     /* Request the firmware, this will block and timeout */
0480     ret = request_firmware(&fw, name, &client->dev);
0481     if (ret) {
0482         dev_err(&client->dev, "firmware file '%s' not found\n", name);
0483         goto err;
0484     }
0485 
0486     dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
0487 
0488     ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
0489     if (ret)
0490         goto err_release_firmware;
0491 
0492     for (remain = fw->size; remain > 0; remain -= (dev->i2c_wr_max - 1)) {
0493         len = min(dev->i2c_wr_max - 1, remain);
0494         ret = regmap_bulk_write(dev->regmap[0], 0xf6,
0495                     &fw->data[fw->size - remain], len);
0496         if (ret) {
0497             dev_err(&client->dev, "firmware download failed %d\n",
0498                 ret);
0499             goto err_release_firmware;
0500         }
0501     }
0502 
0503     release_firmware(fw);
0504 
0505     /* Parity check of firmware */
0506     ret = regmap_read(dev->regmap[0], 0xf8, &uitmp);
0507     if (ret)
0508         goto err;
0509 
0510     if (uitmp & 0x10) {
0511         dev_err(&client->dev, "firmware parity check failed\n");
0512         ret = -EINVAL;
0513         goto err;
0514     }
0515 
0516     ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
0517     if (ret)
0518         goto err;
0519 warm:
0520     /* TS config */
0521     ret = regmap_write(dev->regmap[2], 0x09, 0x08);
0522     if (ret)
0523         goto err;
0524     ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
0525     if (ret)
0526         goto err;
0527 
0528     dev->active = true;
0529 
0530     /* init stats here to indicate which stats are supported */
0531     c->strength.len = 1;
0532     c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0533     c->cnr.len = 1;
0534     c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0535     c->post_bit_error.len = 1;
0536     c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0537     c->post_bit_count.len = 1;
0538     c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0539     c->block_error.len = 1;
0540     c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0541     c->block_count.len = 1;
0542     c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0543 
0544     return 0;
0545 err_release_firmware:
0546     release_firmware(fw);
0547 err:
0548     dev_dbg(&client->dev, "failed=%d\n", ret);
0549     return ret;
0550 }
0551 
0552 static int mn88473_sleep(struct dvb_frontend *fe)
0553 {
0554     struct i2c_client *client = fe->demodulator_priv;
0555     struct mn88473_dev *dev = i2c_get_clientdata(client);
0556     int ret;
0557 
0558     dev_dbg(&client->dev, "\n");
0559 
0560     dev->active = false;
0561 
0562     ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
0563     if (ret)
0564         goto err;
0565 
0566     return 0;
0567 err:
0568     dev_dbg(&client->dev, "failed=%d\n", ret);
0569     return ret;
0570 }
0571 
0572 static const struct dvb_frontend_ops mn88473_ops = {
0573     .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
0574     .info = {
0575         .name = "Panasonic MN88473",
0576         .symbol_rate_min = 1000000,
0577         .symbol_rate_max = 7200000,
0578         .caps = FE_CAN_FEC_1_2                 |
0579             FE_CAN_FEC_2_3                 |
0580             FE_CAN_FEC_3_4                 |
0581             FE_CAN_FEC_5_6                 |
0582             FE_CAN_FEC_7_8                 |
0583             FE_CAN_FEC_AUTO                |
0584             FE_CAN_QPSK                    |
0585             FE_CAN_QAM_16                  |
0586             FE_CAN_QAM_32                  |
0587             FE_CAN_QAM_64                  |
0588             FE_CAN_QAM_128                 |
0589             FE_CAN_QAM_256                 |
0590             FE_CAN_QAM_AUTO                |
0591             FE_CAN_TRANSMISSION_MODE_AUTO  |
0592             FE_CAN_GUARD_INTERVAL_AUTO     |
0593             FE_CAN_HIERARCHY_AUTO          |
0594             FE_CAN_MUTE_TS                 |
0595             FE_CAN_2G_MODULATION           |
0596             FE_CAN_MULTISTREAM
0597     },
0598 
0599     .get_tune_settings = mn88473_get_tune_settings,
0600 
0601     .init = mn88473_init,
0602     .sleep = mn88473_sleep,
0603 
0604     .set_frontend = mn88473_set_frontend,
0605 
0606     .read_status = mn88473_read_status,
0607 };
0608 
0609 static int mn88473_probe(struct i2c_client *client,
0610              const struct i2c_device_id *id)
0611 {
0612     struct mn88473_config *config = client->dev.platform_data;
0613     struct mn88473_dev *dev;
0614     int ret;
0615     unsigned int uitmp;
0616     static const struct regmap_config regmap_config = {
0617         .reg_bits = 8,
0618         .val_bits = 8,
0619     };
0620 
0621     dev_dbg(&client->dev, "\n");
0622 
0623     /* Caller really need to provide pointer for frontend we create */
0624     if (config->fe == NULL) {
0625         dev_err(&client->dev, "frontend pointer not defined\n");
0626         ret = -EINVAL;
0627         goto err;
0628     }
0629 
0630     dev = kzalloc(sizeof(*dev), GFP_KERNEL);
0631     if (dev == NULL) {
0632         ret = -ENOMEM;
0633         goto err;
0634     }
0635 
0636     if (config->i2c_wr_max)
0637         dev->i2c_wr_max = config->i2c_wr_max;
0638     else
0639         dev->i2c_wr_max = ~0;
0640 
0641     if (config->xtal)
0642         dev->clk = config->xtal;
0643     else
0644         dev->clk = 25000000;
0645     dev->client[0] = client;
0646     dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
0647     if (IS_ERR(dev->regmap[0])) {
0648         ret = PTR_ERR(dev->regmap[0]);
0649         goto err_kfree;
0650     }
0651 
0652     /*
0653      * Chip has three I2C addresses for different register banks. Used
0654      * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
0655      * 0x1a and 0x1c, in order to get own I2C client for each register bank.
0656      *
0657      * Also, register bank 2 do not support sequential I/O. Only single
0658      * register write or read is allowed to that bank.
0659      */
0660     dev->client[1] = i2c_new_dummy_device(client->adapter, 0x1a);
0661     if (IS_ERR(dev->client[1])) {
0662         ret = PTR_ERR(dev->client[1]);
0663         dev_err(&client->dev, "I2C registration failed\n");
0664         goto err_regmap_0_regmap_exit;
0665     }
0666     dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
0667     if (IS_ERR(dev->regmap[1])) {
0668         ret = PTR_ERR(dev->regmap[1]);
0669         goto err_client_1_i2c_unregister_device;
0670     }
0671     i2c_set_clientdata(dev->client[1], dev);
0672 
0673     dev->client[2] = i2c_new_dummy_device(client->adapter, 0x1c);
0674     if (IS_ERR(dev->client[2])) {
0675         ret = PTR_ERR(dev->client[2]);
0676         dev_err(&client->dev, "2nd I2C registration failed\n");
0677         goto err_regmap_1_regmap_exit;
0678     }
0679     dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
0680     if (IS_ERR(dev->regmap[2])) {
0681         ret = PTR_ERR(dev->regmap[2]);
0682         goto err_client_2_i2c_unregister_device;
0683     }
0684     i2c_set_clientdata(dev->client[2], dev);
0685 
0686     /* Check demod answers with correct chip id */
0687     ret = regmap_read(dev->regmap[2], 0xff, &uitmp);
0688     if (ret)
0689         goto err_regmap_2_regmap_exit;
0690 
0691     dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
0692 
0693     if (uitmp != 0x03) {
0694         ret = -ENODEV;
0695         goto err_regmap_2_regmap_exit;
0696     }
0697 
0698     /* Sleep because chip is active by default */
0699     ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
0700     if (ret)
0701         goto err_regmap_2_regmap_exit;
0702 
0703     /* Create dvb frontend */
0704     memcpy(&dev->frontend.ops, &mn88473_ops, sizeof(dev->frontend.ops));
0705     dev->frontend.demodulator_priv = client;
0706     *config->fe = &dev->frontend;
0707     i2c_set_clientdata(client, dev);
0708 
0709     dev_info(&client->dev, "Panasonic MN88473 successfully identified\n");
0710 
0711     return 0;
0712 err_regmap_2_regmap_exit:
0713     regmap_exit(dev->regmap[2]);
0714 err_client_2_i2c_unregister_device:
0715     i2c_unregister_device(dev->client[2]);
0716 err_regmap_1_regmap_exit:
0717     regmap_exit(dev->regmap[1]);
0718 err_client_1_i2c_unregister_device:
0719     i2c_unregister_device(dev->client[1]);
0720 err_regmap_0_regmap_exit:
0721     regmap_exit(dev->regmap[0]);
0722 err_kfree:
0723     kfree(dev);
0724 err:
0725     dev_dbg(&client->dev, "failed=%d\n", ret);
0726     return ret;
0727 }
0728 
0729 static int mn88473_remove(struct i2c_client *client)
0730 {
0731     struct mn88473_dev *dev = i2c_get_clientdata(client);
0732 
0733     dev_dbg(&client->dev, "\n");
0734 
0735     regmap_exit(dev->regmap[2]);
0736     i2c_unregister_device(dev->client[2]);
0737 
0738     regmap_exit(dev->regmap[1]);
0739     i2c_unregister_device(dev->client[1]);
0740 
0741     regmap_exit(dev->regmap[0]);
0742 
0743     kfree(dev);
0744 
0745     return 0;
0746 }
0747 
0748 static const struct i2c_device_id mn88473_id_table[] = {
0749     {"mn88473", 0},
0750     {}
0751 };
0752 MODULE_DEVICE_TABLE(i2c, mn88473_id_table);
0753 
0754 static struct i2c_driver mn88473_driver = {
0755     .driver = {
0756         .name            = "mn88473",
0757         .suppress_bind_attrs = true,
0758     },
0759     .probe      = mn88473_probe,
0760     .remove     = mn88473_remove,
0761     .id_table   = mn88473_id_table,
0762 };
0763 
0764 module_i2c_driver(mn88473_driver);
0765 
0766 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
0767 MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
0768 MODULE_LICENSE("GPL");
0769 MODULE_FIRMWARE(MN88473_FIRMWARE);
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