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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
0004 
0005     Copyright (C) Manu Abraham (abraham.manu@gmail.com)
0006 
0007 */
0008 
0009 #include <linux/init.h>
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/moduleparam.h>
0013 #include <linux/slab.h>
0014 
0015 #include <media/dvb_frontend.h>
0016 #include "mb86a16.h"
0017 #include "mb86a16_priv.h"
0018 
0019 static unsigned int verbose = 5;
0020 module_param(verbose, int, 0644);
0021 
0022 struct mb86a16_state {
0023     struct i2c_adapter      *i2c_adap;
0024     const struct mb86a16_config *config;
0025     struct dvb_frontend     frontend;
0026 
0027     /* tuning parameters */
0028     int             frequency;
0029     int             srate;
0030 
0031     /* Internal stuff */
0032     int             master_clk;
0033     int             deci;
0034     int             csel;
0035     int             rsel;
0036 };
0037 
0038 #define MB86A16_ERROR       0
0039 #define MB86A16_NOTICE      1
0040 #define MB86A16_INFO        2
0041 #define MB86A16_DEBUG       3
0042 
0043 #define dprintk(x, y, z, format, arg...) do {                       \
0044     if (z) {                                    \
0045         if  ((x > MB86A16_ERROR) && (x > y))                \
0046             printk(KERN_ERR "%s: " format "\n", __func__, ##arg);       \
0047         else if ((x > MB86A16_NOTICE) && (x > y))               \
0048             printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg);    \
0049         else if ((x > MB86A16_INFO) && (x > y))                 \
0050             printk(KERN_INFO "%s: " format "\n", __func__, ##arg);      \
0051         else if ((x > MB86A16_DEBUG) && (x > y))                \
0052             printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg);     \
0053     } else {                                    \
0054         if (x > y)                              \
0055             printk(format, ##arg);                      \
0056     }                                       \
0057 } while (0)
0058 
0059 #define TRACE_IN    dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
0060 #define TRACE_OUT   dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
0061 
0062 static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val)
0063 {
0064     int ret;
0065     u8 buf[] = { reg, val };
0066 
0067     struct i2c_msg msg = {
0068         .addr = state->config->demod_address,
0069         .flags = 0,
0070         .buf = buf,
0071         .len = 2
0072     };
0073 
0074     dprintk(verbose, MB86A16_DEBUG, 1,
0075         "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]",
0076         state->config->demod_address, buf[0], buf[1]);
0077 
0078     ret = i2c_transfer(state->i2c_adap, &msg, 1);
0079 
0080     return (ret != 1) ? -EREMOTEIO : 0;
0081 }
0082 
0083 static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
0084 {
0085     int ret;
0086     u8 b0[] = { reg };
0087     u8 b1[] = { 0 };
0088 
0089     struct i2c_msg msg[] = {
0090         {
0091             .addr = state->config->demod_address,
0092             .flags = 0,
0093             .buf = b0,
0094             .len = 1
0095         }, {
0096             .addr = state->config->demod_address,
0097             .flags = I2C_M_RD,
0098             .buf = b1,
0099             .len = 1
0100         }
0101     };
0102     ret = i2c_transfer(state->i2c_adap, msg, 2);
0103     if (ret != 2) {
0104         dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=%i)",
0105             reg, ret);
0106 
0107         if (ret < 0)
0108             return ret;
0109         return -EREMOTEIO;
0110     }
0111     *val = b1[0];
0112 
0113     return ret;
0114 }
0115 
0116 static int CNTM_set(struct mb86a16_state *state,
0117             unsigned char timint1,
0118             unsigned char timint2,
0119             unsigned char cnext)
0120 {
0121     unsigned char val;
0122 
0123     val = (timint1 << 4) | (timint2 << 2) | cnext;
0124     if (mb86a16_write(state, MB86A16_CNTMR, val) < 0)
0125         goto err;
0126 
0127     return 0;
0128 
0129 err:
0130     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0131     return -EREMOTEIO;
0132 }
0133 
0134 static int smrt_set(struct mb86a16_state *state, int rate)
0135 {
0136     int tmp ;
0137     int m ;
0138     unsigned char STOFS0, STOFS1;
0139 
0140     m = 1 << state->deci;
0141     tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
0142 
0143     STOFS0 = tmp & 0x0ff;
0144     STOFS1 = (tmp & 0xf00) >> 8;
0145 
0146     if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
0147                        (state->csel << 1) |
0148                     state->rsel) < 0)
0149         goto err;
0150     if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0)
0151         goto err;
0152     if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0)
0153         goto err;
0154 
0155     return 0;
0156 err:
0157     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0158     return -1;
0159 }
0160 
0161 static int srst(struct mb86a16_state *state)
0162 {
0163     if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0)
0164         goto err;
0165 
0166     return 0;
0167 err:
0168     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0169     return -EREMOTEIO;
0170 
0171 }
0172 
0173 static int afcex_data_set(struct mb86a16_state *state,
0174               unsigned char AFCEX_L,
0175               unsigned char AFCEX_H)
0176 {
0177     if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0)
0178         goto err;
0179     if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0)
0180         goto err;
0181 
0182     return 0;
0183 err:
0184     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0185 
0186     return -1;
0187 }
0188 
0189 static int afcofs_data_set(struct mb86a16_state *state,
0190                unsigned char AFCEX_L,
0191                unsigned char AFCEX_H)
0192 {
0193     if (mb86a16_write(state, 0x58, AFCEX_L) < 0)
0194         goto err;
0195     if (mb86a16_write(state, 0x59, AFCEX_H) < 0)
0196         goto err;
0197 
0198     return 0;
0199 err:
0200     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0201     return -EREMOTEIO;
0202 }
0203 
0204 static int stlp_set(struct mb86a16_state *state,
0205             unsigned char STRAS,
0206             unsigned char STRBS)
0207 {
0208     if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0)
0209         goto err;
0210 
0211     return 0;
0212 err:
0213     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0214     return -EREMOTEIO;
0215 }
0216 
0217 static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
0218 {
0219     if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0)
0220         goto err;
0221     if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0)
0222         goto err;
0223 
0224     return 0;
0225 err:
0226     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0227     return -EREMOTEIO;
0228 }
0229 
0230 static int initial_set(struct mb86a16_state *state)
0231 {
0232     if (stlp_set(state, 5, 7))
0233         goto err;
0234 
0235     udelay(100);
0236     if (afcex_data_set(state, 0, 0))
0237         goto err;
0238 
0239     udelay(100);
0240     if (afcofs_data_set(state, 0, 0))
0241         goto err;
0242 
0243     udelay(100);
0244     if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0)
0245         goto err;
0246     if (mb86a16_write(state, 0x2f, 0x21) < 0)
0247         goto err;
0248     if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0)
0249         goto err;
0250     if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0)
0251         goto err;
0252     if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0)
0253         goto err;
0254     if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0)
0255         goto err;
0256     if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0)
0257         goto err;
0258     if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0)
0259         goto err;
0260     if (mb86a16_write(state, 0x54, 0xff) < 0)
0261         goto err;
0262     if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0)
0263         goto err;
0264 
0265     return 0;
0266 
0267 err:
0268     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0269     return -EREMOTEIO;
0270 }
0271 
0272 static int S01T_set(struct mb86a16_state *state,
0273             unsigned char s1t,
0274             unsigned s0t)
0275 {
0276     if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0)
0277         goto err;
0278 
0279     return 0;
0280 err:
0281     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0282     return -EREMOTEIO;
0283 }
0284 
0285 
0286 static int EN_set(struct mb86a16_state *state,
0287           int cren,
0288           int afcen)
0289 {
0290     unsigned char val;
0291 
0292     val = 0x7a | (cren << 7) | (afcen << 2);
0293     if (mb86a16_write(state, 0x49, val) < 0)
0294         goto err;
0295 
0296     return 0;
0297 err:
0298     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0299     return -EREMOTEIO;
0300 }
0301 
0302 static int AFCEXEN_set(struct mb86a16_state *state,
0303                int afcexen,
0304                int smrt)
0305 {
0306     unsigned char AFCA ;
0307 
0308     if (smrt > 18875)
0309         AFCA = 4;
0310     else if (smrt > 9375)
0311         AFCA = 3;
0312     else if (smrt > 2250)
0313         AFCA = 2;
0314     else
0315         AFCA = 1;
0316 
0317     if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0)
0318         goto err;
0319 
0320     return 0;
0321 
0322 err:
0323     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0324     return -EREMOTEIO;
0325 }
0326 
0327 static int DAGC_data_set(struct mb86a16_state *state,
0328              unsigned char DAGCA,
0329              unsigned char DAGCW)
0330 {
0331     if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0)
0332         goto err;
0333 
0334     return 0;
0335 
0336 err:
0337     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0338     return -EREMOTEIO;
0339 }
0340 
0341 static void smrt_info_get(struct mb86a16_state *state, int rate)
0342 {
0343     if (rate >= 37501) {
0344         state->deci = 0; state->csel = 0; state->rsel = 0;
0345     } else if (rate >= 30001) {
0346         state->deci = 0; state->csel = 0; state->rsel = 1;
0347     } else if (rate >= 26251) {
0348         state->deci = 0; state->csel = 1; state->rsel = 0;
0349     } else if (rate >= 22501) {
0350         state->deci = 0; state->csel = 1; state->rsel = 1;
0351     } else if (rate >= 18751) {
0352         state->deci = 1; state->csel = 0; state->rsel = 0;
0353     } else if (rate >= 15001) {
0354         state->deci = 1; state->csel = 0; state->rsel = 1;
0355     } else if (rate >= 13126) {
0356         state->deci = 1; state->csel = 1; state->rsel = 0;
0357     } else if (rate >= 11251) {
0358         state->deci = 1; state->csel = 1; state->rsel = 1;
0359     } else if (rate >= 9376) {
0360         state->deci = 2; state->csel = 0; state->rsel = 0;
0361     } else if (rate >= 7501) {
0362         state->deci = 2; state->csel = 0; state->rsel = 1;
0363     } else if (rate >= 6563) {
0364         state->deci = 2; state->csel = 1; state->rsel = 0;
0365     } else if (rate >= 5626) {
0366         state->deci = 2; state->csel = 1; state->rsel = 1;
0367     } else if (rate >= 4688) {
0368         state->deci = 3; state->csel = 0; state->rsel = 0;
0369     } else if (rate >= 3751) {
0370         state->deci = 3; state->csel = 0; state->rsel = 1;
0371     } else if (rate >= 3282) {
0372         state->deci = 3; state->csel = 1; state->rsel = 0;
0373     } else if (rate >= 2814) {
0374         state->deci = 3; state->csel = 1; state->rsel = 1;
0375     } else if (rate >= 2344) {
0376         state->deci = 4; state->csel = 0; state->rsel = 0;
0377     } else if (rate >= 1876) {
0378         state->deci = 4; state->csel = 0; state->rsel = 1;
0379     } else if (rate >= 1641) {
0380         state->deci = 4; state->csel = 1; state->rsel = 0;
0381     } else if (rate >= 1407) {
0382         state->deci = 4; state->csel = 1; state->rsel = 1;
0383     } else if (rate >= 1172) {
0384         state->deci = 5; state->csel = 0; state->rsel = 0;
0385     } else if (rate >=  939) {
0386         state->deci = 5; state->csel = 0; state->rsel = 1;
0387     } else if (rate >=  821) {
0388         state->deci = 5; state->csel = 1; state->rsel = 0;
0389     } else {
0390         state->deci = 5; state->csel = 1; state->rsel = 1;
0391     }
0392 
0393     if (state->csel == 0)
0394         state->master_clk = 92000;
0395     else
0396         state->master_clk = 61333;
0397 
0398 }
0399 
0400 static int signal_det(struct mb86a16_state *state,
0401               int smrt,
0402               unsigned char *SIG)
0403 {
0404     int ret;
0405     int smrtd;
0406     unsigned char S[3];
0407     int i;
0408 
0409     if (*SIG > 45) {
0410         if (CNTM_set(state, 2, 1, 2) < 0) {
0411             dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
0412             return -1;
0413         }
0414     } else {
0415         if (CNTM_set(state, 3, 1, 2) < 0) {
0416             dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
0417             return -1;
0418         }
0419     }
0420     for (i = 0; i < 3; i++) {
0421         if (i == 0)
0422             smrtd = smrt * 98 / 100;
0423         else if (i == 1)
0424             smrtd = smrt;
0425         else
0426             smrtd = smrt * 102 / 100;
0427         smrt_info_get(state, smrtd);
0428         smrt_set(state, smrtd);
0429         srst(state);
0430         msleep_interruptible(10);
0431         if (mb86a16_read(state, 0x37, &(S[i])) != 2) {
0432             dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0433             return -EREMOTEIO;
0434         }
0435     }
0436     if ((S[1] > S[0] * 112 / 100) && (S[1] > S[2] * 112 / 100))
0437         ret = 1;
0438     else
0439         ret = 0;
0440 
0441     *SIG = S[1];
0442 
0443     if (CNTM_set(state, 0, 1, 2) < 0) {
0444         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
0445         return -1;
0446     }
0447 
0448     return ret;
0449 }
0450 
0451 static int rf_val_set(struct mb86a16_state *state,
0452               int f,
0453               int smrt,
0454               unsigned char R)
0455 {
0456     unsigned char C, F, B;
0457     int M;
0458     unsigned char rf_val[5];
0459     int ack = -1;
0460 
0461     if (smrt > 37750)
0462         C = 1;
0463     else if (smrt > 18875)
0464         C = 2;
0465     else if (smrt > 5500)
0466         C = 3;
0467     else
0468         C = 4;
0469 
0470     if (smrt > 30500)
0471         F = 3;
0472     else if (smrt > 9375)
0473         F = 1;
0474     else if (smrt > 4625)
0475         F = 0;
0476     else
0477         F = 2;
0478 
0479     if (f < 1060)
0480         B = 0;
0481     else if (f < 1175)
0482         B = 1;
0483     else if (f < 1305)
0484         B = 2;
0485     else if (f < 1435)
0486         B = 3;
0487     else if (f < 1570)
0488         B = 4;
0489     else if (f < 1715)
0490         B = 5;
0491     else if (f < 1845)
0492         B = 6;
0493     else if (f < 1980)
0494         B = 7;
0495     else if (f < 2080)
0496         B = 8;
0497     else
0498         B = 9;
0499 
0500     M = f * (1 << R) / 2;
0501 
0502     rf_val[0] = 0x01 | (C << 3) | (F << 1);
0503     rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12);
0504     rf_val[2] = (M & 0x00ff0) >> 4;
0505     rf_val[3] = ((M & 0x0000f) << 4) | B;
0506 
0507     /* Frequency Set */
0508     if (mb86a16_write(state, 0x21, rf_val[0]) < 0)
0509         ack = 0;
0510     if (mb86a16_write(state, 0x22, rf_val[1]) < 0)
0511         ack = 0;
0512     if (mb86a16_write(state, 0x23, rf_val[2]) < 0)
0513         ack = 0;
0514     if (mb86a16_write(state, 0x24, rf_val[3]) < 0)
0515         ack = 0;
0516     if (mb86a16_write(state, 0x25, 0x01) < 0)
0517         ack = 0;
0518     if (ack == 0) {
0519         dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
0520         return -EREMOTEIO;
0521     }
0522 
0523     return 0;
0524 }
0525 
0526 static int afcerr_chk(struct mb86a16_state *state)
0527 {
0528     unsigned char AFCM_L, AFCM_H ;
0529     int AFCM ;
0530     int afcm, afcerr ;
0531 
0532     if (mb86a16_read(state, 0x0e, &AFCM_L) != 2)
0533         goto err;
0534     if (mb86a16_read(state, 0x0f, &AFCM_H) != 2)
0535         goto err;
0536 
0537     AFCM = (AFCM_H << 8) + AFCM_L;
0538 
0539     if (AFCM > 2048)
0540         afcm = AFCM - 4096;
0541     else
0542         afcm = AFCM;
0543     afcerr = afcm * state->master_clk / 8192;
0544 
0545     return afcerr;
0546 
0547 err:
0548     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0549     return -EREMOTEIO;
0550 }
0551 
0552 static int dagcm_val_get(struct mb86a16_state *state)
0553 {
0554     int DAGCM;
0555     unsigned char DAGCM_H, DAGCM_L;
0556 
0557     if (mb86a16_read(state, 0x45, &DAGCM_L) != 2)
0558         goto err;
0559     if (mb86a16_read(state, 0x46, &DAGCM_H) != 2)
0560         goto err;
0561 
0562     DAGCM = (DAGCM_H << 8) + DAGCM_L;
0563 
0564     return DAGCM;
0565 
0566 err:
0567     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0568     return -EREMOTEIO;
0569 }
0570 
0571 static int mb86a16_read_status(struct dvb_frontend *fe, enum fe_status *status)
0572 {
0573     u8 stat, stat2;
0574     struct mb86a16_state *state = fe->demodulator_priv;
0575 
0576     *status = 0;
0577 
0578     if (mb86a16_read(state, MB86A16_SIG1, &stat) != 2)
0579         goto err;
0580     if (mb86a16_read(state, MB86A16_SIG2, &stat2) != 2)
0581         goto err;
0582     if ((stat > 25) && (stat2 > 25))
0583         *status |= FE_HAS_SIGNAL;
0584     if ((stat > 45) && (stat2 > 45))
0585         *status |= FE_HAS_CARRIER;
0586 
0587     if (mb86a16_read(state, MB86A16_STATUS, &stat) != 2)
0588         goto err;
0589 
0590     if (stat & 0x01)
0591         *status |= FE_HAS_SYNC;
0592     if (stat & 0x01)
0593         *status |= FE_HAS_VITERBI;
0594 
0595     if (mb86a16_read(state, MB86A16_FRAMESYNC, &stat) != 2)
0596         goto err;
0597 
0598     if ((stat & 0x0f) && (*status & FE_HAS_VITERBI))
0599         *status |= FE_HAS_LOCK;
0600 
0601     return 0;
0602 
0603 err:
0604     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0605     return -EREMOTEIO;
0606 }
0607 
0608 static int sync_chk(struct mb86a16_state *state,
0609             unsigned char *VIRM)
0610 {
0611     unsigned char val;
0612     int sync;
0613 
0614     if (mb86a16_read(state, 0x0d, &val) != 2)
0615         goto err;
0616 
0617     dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val);
0618     sync = val & 0x01;
0619     *VIRM = (val & 0x1c) >> 2;
0620 
0621     return sync;
0622 err:
0623     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0624     *VIRM = 0;
0625     return -EREMOTEIO;
0626 
0627 }
0628 
0629 static int freqerr_chk(struct mb86a16_state *state,
0630                int fTP,
0631                int smrt,
0632                int unit)
0633 {
0634     unsigned char CRM, AFCML, AFCMH;
0635     unsigned char temp1, temp2, temp3;
0636     int crm, afcm, AFCM;
0637     int crrerr, afcerr;     /* kHz */
0638     int frqerr;         /* MHz */
0639     int afcen, afcexen = 0;
0640     int R, M, fOSC, fOSC_OFS;
0641 
0642     if (mb86a16_read(state, 0x43, &CRM) != 2)
0643         goto err;
0644 
0645     if (CRM > 127)
0646         crm = CRM - 256;
0647     else
0648         crm = CRM;
0649 
0650     crrerr = smrt * crm / 256;
0651     if (mb86a16_read(state, 0x49, &temp1) != 2)
0652         goto err;
0653 
0654     afcen = (temp1 & 0x04) >> 2;
0655     if (afcen == 0) {
0656         if (mb86a16_read(state, 0x2a, &temp1) != 2)
0657             goto err;
0658         afcexen = (temp1 & 0x20) >> 5;
0659     }
0660 
0661     if (afcen == 1) {
0662         if (mb86a16_read(state, 0x0e, &AFCML) != 2)
0663             goto err;
0664         if (mb86a16_read(state, 0x0f, &AFCMH) != 2)
0665             goto err;
0666     } else if (afcexen == 1) {
0667         if (mb86a16_read(state, 0x2b, &AFCML) != 2)
0668             goto err;
0669         if (mb86a16_read(state, 0x2c, &AFCMH) != 2)
0670             goto err;
0671     }
0672     if ((afcen == 1) || (afcexen == 1)) {
0673         smrt_info_get(state, smrt);
0674         AFCM = ((AFCMH & 0x01) << 8) + AFCML;
0675         if (AFCM > 255)
0676             afcm = AFCM - 512;
0677         else
0678             afcm = AFCM;
0679 
0680         afcerr = afcm * state->master_clk / 8192;
0681     } else
0682         afcerr = 0;
0683 
0684     if (mb86a16_read(state, 0x22, &temp1) != 2)
0685         goto err;
0686     if (mb86a16_read(state, 0x23, &temp2) != 2)
0687         goto err;
0688     if (mb86a16_read(state, 0x24, &temp3) != 2)
0689         goto err;
0690 
0691     R = (temp1 & 0xe0) >> 5;
0692     M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4);
0693     if (R == 0)
0694         fOSC = 2 * M;
0695     else
0696         fOSC = M;
0697 
0698     fOSC_OFS = fOSC - fTP;
0699 
0700     if (unit == 0) {    /* MHz */
0701         if (crrerr + afcerr + fOSC_OFS * 1000 >= 0)
0702             frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000;
0703         else
0704             frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
0705     } else {    /* kHz */
0706         frqerr = crrerr + afcerr + fOSC_OFS * 1000;
0707     }
0708 
0709     return frqerr;
0710 err:
0711     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0712     return -EREMOTEIO;
0713 }
0714 
0715 static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt)
0716 {
0717     unsigned char R;
0718 
0719     if (smrt > 9375)
0720         R = 0;
0721     else
0722         R = 1;
0723 
0724     return R;
0725 }
0726 
0727 static void swp_info_get(struct mb86a16_state *state,
0728              int fOSC_start,
0729              int smrt,
0730              int v, int R,
0731              int swp_ofs,
0732              int *fOSC,
0733              int *afcex_freq,
0734              unsigned char *AFCEX_L,
0735              unsigned char *AFCEX_H)
0736 {
0737     int AFCEX ;
0738     int crnt_swp_freq ;
0739 
0740     crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs;
0741 
0742     if (R == 0)
0743         *fOSC = (crnt_swp_freq + 1000) / 2000 * 2;
0744     else
0745         *fOSC = (crnt_swp_freq + 500) / 1000;
0746 
0747     if (*fOSC >= crnt_swp_freq)
0748         *afcex_freq = *fOSC * 1000 - crnt_swp_freq;
0749     else
0750         *afcex_freq = crnt_swp_freq - *fOSC * 1000;
0751 
0752     AFCEX = *afcex_freq * 8192 / state->master_clk;
0753     *AFCEX_L =  AFCEX & 0x00ff;
0754     *AFCEX_H = (AFCEX & 0x0f00) >> 8;
0755 }
0756 
0757 
0758 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V,  int vmax, int vmin,
0759                    int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1)
0760 {
0761     int swp_freq ;
0762 
0763     if ((i % 2 == 1) && (v <= vmax)) {
0764         /* positive v (case 1) */
0765         if ((v - 1 == vmin)             &&
0766             (*(V + 30 + v) >= 0)            &&
0767             (*(V + 30 + v - 1) >= 0)            &&
0768             (*(V + 30 + v - 1) > *(V + 30 + v))     &&
0769             (*(V + 30 + v - 1) > SIGMIN)) {
0770 
0771             swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
0772             *SIG1 = *(V + 30 + v - 1);
0773         } else if ((v == vmax)              &&
0774                (*(V + 30 + v) >= 0)         &&
0775                (*(V + 30 + v - 1) >= 0)     &&
0776                (*(V + 30 + v) > *(V + 30 + v - 1))  &&
0777                (*(V + 30 + v) > SIGMIN)) {
0778             /* (case 2) */
0779             swp_freq = fOSC * 1000 + afcex_freq;
0780             *SIG1 = *(V + 30 + v);
0781         } else if ((*(V + 30 + v) > 0)          &&
0782                (*(V + 30 + v - 1) > 0)      &&
0783                (*(V + 30 + v - 2) > 0)      &&
0784                (*(V + 30 + v - 3) > 0)      &&
0785                (*(V + 30 + v - 1) > *(V + 30 + v))  &&
0786                (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
0787                ((*(V + 30 + v - 1) > SIGMIN)    ||
0788                (*(V + 30 + v - 2) > SIGMIN))) {
0789             /* (case 3) */
0790             if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
0791                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
0792                 *SIG1 = *(V + 30 + v - 1);
0793             } else {
0794                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
0795                 *SIG1 = *(V + 30 + v - 2);
0796             }
0797         } else if ((v == vmax)              &&
0798                (*(V + 30 + v) >= 0)         &&
0799                (*(V + 30 + v - 1) >= 0)     &&
0800                (*(V + 30 + v - 2) >= 0)     &&
0801                (*(V + 30 + v) > *(V + 30 + v - 2))  &&
0802                (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
0803                ((*(V + 30 + v) > SIGMIN)        ||
0804                (*(V + 30 + v - 1) > SIGMIN))) {
0805             /* (case 4) */
0806             if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
0807                 swp_freq = fOSC * 1000 + afcex_freq;
0808                 *SIG1 = *(V + 30 + v);
0809             } else {
0810                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
0811                 *SIG1 = *(V + 30 + v - 1);
0812             }
0813         } else  {
0814             swp_freq = -1 ;
0815         }
0816     } else if ((i % 2 == 0) && (v >= vmin)) {
0817         /* Negative v (case 1) */
0818         if ((*(V + 30 + v) > 0)             &&
0819             (*(V + 30 + v + 1) > 0)         &&
0820             (*(V + 30 + v + 2) > 0)         &&
0821             (*(V + 30 + v + 1) > *(V + 30 + v))     &&
0822             (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
0823             (*(V + 30 + v + 1) > SIGMIN)) {
0824 
0825             swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
0826             *SIG1 = *(V + 30 + v + 1);
0827         } else if ((v + 1 == vmax)          &&
0828                (*(V + 30 + v) >= 0)         &&
0829                (*(V + 30 + v + 1) >= 0)     &&
0830                (*(V + 30 + v + 1) > *(V + 30 + v))  &&
0831                (*(V + 30 + v + 1) > SIGMIN)) {
0832             /* (case 2) */
0833             swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
0834             *SIG1 = *(V + 30 + v);
0835         } else if ((v == vmin)              &&
0836                (*(V + 30 + v) > 0)          &&
0837                (*(V + 30 + v + 1) > 0)      &&
0838                (*(V + 30 + v + 2) > 0)      &&
0839                (*(V + 30 + v) > *(V + 30 + v + 1))  &&
0840                (*(V + 30 + v) > *(V + 30 + v + 2))  &&
0841                (*(V + 30 + v) > SIGMIN)) {
0842             /* (case 3) */
0843             swp_freq = fOSC * 1000 + afcex_freq;
0844             *SIG1 = *(V + 30 + v);
0845         } else if ((*(V + 30 + v) >= 0)         &&
0846                (*(V + 30 + v + 1) >= 0)     &&
0847                (*(V + 30 + v + 2) >= 0)     &&
0848                (*(V + 30 + v + 3) >= 0)     &&
0849                (*(V + 30 + v + 1) > *(V + 30 + v))  &&
0850                (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
0851                ((*(V + 30 + v + 1) > SIGMIN)    ||
0852                 (*(V + 30 + v + 2) > SIGMIN))) {
0853             /* (case 4) */
0854             if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
0855                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
0856                 *SIG1 = *(V + 30 + v + 1);
0857             } else {
0858                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
0859                 *SIG1 = *(V + 30 + v + 2);
0860             }
0861         } else if ((*(V + 30 + v) >= 0)         &&
0862                (*(V + 30 + v + 1) >= 0)     &&
0863                (*(V + 30 + v + 2) >= 0)     &&
0864                (*(V + 30 + v + 3) >= 0)     &&
0865                (*(V + 30 + v) > *(V + 30 + v + 2))  &&
0866                (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
0867                (*(V + 30 + v) > *(V + 30 + v + 3))  &&
0868                (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
0869                ((*(V + 30 + v) > SIGMIN)        ||
0870                 (*(V + 30 + v + 1) > SIGMIN))) {
0871             /* (case 5) */
0872             if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
0873                 swp_freq = fOSC * 1000 + afcex_freq;
0874                 *SIG1 = *(V + 30 + v);
0875             } else {
0876                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
0877                 *SIG1 = *(V + 30 + v + 1);
0878             }
0879         } else if ((v + 2 == vmin)          &&
0880                (*(V + 30 + v) >= 0)         &&
0881                (*(V + 30 + v + 1) >= 0)     &&
0882                (*(V + 30 + v + 2) >= 0)     &&
0883                (*(V + 30 + v + 1) > *(V + 30 + v))  &&
0884                (*(V + 30 + v + 2) > *(V + 30 + v))  &&
0885                ((*(V + 30 + v + 1) > SIGMIN)    ||
0886                 (*(V + 30 + v + 2) > SIGMIN))) {
0887             /* (case 6) */
0888             if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
0889                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
0890                 *SIG1 = *(V + 30 + v + 1);
0891             } else {
0892                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
0893                 *SIG1 = *(V + 30 + v + 2);
0894             }
0895         } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
0896             swp_freq = fOSC * 1000;
0897             *SIG1 = *(V + 30 + v);
0898         } else
0899             swp_freq = -1;
0900     } else
0901         swp_freq = -1;
0902 
0903     return swp_freq;
0904 }
0905 
0906 static void swp_info_get2(struct mb86a16_state *state,
0907               int smrt,
0908               int R,
0909               int swp_freq,
0910               int *afcex_freq,
0911               int *fOSC,
0912               unsigned char *AFCEX_L,
0913               unsigned char *AFCEX_H)
0914 {
0915     int AFCEX ;
0916 
0917     if (R == 0)
0918         *fOSC = (swp_freq + 1000) / 2000 * 2;
0919     else
0920         *fOSC = (swp_freq + 500) / 1000;
0921 
0922     if (*fOSC >= swp_freq)
0923         *afcex_freq = *fOSC * 1000 - swp_freq;
0924     else
0925         *afcex_freq = swp_freq - *fOSC * 1000;
0926 
0927     AFCEX = *afcex_freq * 8192 / state->master_clk;
0928     *AFCEX_L =  AFCEX & 0x00ff;
0929     *AFCEX_H = (AFCEX & 0x0f00) >> 8;
0930 }
0931 
0932 static void afcex_info_get(struct mb86a16_state *state,
0933                int afcex_freq,
0934                unsigned char *AFCEX_L,
0935                unsigned char *AFCEX_H)
0936 {
0937     int AFCEX ;
0938 
0939     AFCEX = afcex_freq * 8192 / state->master_clk;
0940     *AFCEX_L =  AFCEX & 0x00ff;
0941     *AFCEX_H = (AFCEX & 0x0f00) >> 8;
0942 }
0943 
0944 static int SEQ_set(struct mb86a16_state *state, unsigned char loop)
0945 {
0946     /* SLOCK0 = 0 */
0947     if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) {
0948         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0949         return -EREMOTEIO;
0950     }
0951 
0952     return 0;
0953 }
0954 
0955 static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV)
0956 {
0957     /* Viterbi Rate, IQ Settings */
0958     if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) {
0959         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0960         return -EREMOTEIO;
0961     }
0962 
0963     return 0;
0964 }
0965 
0966 static int FEC_srst(struct mb86a16_state *state)
0967 {
0968     if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) {
0969         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0970         return -EREMOTEIO;
0971     }
0972 
0973     return 0;
0974 }
0975 
0976 static int S2T_set(struct mb86a16_state *state, unsigned char S2T)
0977 {
0978     if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) {
0979         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0980         return -EREMOTEIO;
0981     }
0982 
0983     return 0;
0984 }
0985 
0986 static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T)
0987 {
0988     if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) {
0989         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
0990         return -EREMOTEIO;
0991     }
0992 
0993     return 0;
0994 }
0995 
0996 
0997 static int mb86a16_set_fe(struct mb86a16_state *state)
0998 {
0999     u8 agcval, cnmval;
1000 
1001     int i, j;
1002     int fOSC = 0;
1003     int fOSC_start = 0;
1004     int wait_t;
1005     int fcp;
1006     int swp_ofs;
1007     int V[60];
1008     u8 SIG1MIN;
1009 
1010     unsigned char CREN, AFCEN, AFCEXEN;
1011     unsigned char SIG1;
1012     unsigned char TIMINT1, TIMINT2, TIMEXT;
1013     unsigned char S0T, S1T;
1014     unsigned char S2T;
1015 /*  unsigned char S2T, S3T; */
1016     unsigned char S4T, S5T;
1017     unsigned char AFCEX_L, AFCEX_H;
1018     unsigned char R;
1019     unsigned char VIRM;
1020     unsigned char ETH, VIA;
1021     unsigned char junk;
1022 
1023     int loop;
1024     int ftemp;
1025     int v, vmax, vmin;
1026     int vmax_his, vmin_his;
1027     int swp_freq, prev_swp_freq[20];
1028     int prev_freq_num;
1029     int signal_dupl;
1030     int afcex_freq;
1031     int signal;
1032     int afcerr;
1033     int temp_freq, delta_freq;
1034     int dagcm[4];
1035     int smrt_d;
1036 /*  int freq_err; */
1037     int n;
1038     int ret = -1;
1039     int sync;
1040 
1041     dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1042 
1043     fcp = 3000;
1044     swp_ofs = state->srate / 4;
1045 
1046     for (i = 0; i < 60; i++)
1047         V[i] = -1;
1048 
1049     for (i = 0; i < 20; i++)
1050         prev_swp_freq[i] = 0;
1051 
1052     SIG1MIN = 25;
1053 
1054     for (n = 0; ((n < 3) && (ret == -1)); n++) {
1055         SEQ_set(state, 0);
1056         iq_vt_set(state, 0);
1057 
1058         CREN = 0;
1059         AFCEN = 0;
1060         AFCEXEN = 1;
1061         TIMINT1 = 0;
1062         TIMINT2 = 1;
1063         TIMEXT = 2;
1064         S1T = 0;
1065         S0T = 0;
1066 
1067         if (initial_set(state) < 0) {
1068             dprintk(verbose, MB86A16_ERROR, 1, "initial set failed");
1069             return -1;
1070         }
1071         if (DAGC_data_set(state, 3, 2) < 0) {
1072             dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1073             return -1;
1074         }
1075         if (EN_set(state, CREN, AFCEN) < 0) {
1076             dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1077             return -1; /* (0, 0) */
1078         }
1079         if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1080             dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1081             return -1; /* (1, smrt) = (1, symbolrate) */
1082         }
1083         if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) {
1084             dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error");
1085             return -1; /* (0, 1, 2) */
1086         }
1087         if (S01T_set(state, S1T, S0T) < 0) {
1088             dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1089             return -1; /* (0, 0) */
1090         }
1091         smrt_info_get(state, state->srate);
1092         if (smrt_set(state, state->srate) < 0) {
1093             dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error");
1094             return -1;
1095         }
1096 
1097         R = vco_dev_get(state, state->srate);
1098         if (R == 1)
1099             fOSC_start = state->frequency;
1100 
1101         else if (R == 0) {
1102             if (state->frequency % 2 == 0) {
1103                 fOSC_start = state->frequency;
1104             } else {
1105                 fOSC_start = state->frequency + 1;
1106                 if (fOSC_start > 2150)
1107                     fOSC_start = state->frequency - 1;
1108             }
1109         }
1110         loop = 1;
1111         ftemp = fOSC_start * 1000;
1112         vmax = 0 ;
1113         while (loop == 1) {
1114             ftemp = ftemp + swp_ofs;
1115             vmax++;
1116 
1117             /* Upper bound */
1118             if (ftemp > 2150000) {
1119                 loop = 0;
1120                 vmax--;
1121             } else {
1122                 if ((ftemp == 2150000) ||
1123                     (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1124                     loop = 0;
1125             }
1126         }
1127 
1128         loop = 1;
1129         ftemp = fOSC_start * 1000;
1130         vmin = 0 ;
1131         while (loop == 1) {
1132             ftemp = ftemp - swp_ofs;
1133             vmin--;
1134 
1135             /* Lower bound */
1136             if (ftemp < 950000) {
1137                 loop = 0;
1138                 vmin++;
1139             } else {
1140                 if ((ftemp == 950000) ||
1141                     (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1142                     loop = 0;
1143             }
1144         }
1145 
1146         wait_t = (8000 + state->srate / 2) / state->srate;
1147         if (wait_t == 0)
1148             wait_t = 1;
1149 
1150         i = 0;
1151         j = 0;
1152         prev_freq_num = 0;
1153         loop = 1;
1154         signal = 0;
1155         vmax_his = 0;
1156         vmin_his = 0;
1157         v = 0;
1158 
1159         while (loop == 1) {
1160             swp_info_get(state, fOSC_start, state->srate,
1161                      v, R, swp_ofs, &fOSC,
1162                      &afcex_freq, &AFCEX_L, &AFCEX_H);
1163 
1164             udelay(100);
1165             if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1166                 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1167                 return -1;
1168             }
1169             udelay(100);
1170             if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1171                 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1172                 return -1;
1173             }
1174             if (srst(state) < 0) {
1175                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1176                 return -1;
1177             }
1178             msleep_interruptible(wait_t);
1179 
1180             if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1181                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1182                 return -1;
1183             }
1184             V[30 + v] = SIG1 ;
1185             swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin,
1186                               SIG1MIN, fOSC, afcex_freq,
1187                               swp_ofs, &SIG1);  /* changed */
1188 
1189             signal_dupl = 0;
1190             for (j = 0; j < prev_freq_num; j++) {
1191                 if ((abs(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1192                     signal_dupl = 1;
1193                     dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j);
1194                 }
1195             }
1196             if ((signal_dupl == 0) && (swp_freq > 0) && (abs(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1197                 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1198                 prev_swp_freq[prev_freq_num] = swp_freq;
1199                 prev_freq_num++;
1200                 swp_info_get2(state, state->srate, R, swp_freq,
1201                           &afcex_freq, &fOSC,
1202                           &AFCEX_L, &AFCEX_H);
1203 
1204                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1205                     dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1206                     return -1;
1207                 }
1208                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1209                     dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1210                     return -1;
1211                 }
1212                 signal = signal_det(state, state->srate, &SIG1);
1213                 if (signal == 1) {
1214                     dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****");
1215                     loop = 0;
1216                 } else {
1217                     dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again...");
1218                     smrt_info_get(state, state->srate);
1219                     if (smrt_set(state, state->srate) < 0) {
1220                         dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1221                         return -1;
1222                     }
1223                 }
1224             }
1225             if (v > vmax)
1226                 vmax_his = 1 ;
1227             if (v < vmin)
1228                 vmin_his = 1 ;
1229             i++;
1230 
1231             if ((i % 2 == 1) && (vmax_his == 1))
1232                 i++;
1233             if ((i % 2 == 0) && (vmin_his == 1))
1234                 i++;
1235 
1236             if (i % 2 == 1)
1237                 v = (i + 1) / 2;
1238             else
1239                 v = -i / 2;
1240 
1241             if ((vmax_his == 1) && (vmin_his == 1))
1242                 loop = 0 ;
1243         }
1244 
1245         if (signal == 1) {
1246             dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check");
1247             S1T = 7 ;
1248             S0T = 1 ;
1249             CREN = 0 ;
1250             AFCEN = 1 ;
1251             AFCEXEN = 0 ;
1252 
1253             if (S01T_set(state, S1T, S0T) < 0) {
1254                 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1255                 return -1;
1256             }
1257             smrt_info_get(state, state->srate);
1258             if (smrt_set(state, state->srate) < 0) {
1259                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1260                 return -1;
1261             }
1262             if (EN_set(state, CREN, AFCEN) < 0) {
1263                 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1264                 return -1;
1265             }
1266             if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1267                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1268                 return -1;
1269             }
1270             afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H);
1271             if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1272                 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error");
1273                 return -1;
1274             }
1275             if (srst(state) < 0) {
1276                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1277                 return -1;
1278             }
1279             /* delay 4~200 */
1280             wait_t = 200000 / state->master_clk + 200000 / state->srate;
1281             msleep(wait_t);
1282             afcerr = afcerr_chk(state);
1283             if (afcerr == -1)
1284                 return -1;
1285 
1286             swp_freq = fOSC * 1000 + afcerr ;
1287             AFCEXEN = 1 ;
1288             if (state->srate >= 1500)
1289                 smrt_d = state->srate / 3;
1290             else
1291                 smrt_d = state->srate / 2;
1292             smrt_info_get(state, smrt_d);
1293             if (smrt_set(state, smrt_d) < 0) {
1294                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1295                 return -1;
1296             }
1297             if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) {
1298                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1299                 return -1;
1300             }
1301             R = vco_dev_get(state, smrt_d);
1302             if (DAGC_data_set(state, 2, 0) < 0) {
1303                 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1304                 return -1;
1305             }
1306             for (i = 0; i < 3; i++) {
1307                 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1308                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1309                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1310                     dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1311                     return -1;
1312                 }
1313                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1314                     dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1315                     return -1;
1316                 }
1317                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1318                 msleep(wait_t);
1319                 dagcm[i] = dagcm_val_get(state);
1320             }
1321             if ((dagcm[0] > dagcm[1]) &&
1322                 (dagcm[0] > dagcm[2]) &&
1323                 (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1324 
1325                 temp_freq = swp_freq - 2 * state->srate / 8;
1326                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1327                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1328                     dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1329                     return -1;
1330                 }
1331                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1332                     dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1333                     return -1;
1334                 }
1335                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1336                 msleep(wait_t);
1337                 dagcm[3] = dagcm_val_get(state);
1338                 if (dagcm[3] > dagcm[1])
1339                     delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1340                 else
1341                     delta_freq = 0;
1342             } else if ((dagcm[2] > dagcm[1]) &&
1343                    (dagcm[2] > dagcm[0]) &&
1344                    (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1345 
1346                 temp_freq = swp_freq + 2 * state->srate / 8;
1347                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1348                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1349                     dprintk(verbose, MB86A16_ERROR, 1, "rf val set");
1350                     return -1;
1351                 }
1352                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1353                     dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1354                     return -1;
1355                 }
1356                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1357                 msleep(wait_t);
1358                 dagcm[3] = dagcm_val_get(state);
1359                 if (dagcm[3] > dagcm[1])
1360                     delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1361                 else
1362                     delta_freq = 0 ;
1363 
1364             } else {
1365                 delta_freq = 0 ;
1366             }
1367             dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq);
1368             swp_freq += delta_freq;
1369             dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq);
1370             if (abs(state->frequency * 1000 - swp_freq) > 3800) {
1371                 dprintk(verbose, MB86A16_INFO, 1, "NO  --  SIGNAL !");
1372             } else {
1373 
1374                 S1T = 0;
1375                 S0T = 3;
1376                 CREN = 1;
1377                 AFCEN = 0;
1378                 AFCEXEN = 1;
1379 
1380                 if (S01T_set(state, S1T, S0T) < 0) {
1381                     dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1382                     return -1;
1383                 }
1384                 if (DAGC_data_set(state, 0, 0) < 0) {
1385                     dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1386                     return -1;
1387                 }
1388                 R = vco_dev_get(state, state->srate);
1389                 smrt_info_get(state, state->srate);
1390                 if (smrt_set(state, state->srate) < 0) {
1391                     dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1392                     return -1;
1393                 }
1394                 if (EN_set(state, CREN, AFCEN) < 0) {
1395                     dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1396                     return -1;
1397                 }
1398                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1399                     dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1400                     return -1;
1401                 }
1402                 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1403                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1404                     dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1405                     return -1;
1406                 }
1407                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1408                     dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1409                     return -1;
1410                 }
1411                 if (srst(state) < 0) {
1412                     dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1413                     return -1;
1414                 }
1415                 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1416                 if (wait_t == 0)
1417                     wait_t = 1;
1418                 msleep_interruptible(wait_t);
1419                 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1420                     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1421                     return -EREMOTEIO;
1422                 }
1423 
1424                 if (SIG1 > 110) {
1425                     S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
1426                     wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1427                 } else if (SIG1 > 105) {
1428                     S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1429                     wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1430                 } else if (SIG1 > 85) {
1431                     S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1432                     wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1433                 } else if (SIG1 > 65) {
1434                     S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1435                     wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1436                 } else {
1437                     S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1438                     wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1439                 }
1440                 wait_t *= 2; /* FOS */
1441                 S2T_set(state, S2T);
1442                 S45T_set(state, S4T, S5T);
1443                 Vi_set(state, ETH, VIA);
1444                 srst(state);
1445                 msleep_interruptible(wait_t);
1446                 sync = sync_chk(state, &VIRM);
1447                 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1448                 if (VIRM) {
1449                     if (VIRM == 4) {
1450                         /* 5/6 */
1451                         if (SIG1 > 110)
1452                             wait_t = (786432 + state->srate / 2) / state->srate;
1453                         else
1454                             wait_t = (1572864 + state->srate / 2) / state->srate;
1455 
1456                         msleep_interruptible(wait_t);
1457 
1458                         if (sync_chk(state, &junk) == 0) {
1459                             iq_vt_set(state, 1);
1460                             FEC_srst(state);
1461                         }
1462                     }
1463                     /* 1/2, 2/3, 3/4, 7/8 */
1464                     if (SIG1 > 110)
1465                         wait_t = (786432 + state->srate / 2) / state->srate;
1466                     else
1467                         wait_t = (1572864 + state->srate / 2) / state->srate;
1468                     msleep_interruptible(wait_t);
1469                     SEQ_set(state, 1);
1470                 } else {
1471                     dprintk(verbose, MB86A16_INFO, 1, "NO  -- SYNC");
1472                     SEQ_set(state, 1);
1473                     ret = -1;
1474                 }
1475             }
1476         } else {
1477             dprintk(verbose, MB86A16_INFO, 1, "NO  -- SIGNAL");
1478             ret = -1;
1479         }
1480 
1481         sync = sync_chk(state, &junk);
1482         if (sync) {
1483             dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******");
1484             freqerr_chk(state, state->frequency, state->srate, 1);
1485             ret = 0;
1486             break;
1487         }
1488     }
1489 
1490     mb86a16_read(state, 0x15, &agcval);
1491     mb86a16_read(state, 0x26, &cnmval);
1492     dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval);
1493 
1494     return ret;
1495 }
1496 
1497 static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe,
1498                    struct dvb_diseqc_master_cmd *cmd)
1499 {
1500     struct mb86a16_state *state = fe->demodulator_priv;
1501     int i;
1502     u8 regs;
1503 
1504     if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1505         goto err;
1506     if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1507         goto err;
1508     if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1509         goto err;
1510 
1511     regs = 0x18;
1512 
1513     if (cmd->msg_len > 5 || cmd->msg_len < 4)
1514         return -EINVAL;
1515 
1516     for (i = 0; i < cmd->msg_len; i++) {
1517         if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1518             goto err;
1519 
1520         regs++;
1521     }
1522     i += 0x90;
1523 
1524     msleep_interruptible(10);
1525 
1526     if (mb86a16_write(state, MB86A16_DCC1, i) < 0)
1527         goto err;
1528     if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1529         goto err;
1530 
1531     return 0;
1532 
1533 err:
1534     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1535     return -EREMOTEIO;
1536 }
1537 
1538 static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe,
1539                      enum fe_sec_mini_cmd burst)
1540 {
1541     struct mb86a16_state *state = fe->demodulator_priv;
1542 
1543     switch (burst) {
1544     case SEC_MINI_A:
1545         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1546                                MB86A16_DCC1_TBEN  |
1547                                MB86A16_DCC1_TBO) < 0)
1548             goto err;
1549         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1550             goto err;
1551         break;
1552     case SEC_MINI_B:
1553         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1554                                MB86A16_DCC1_TBEN) < 0)
1555             goto err;
1556         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1557             goto err;
1558         break;
1559     }
1560 
1561     return 0;
1562 err:
1563     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1564     return -EREMOTEIO;
1565 }
1566 
1567 static int mb86a16_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1568 {
1569     struct mb86a16_state *state = fe->demodulator_priv;
1570 
1571     switch (tone) {
1572     case SEC_TONE_ON:
1573         if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0)
1574             goto err;
1575         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1576                                MB86A16_DCC1_CTOE) < 0)
1577 
1578             goto err;
1579         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1580             goto err;
1581         break;
1582     case SEC_TONE_OFF:
1583         if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1584             goto err;
1585         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1586             goto err;
1587         if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1588             goto err;
1589         break;
1590     default:
1591         return -EINVAL;
1592     }
1593     return 0;
1594 
1595 err:
1596     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1597     return -EREMOTEIO;
1598 }
1599 
1600 static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe)
1601 {
1602     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1603     struct mb86a16_state *state = fe->demodulator_priv;
1604 
1605     state->frequency = p->frequency / 1000;
1606     state->srate = p->symbol_rate / 1000;
1607 
1608     if (!mb86a16_set_fe(state)) {
1609         dprintk(verbose, MB86A16_ERROR, 1, "Successfully acquired LOCK");
1610         return DVBFE_ALGO_SEARCH_SUCCESS;
1611     }
1612 
1613     dprintk(verbose, MB86A16_ERROR, 1, "Lock acquisition failed!");
1614     return DVBFE_ALGO_SEARCH_FAILED;
1615 }
1616 
1617 static void mb86a16_release(struct dvb_frontend *fe)
1618 {
1619     struct mb86a16_state *state = fe->demodulator_priv;
1620     kfree(state);
1621 }
1622 
1623 static int mb86a16_init(struct dvb_frontend *fe)
1624 {
1625     return 0;
1626 }
1627 
1628 static int mb86a16_sleep(struct dvb_frontend *fe)
1629 {
1630     return 0;
1631 }
1632 
1633 static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber)
1634 {
1635     u8 ber_mon, ber_tab, ber_lsb, ber_mid, ber_msb, ber_tim, ber_rst;
1636     u32 timer;
1637 
1638     struct mb86a16_state *state = fe->demodulator_priv;
1639 
1640     *ber = 0;
1641     if (mb86a16_read(state, MB86A16_BERMON, &ber_mon) != 2)
1642         goto err;
1643     if (mb86a16_read(state, MB86A16_BERTAB, &ber_tab) != 2)
1644         goto err;
1645     if (mb86a16_read(state, MB86A16_BERLSB, &ber_lsb) != 2)
1646         goto err;
1647     if (mb86a16_read(state, MB86A16_BERMID, &ber_mid) != 2)
1648         goto err;
1649     if (mb86a16_read(state, MB86A16_BERMSB, &ber_msb) != 2)
1650         goto err;
1651     /* BER monitor invalid when BER_EN = 0  */
1652     if (ber_mon & 0x04) {
1653         /* coarse, fast calculation */
1654         *ber = ber_tab & 0x1f;
1655         dprintk(verbose, MB86A16_DEBUG, 1, "BER coarse=[0x%02x]", *ber);
1656         if (ber_mon & 0x01) {
1657             /*
1658              * BER_SEL = 1, The monitored BER is the estimated
1659              * value with a Reed-Solomon decoder error amount at
1660              * the deinterleaver output.
1661              * monitored BER is expressed as a 20 bit output in total
1662              */
1663             ber_rst = (ber_mon >> 3) & 0x03;
1664             *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1665             if (ber_rst == 0)
1666                 timer =  12500000;
1667             else if (ber_rst == 1)
1668                 timer =  25000000;
1669             else if (ber_rst == 2)
1670                 timer =  50000000;
1671             else /* ber_rst == 3 */
1672                 timer = 100000000;
1673 
1674             *ber /= timer;
1675             dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1676         } else {
1677             /*
1678              * BER_SEL = 0, The monitored BER is the estimated
1679              * value with a Viterbi decoder error amount at the
1680              * QPSK demodulator output.
1681              * monitored BER is expressed as a 24 bit output in total
1682              */
1683             ber_tim = (ber_mon >> 1) & 0x01;
1684             *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1685             if (ber_tim == 0)
1686                 timer = 16;
1687             else /* ber_tim == 1 */
1688                 timer = 24;
1689 
1690             *ber /= 2 ^ timer;
1691             dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1692         }
1693     }
1694     return 0;
1695 err:
1696     dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1697     return -EREMOTEIO;
1698 }
1699 
1700 static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1701 {
1702     u8 agcm = 0;
1703     struct mb86a16_state *state = fe->demodulator_priv;
1704 
1705     *strength = 0;
1706     if (mb86a16_read(state, MB86A16_AGCM, &agcm) != 2) {
1707         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1708         return -EREMOTEIO;
1709     }
1710 
1711     *strength = ((0xff - agcm) * 100) / 256;
1712     dprintk(verbose, MB86A16_DEBUG, 1, "Signal strength=[%d %%]", (u8) *strength);
1713     *strength = (0xffff - 0xff) + agcm;
1714 
1715     return 0;
1716 }
1717 
1718 struct cnr {
1719     u8 cn_reg;
1720     u8 cn_val;
1721 };
1722 
1723 static const struct cnr cnr_tab[] = {
1724     {  35,  2 },
1725     {  40,  3 },
1726     {  50,  4 },
1727     {  60,  5 },
1728     {  70,  6 },
1729     {  80,  7 },
1730     {  92,  8 },
1731     { 103,  9 },
1732     { 115, 10 },
1733     { 138, 12 },
1734     { 162, 15 },
1735     { 180, 18 },
1736     { 185, 19 },
1737     { 189, 20 },
1738     { 195, 22 },
1739     { 199, 24 },
1740     { 201, 25 },
1741     { 202, 26 },
1742     { 203, 27 },
1743     { 205, 28 },
1744     { 208, 30 }
1745 };
1746 
1747 static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr)
1748 {
1749     struct mb86a16_state *state = fe->demodulator_priv;
1750     int i = 0;
1751     int low_tide = 2, high_tide = 30, q_level;
1752     u8  cn;
1753 
1754     *snr = 0;
1755     if (mb86a16_read(state, 0x26, &cn) != 2) {
1756         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1757         return -EREMOTEIO;
1758     }
1759 
1760     for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) {
1761         if (cn < cnr_tab[i].cn_reg) {
1762             *snr = cnr_tab[i].cn_val;
1763             break;
1764         }
1765     }
1766     q_level = (*snr * 100) / (high_tide - low_tide);
1767     dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level);
1768     *snr = (0xffff - 0xff) + *snr;
1769 
1770     return 0;
1771 }
1772 
1773 static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1774 {
1775     u8 dist;
1776     struct mb86a16_state *state = fe->demodulator_priv;
1777 
1778     if (mb86a16_read(state, MB86A16_DISTMON, &dist) != 2) {
1779         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1780         return -EREMOTEIO;
1781     }
1782     *ucblocks = dist;
1783 
1784     return 0;
1785 }
1786 
1787 static enum dvbfe_algo mb86a16_frontend_algo(struct dvb_frontend *fe)
1788 {
1789     return DVBFE_ALGO_CUSTOM;
1790 }
1791 
1792 static const struct dvb_frontend_ops mb86a16_ops = {
1793     .delsys = { SYS_DVBS },
1794     .info = {
1795         .name           = "Fujitsu MB86A16 DVB-S",
1796         .frequency_min_hz   =  950 * MHz,
1797         .frequency_max_hz   = 2150 * MHz,
1798         .frequency_stepsize_hz  =    3 * MHz,
1799         .symbol_rate_min    = 1000000,
1800         .symbol_rate_max    = 45000000,
1801         .symbol_rate_tolerance  = 500,
1802         .caps           = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
1803                       FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
1804                       FE_CAN_FEC_7_8 | FE_CAN_QPSK    |
1805                       FE_CAN_FEC_AUTO
1806     },
1807     .release            = mb86a16_release,
1808 
1809     .get_frontend_algo      = mb86a16_frontend_algo,
1810     .search             = mb86a16_search,
1811     .init               = mb86a16_init,
1812     .sleep              = mb86a16_sleep,
1813     .read_status            = mb86a16_read_status,
1814 
1815     .read_ber           = mb86a16_read_ber,
1816     .read_signal_strength       = mb86a16_read_signal_strength,
1817     .read_snr           = mb86a16_read_snr,
1818     .read_ucblocks          = mb86a16_read_ucblocks,
1819 
1820     .diseqc_send_master_cmd     = mb86a16_send_diseqc_msg,
1821     .diseqc_send_burst      = mb86a16_send_diseqc_burst,
1822     .set_tone           = mb86a16_set_tone,
1823 };
1824 
1825 struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
1826                     struct i2c_adapter *i2c_adap)
1827 {
1828     u8 dev_id = 0;
1829     struct mb86a16_state *state = NULL;
1830 
1831     state = kmalloc(sizeof(struct mb86a16_state), GFP_KERNEL);
1832     if (state == NULL)
1833         goto error;
1834 
1835     state->config = config;
1836     state->i2c_adap = i2c_adap;
1837 
1838     mb86a16_read(state, 0x7f, &dev_id);
1839     if (dev_id != 0xfe)
1840         goto error;
1841 
1842     memcpy(&state->frontend.ops, &mb86a16_ops, sizeof(struct dvb_frontend_ops));
1843     state->frontend.demodulator_priv = state;
1844     state->frontend.ops.set_voltage = state->config->set_voltage;
1845 
1846     return &state->frontend;
1847 error:
1848     kfree(state);
1849     return NULL;
1850 }
1851 EXPORT_SYMBOL(mb86a16_attach);
1852 MODULE_LICENSE("GPL");
1853 MODULE_AUTHOR("Manu Abraham");
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