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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *    Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
0004  *    LGS8913, LGS8GL5, LGS8G75
0005  *    experimental support LGS8G42, LGS8G52
0006  *
0007  *    Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
0008  *    Copyright (C) 2008 Sirius International (Hong Kong) Limited
0009  *    Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
0010  */
0011 
0012 #include <asm/div64.h>
0013 #include <linux/firmware.h>
0014 
0015 #include <media/dvb_frontend.h>
0016 
0017 #include "lgs8gxx.h"
0018 #include "lgs8gxx_priv.h"
0019 
0020 #define dprintk(args...) \
0021     do { \
0022         if (debug) \
0023             printk(KERN_DEBUG "lgs8gxx: " args); \
0024     } while (0)
0025 
0026 static int debug;
0027 static int fake_signal_str = 1;
0028 
0029 #define LGS8GXX_FIRMWARE "lgs8g75.fw"
0030 
0031 module_param(debug, int, 0644);
0032 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
0033 
0034 module_param(fake_signal_str, int, 0644);
0035 MODULE_PARM_DESC(fake_signal_str, "fake signal strength for LGS8913."
0036 "Signal strength calculation is slow.(default:on).");
0037 
0038 /* LGS8GXX internal helper functions */
0039 
0040 static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data)
0041 {
0042     int ret;
0043     u8 buf[] = { reg, data };
0044     struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };
0045 
0046     msg.addr = priv->config->demod_address;
0047     if (priv->config->prod != LGS8GXX_PROD_LGS8G75 && reg >= 0xC0)
0048         msg.addr += 0x02;
0049 
0050     if (debug >= 2)
0051         dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
0052 
0053     ret = i2c_transfer(priv->i2c, &msg, 1);
0054 
0055     if (ret != 1)
0056         dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
0057             __func__, reg, data, ret);
0058 
0059     return (ret != 1) ? -1 : 0;
0060 }
0061 
0062 static int lgs8gxx_read_reg(struct lgs8gxx_state *priv, u8 reg, u8 *p_data)
0063 {
0064     int ret;
0065     u8 dev_addr;
0066 
0067     u8 b0[] = { reg };
0068     u8 b1[] = { 0 };
0069     struct i2c_msg msg[] = {
0070         { .flags = 0, .buf = b0, .len = 1 },
0071         { .flags = I2C_M_RD, .buf = b1, .len = 1 },
0072     };
0073 
0074     dev_addr = priv->config->demod_address;
0075     if (priv->config->prod != LGS8GXX_PROD_LGS8G75 && reg >= 0xC0)
0076         dev_addr += 0x02;
0077     msg[1].addr =  msg[0].addr = dev_addr;
0078 
0079     ret = i2c_transfer(priv->i2c, msg, 2);
0080     if (ret != 2) {
0081         dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
0082         return -1;
0083     }
0084 
0085     *p_data = b1[0];
0086     if (debug >= 2)
0087         dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, b1[0]);
0088     return 0;
0089 }
0090 
0091 static int lgs8gxx_soft_reset(struct lgs8gxx_state *priv)
0092 {
0093     lgs8gxx_write_reg(priv, 0x02, 0x00);
0094     msleep(1);
0095     lgs8gxx_write_reg(priv, 0x02, 0x01);
0096     msleep(100);
0097 
0098     return 0;
0099 }
0100 
0101 static int wait_reg_mask(struct lgs8gxx_state *priv, u8 reg, u8 mask,
0102     u8 val, u8 delay, u8 tries)
0103 {
0104     u8 t;
0105     int i;
0106 
0107     for (i = 0; i < tries; i++) {
0108         lgs8gxx_read_reg(priv, reg, &t);
0109 
0110         if ((t & mask) == val)
0111             return 0;
0112         msleep(delay);
0113     }
0114 
0115     return 1;
0116 }
0117 
0118 static int lgs8gxx_set_ad_mode(struct lgs8gxx_state *priv)
0119 {
0120     const struct lgs8gxx_config *config = priv->config;
0121     u8 if_conf;
0122 
0123     if_conf = 0x10; /* AGC output on, RF_AGC output off; */
0124 
0125     if_conf |=
0126         ((config->ext_adc) ? 0x80 : 0x00) |
0127         ((config->if_neg_center) ? 0x04 : 0x00) |
0128         ((config->if_freq == 0) ? 0x08 : 0x00) | /* Baseband */
0129         ((config->adc_signed) ? 0x02 : 0x00) |
0130         ((config->if_neg_edge) ? 0x01 : 0x00);
0131 
0132     if (config->ext_adc &&
0133         (config->prod == LGS8GXX_PROD_LGS8G52)) {
0134         lgs8gxx_write_reg(priv, 0xBA, 0x40);
0135     }
0136 
0137     lgs8gxx_write_reg(priv, 0x07, if_conf);
0138 
0139     return 0;
0140 }
0141 
0142 static int lgs8gxx_set_if_freq(struct lgs8gxx_state *priv, u32 freq /*in kHz*/)
0143 {
0144     u64 val;
0145     u32 v32;
0146     u32 if_clk;
0147 
0148     if_clk = priv->config->if_clk_freq;
0149 
0150     val = freq;
0151     if (freq != 0) {
0152         val <<= 32;
0153         if (if_clk != 0)
0154             do_div(val, if_clk);
0155         v32 = val & 0xFFFFFFFF;
0156         dprintk("Set IF Freq to %dkHz\n", freq);
0157     } else {
0158         v32 = 0;
0159         dprintk("Set IF Freq to baseband\n");
0160     }
0161     dprintk("AFC_INIT_FREQ = 0x%08X\n", v32);
0162 
0163     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0164         lgs8gxx_write_reg(priv, 0x08, 0xFF & (v32));
0165         lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32 >> 8));
0166         lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 16));
0167         lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 24));
0168     } else {
0169         lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32));
0170         lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 8));
0171         lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 16));
0172         lgs8gxx_write_reg(priv, 0x0C, 0xFF & (v32 >> 24));
0173     }
0174 
0175     return 0;
0176 }
0177 
0178 static int lgs8gxx_get_afc_phase(struct lgs8gxx_state *priv)
0179 {
0180     u64 val;
0181     u32 v32 = 0;
0182     u8 reg_addr, t;
0183     int i;
0184 
0185     if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
0186         reg_addr = 0x23;
0187     else
0188         reg_addr = 0x48;
0189 
0190     for (i = 0; i < 4; i++) {
0191         lgs8gxx_read_reg(priv, reg_addr, &t);
0192         v32 <<= 8;
0193         v32 |= t;
0194         reg_addr--;
0195     }
0196 
0197     val = v32;
0198     val *= priv->config->if_clk_freq;
0199     val >>= 32;
0200     dprintk("AFC = %u kHz\n", (u32)val);
0201     return 0;
0202 }
0203 
0204 static int lgs8gxx_set_mode_auto(struct lgs8gxx_state *priv)
0205 {
0206     u8 t;
0207     u8 prod = priv->config->prod;
0208 
0209     if (prod == LGS8GXX_PROD_LGS8913)
0210         lgs8gxx_write_reg(priv, 0xC6, 0x01);
0211 
0212     if (prod == LGS8GXX_PROD_LGS8G75) {
0213         lgs8gxx_read_reg(priv, 0x0C, &t);
0214         t &= (~0x04);
0215         lgs8gxx_write_reg(priv, 0x0C, t | 0x80);
0216         lgs8gxx_write_reg(priv, 0x39, 0x00);
0217         lgs8gxx_write_reg(priv, 0x3D, 0x04);
0218     } else if (prod == LGS8GXX_PROD_LGS8913 ||
0219         prod == LGS8GXX_PROD_LGS8GL5 ||
0220         prod == LGS8GXX_PROD_LGS8G42 ||
0221         prod == LGS8GXX_PROD_LGS8G52 ||
0222         prod == LGS8GXX_PROD_LGS8G54) {
0223         lgs8gxx_read_reg(priv, 0x7E, &t);
0224         lgs8gxx_write_reg(priv, 0x7E, t | 0x01);
0225 
0226         /* clear FEC self reset */
0227         lgs8gxx_read_reg(priv, 0xC5, &t);
0228         lgs8gxx_write_reg(priv, 0xC5, t & 0xE0);
0229     }
0230 
0231     if (prod == LGS8GXX_PROD_LGS8913) {
0232         /* FEC auto detect */
0233         lgs8gxx_write_reg(priv, 0xC1, 0x03);
0234 
0235         lgs8gxx_read_reg(priv, 0x7C, &t);
0236         t = (t & 0x8C) | 0x03;
0237         lgs8gxx_write_reg(priv, 0x7C, t);
0238 
0239         /* BER test mode */
0240         lgs8gxx_read_reg(priv, 0xC3, &t);
0241         t = (t & 0xEF) |  0x10;
0242         lgs8gxx_write_reg(priv, 0xC3, t);
0243     }
0244 
0245     if (priv->config->prod == LGS8GXX_PROD_LGS8G52)
0246         lgs8gxx_write_reg(priv, 0xD9, 0x40);
0247 
0248     return 0;
0249 }
0250 
0251 static int lgs8gxx_set_mode_manual(struct lgs8gxx_state *priv)
0252 {
0253     u8 t;
0254 
0255     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0256         u8 t2;
0257         lgs8gxx_read_reg(priv, 0x0C, &t);
0258         t &= (~0x80);
0259         lgs8gxx_write_reg(priv, 0x0C, t);
0260 
0261         lgs8gxx_read_reg(priv, 0x0C, &t);
0262         lgs8gxx_read_reg(priv, 0x19, &t2);
0263 
0264         if (((t&0x03) == 0x01) && (t2&0x01)) {
0265             lgs8gxx_write_reg(priv, 0x6E, 0x05);
0266             lgs8gxx_write_reg(priv, 0x39, 0x02);
0267             lgs8gxx_write_reg(priv, 0x39, 0x03);
0268             lgs8gxx_write_reg(priv, 0x3D, 0x05);
0269             lgs8gxx_write_reg(priv, 0x3E, 0x28);
0270             lgs8gxx_write_reg(priv, 0x53, 0x80);
0271         } else {
0272             lgs8gxx_write_reg(priv, 0x6E, 0x3F);
0273             lgs8gxx_write_reg(priv, 0x39, 0x00);
0274             lgs8gxx_write_reg(priv, 0x3D, 0x04);
0275         }
0276 
0277         lgs8gxx_soft_reset(priv);
0278         return 0;
0279     }
0280 
0281     /* turn off auto-detect; manual settings */
0282     lgs8gxx_write_reg(priv, 0x7E, 0);
0283     if (priv->config->prod == LGS8GXX_PROD_LGS8913)
0284         lgs8gxx_write_reg(priv, 0xC1, 0);
0285 
0286     lgs8gxx_read_reg(priv, 0xC5, &t);
0287     t = (t & 0xE0) | 0x06;
0288     lgs8gxx_write_reg(priv, 0xC5, t);
0289 
0290     lgs8gxx_soft_reset(priv);
0291 
0292     return 0;
0293 }
0294 
0295 static int lgs8gxx_is_locked(struct lgs8gxx_state *priv, u8 *locked)
0296 {
0297     int ret = 0;
0298     u8 t;
0299 
0300     if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
0301         ret = lgs8gxx_read_reg(priv, 0x13, &t);
0302     else
0303         ret = lgs8gxx_read_reg(priv, 0x4B, &t);
0304     if (ret != 0)
0305         return ret;
0306 
0307     if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
0308         *locked = ((t & 0x80) == 0x80) ? 1 : 0;
0309     else
0310         *locked = ((t & 0xC0) == 0xC0) ? 1 : 0;
0311     return 0;
0312 }
0313 
0314 /* Wait for Code Acquisition Lock */
0315 static int lgs8gxx_wait_ca_lock(struct lgs8gxx_state *priv, u8 *locked)
0316 {
0317     int ret = 0;
0318     u8 reg, mask, val;
0319 
0320     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0321         reg = 0x13;
0322         mask = 0x80;
0323         val = 0x80;
0324     } else {
0325         reg = 0x4B;
0326         mask = 0xC0;
0327         val = 0xC0;
0328     }
0329 
0330     ret = wait_reg_mask(priv, reg, mask, val, 50, 40);
0331     *locked = (ret == 0) ? 1 : 0;
0332 
0333     return 0;
0334 }
0335 
0336 static int lgs8gxx_is_autodetect_finished(struct lgs8gxx_state *priv,
0337                       u8 *finished)
0338 {
0339     int ret = 0;
0340     u8 reg, mask, val;
0341 
0342     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0343         reg = 0x1f;
0344         mask = 0xC0;
0345         val = 0x80;
0346     } else {
0347         reg = 0xA4;
0348         mask = 0x03;
0349         val = 0x01;
0350     }
0351 
0352     ret = wait_reg_mask(priv, reg, mask, val, 10, 20);
0353     *finished = (ret == 0) ? 1 : 0;
0354 
0355     return 0;
0356 }
0357 
0358 static int lgs8gxx_autolock_gi(struct lgs8gxx_state *priv, u8 gi, u8 cpn,
0359     u8 *locked)
0360 {
0361     int err = 0;
0362     u8 ad_fini = 0;
0363     u8 t1, t2;
0364 
0365     if (gi == GI_945)
0366         dprintk("try GI 945\n");
0367     else if (gi == GI_595)
0368         dprintk("try GI 595\n");
0369     else if (gi == GI_420)
0370         dprintk("try GI 420\n");
0371     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0372         lgs8gxx_read_reg(priv, 0x0C, &t1);
0373         lgs8gxx_read_reg(priv, 0x18, &t2);
0374         t1 &= ~(GI_MASK);
0375         t1 |= gi;
0376         t2 &= 0xFE;
0377         t2 |= cpn ? 0x01 : 0x00;
0378         lgs8gxx_write_reg(priv, 0x0C, t1);
0379         lgs8gxx_write_reg(priv, 0x18, t2);
0380     } else {
0381         lgs8gxx_write_reg(priv, 0x04, gi);
0382     }
0383     lgs8gxx_soft_reset(priv);
0384     err = lgs8gxx_wait_ca_lock(priv, locked);
0385     if (err || !(*locked))
0386         return err;
0387     err = lgs8gxx_is_autodetect_finished(priv, &ad_fini);
0388     if (err != 0)
0389         return err;
0390     if (ad_fini) {
0391         dprintk("auto detect finished\n");
0392     } else
0393         *locked = 0;
0394 
0395     return 0;
0396 }
0397 
0398 static int lgs8gxx_auto_detect(struct lgs8gxx_state *priv,
0399                    u8 *detected_param, u8 *gi)
0400 {
0401     int i, j;
0402     int err = 0;
0403     u8 locked = 0, tmp_gi;
0404 
0405     dprintk("%s\n", __func__);
0406 
0407     lgs8gxx_set_mode_auto(priv);
0408     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0409         lgs8gxx_write_reg(priv, 0x67, 0xAA);
0410         lgs8gxx_write_reg(priv, 0x6E, 0x3F);
0411     } else {
0412         /* Guard Interval */
0413         lgs8gxx_write_reg(priv, 0x03, 00);
0414     }
0415 
0416     for (i = 0; i < 2; i++) {
0417         for (j = 0; j < 2; j++) {
0418             tmp_gi = GI_945;
0419             err = lgs8gxx_autolock_gi(priv, GI_945, j, &locked);
0420             if (err)
0421                 goto out;
0422             if (locked)
0423                 goto locked;
0424         }
0425         for (j = 0; j < 2; j++) {
0426             tmp_gi = GI_420;
0427             err = lgs8gxx_autolock_gi(priv, GI_420, j, &locked);
0428             if (err)
0429                 goto out;
0430             if (locked)
0431                 goto locked;
0432         }
0433         tmp_gi = GI_595;
0434         err = lgs8gxx_autolock_gi(priv, GI_595, 1, &locked);
0435         if (err)
0436             goto out;
0437         if (locked)
0438             goto locked;
0439     }
0440 
0441 locked:
0442     if ((err == 0) && (locked == 1)) {
0443         u8 t;
0444 
0445         if (priv->config->prod != LGS8GXX_PROD_LGS8G75) {
0446             lgs8gxx_read_reg(priv, 0xA2, &t);
0447             *detected_param = t;
0448         } else {
0449             lgs8gxx_read_reg(priv, 0x1F, &t);
0450             *detected_param = t & 0x3F;
0451         }
0452 
0453         if (tmp_gi == GI_945)
0454             dprintk("GI 945 locked\n");
0455         else if (tmp_gi == GI_595)
0456             dprintk("GI 595 locked\n");
0457         else if (tmp_gi == GI_420)
0458             dprintk("GI 420 locked\n");
0459         *gi = tmp_gi;
0460     }
0461     if (!locked)
0462         err = -1;
0463 
0464 out:
0465     return err;
0466 }
0467 
0468 static void lgs8gxx_auto_lock(struct lgs8gxx_state *priv)
0469 {
0470     s8 err;
0471     u8 gi = 0x2;
0472     u8 detected_param = 0;
0473 
0474     err = lgs8gxx_auto_detect(priv, &detected_param, &gi);
0475 
0476     if (err != 0) {
0477         dprintk("lgs8gxx_auto_detect failed\n");
0478     } else
0479         dprintk("detected param = 0x%02X\n", detected_param);
0480 
0481     /* Apply detected parameters */
0482     if (priv->config->prod == LGS8GXX_PROD_LGS8913) {
0483         u8 inter_leave_len = detected_param & TIM_MASK ;
0484         /* Fix 8913 time interleaver detection bug */
0485         inter_leave_len = (inter_leave_len == TIM_MIDDLE) ? 0x60 : 0x40;
0486         detected_param &= CF_MASK | SC_MASK  | LGS_FEC_MASK;
0487         detected_param |= inter_leave_len;
0488     }
0489     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0490         u8 t;
0491         lgs8gxx_read_reg(priv, 0x19, &t);
0492         t &= 0x81;
0493         t |= detected_param << 1;
0494         lgs8gxx_write_reg(priv, 0x19, t);
0495     } else {
0496         lgs8gxx_write_reg(priv, 0x7D, detected_param);
0497         if (priv->config->prod == LGS8GXX_PROD_LGS8913)
0498             lgs8gxx_write_reg(priv, 0xC0, detected_param);
0499     }
0500     /* lgs8gxx_soft_reset(priv); */
0501 
0502     /* Enter manual mode */
0503     lgs8gxx_set_mode_manual(priv);
0504 
0505     switch (gi) {
0506     case GI_945:
0507         priv->curr_gi = 945; break;
0508     case GI_595:
0509         priv->curr_gi = 595; break;
0510     case GI_420:
0511         priv->curr_gi = 420; break;
0512     default:
0513         priv->curr_gi = 945; break;
0514     }
0515 }
0516 
0517 static int lgs8gxx_set_mpeg_mode(struct lgs8gxx_state *priv,
0518     u8 serial, u8 clk_pol, u8 clk_gated)
0519 {
0520     int ret = 0;
0521     u8 t, reg_addr;
0522 
0523     reg_addr = (priv->config->prod == LGS8GXX_PROD_LGS8G75) ? 0x30 : 0xC2;
0524     ret = lgs8gxx_read_reg(priv, reg_addr, &t);
0525     if (ret != 0)
0526         return ret;
0527 
0528     t &= 0xF8;
0529     t |= serial ? TS_SERIAL : TS_PARALLEL;
0530     t |= clk_pol ? TS_CLK_INVERTED : TS_CLK_NORMAL;
0531     t |= clk_gated ? TS_CLK_GATED : TS_CLK_FREERUN;
0532 
0533     ret = lgs8gxx_write_reg(priv, reg_addr, t);
0534     if (ret != 0)
0535         return ret;
0536 
0537     return 0;
0538 }
0539 
0540 /* A/D input peak-to-peak voltage range */
0541 static int lgs8g75_set_adc_vpp(struct lgs8gxx_state *priv,
0542     u8 sel)
0543 {
0544     u8 r26 = 0x73, r27 = 0x90;
0545 
0546     if (priv->config->prod != LGS8GXX_PROD_LGS8G75)
0547         return 0;
0548 
0549     r26 |= (sel & 0x01) << 7;
0550     r27 |= (sel & 0x02) >> 1;
0551     lgs8gxx_write_reg(priv, 0x26, r26);
0552     lgs8gxx_write_reg(priv, 0x27, r27);
0553 
0554     return 0;
0555 }
0556 
0557 /* LGS8913 demod frontend functions */
0558 
0559 static int lgs8913_init(struct lgs8gxx_state *priv)
0560 {
0561     u8 t;
0562 
0563     /* LGS8913 specific */
0564     lgs8gxx_write_reg(priv, 0xc1, 0x3);
0565 
0566     lgs8gxx_read_reg(priv, 0x7c, &t);
0567     lgs8gxx_write_reg(priv, 0x7c, (t&0x8c) | 0x3);
0568 
0569     /* LGS8913 specific */
0570     lgs8gxx_read_reg(priv, 0xc3, &t);
0571     lgs8gxx_write_reg(priv, 0xc3, t&0x10);
0572 
0573 
0574     return 0;
0575 }
0576 
0577 static int lgs8g75_init_data(struct lgs8gxx_state *priv)
0578 {
0579     const struct firmware *fw;
0580     int rc;
0581     int i;
0582 
0583     rc = request_firmware(&fw, LGS8GXX_FIRMWARE, &priv->i2c->dev);
0584     if (rc)
0585         return rc;
0586 
0587     lgs8gxx_write_reg(priv, 0xC6, 0x40);
0588 
0589     lgs8gxx_write_reg(priv, 0x3D, 0x04);
0590     lgs8gxx_write_reg(priv, 0x39, 0x00);
0591 
0592     lgs8gxx_write_reg(priv, 0x3A, 0x00);
0593     lgs8gxx_write_reg(priv, 0x38, 0x00);
0594     lgs8gxx_write_reg(priv, 0x3B, 0x00);
0595     lgs8gxx_write_reg(priv, 0x38, 0x00);
0596 
0597     for (i = 0; i < fw->size; i++) {
0598         lgs8gxx_write_reg(priv, 0x38, 0x00);
0599         lgs8gxx_write_reg(priv, 0x3A, (u8)(i&0xff));
0600         lgs8gxx_write_reg(priv, 0x3B, (u8)(i>>8));
0601         lgs8gxx_write_reg(priv, 0x3C, fw->data[i]);
0602     }
0603 
0604     lgs8gxx_write_reg(priv, 0x38, 0x00);
0605 
0606     release_firmware(fw);
0607     return 0;
0608 }
0609 
0610 static int lgs8gxx_init(struct dvb_frontend *fe)
0611 {
0612     struct lgs8gxx_state *priv =
0613         (struct lgs8gxx_state *)fe->demodulator_priv;
0614     const struct lgs8gxx_config *config = priv->config;
0615     u8 data = 0;
0616     s8 err;
0617     dprintk("%s\n", __func__);
0618 
0619     lgs8gxx_read_reg(priv, 0, &data);
0620     dprintk("reg 0 = 0x%02X\n", data);
0621 
0622     if (config->prod == LGS8GXX_PROD_LGS8G75)
0623         lgs8g75_set_adc_vpp(priv, config->adc_vpp);
0624 
0625     /* Setup MPEG output format */
0626     err = lgs8gxx_set_mpeg_mode(priv, config->serial_ts,
0627                     config->ts_clk_pol,
0628                     config->ts_clk_gated);
0629     if (err != 0)
0630         return -EIO;
0631 
0632     if (config->prod == LGS8GXX_PROD_LGS8913)
0633         lgs8913_init(priv);
0634     lgs8gxx_set_if_freq(priv, priv->config->if_freq);
0635     lgs8gxx_set_ad_mode(priv);
0636 
0637     return 0;
0638 }
0639 
0640 static void lgs8gxx_release(struct dvb_frontend *fe)
0641 {
0642     struct lgs8gxx_state *state = fe->demodulator_priv;
0643     dprintk("%s\n", __func__);
0644 
0645     kfree(state);
0646 }
0647 
0648 
0649 static int lgs8gxx_write(struct dvb_frontend *fe, const u8 buf[], int len)
0650 {
0651     struct lgs8gxx_state *priv = fe->demodulator_priv;
0652 
0653     if (len != 2)
0654         return -EINVAL;
0655 
0656     return lgs8gxx_write_reg(priv, buf[0], buf[1]);
0657 }
0658 
0659 static int lgs8gxx_set_fe(struct dvb_frontend *fe)
0660 {
0661     struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
0662     struct lgs8gxx_state *priv = fe->demodulator_priv;
0663 
0664     dprintk("%s\n", __func__);
0665 
0666     /* set frequency */
0667     if (fe->ops.tuner_ops.set_params) {
0668         fe->ops.tuner_ops.set_params(fe);
0669         if (fe->ops.i2c_gate_ctrl)
0670             fe->ops.i2c_gate_ctrl(fe, 0);
0671     }
0672 
0673     /* start auto lock */
0674     lgs8gxx_auto_lock(priv);
0675 
0676     msleep(10);
0677 
0678     /* TODO: get real readings from device */
0679 
0680     /* bandwidth */
0681     fe_params->bandwidth_hz = 8000000;
0682 
0683     fe_params->code_rate_HP = FEC_AUTO;
0684     fe_params->code_rate_LP = FEC_AUTO;
0685 
0686     fe_params->modulation = QAM_AUTO;
0687 
0688     /* transmission mode */
0689     fe_params->transmission_mode = TRANSMISSION_MODE_AUTO;
0690 
0691     /* guard interval */
0692     fe_params->guard_interval = GUARD_INTERVAL_AUTO;
0693 
0694     /* hierarchy */
0695     fe_params->hierarchy = HIERARCHY_NONE;
0696 
0697     return 0;
0698 }
0699 
0700 static
0701 int lgs8gxx_get_tune_settings(struct dvb_frontend *fe,
0702                   struct dvb_frontend_tune_settings *fesettings)
0703 {
0704     /* FIXME: copy from tda1004x.c */
0705     fesettings->min_delay_ms = 800;
0706     fesettings->step_size = 0;
0707     fesettings->max_drift = 0;
0708     return 0;
0709 }
0710 
0711 static int lgs8gxx_read_status(struct dvb_frontend *fe,
0712                    enum fe_status *fe_status)
0713 {
0714     struct lgs8gxx_state *priv = fe->demodulator_priv;
0715     s8 ret;
0716     u8 t, locked = 0;
0717 
0718     dprintk("%s\n", __func__);
0719     *fe_status = 0;
0720 
0721     lgs8gxx_get_afc_phase(priv);
0722     lgs8gxx_is_locked(priv, &locked);
0723     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0724         if (locked)
0725             *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
0726                 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
0727         return 0;
0728     }
0729 
0730     ret = lgs8gxx_read_reg(priv, 0x4B, &t);
0731     if (ret != 0)
0732         return -EIO;
0733 
0734     dprintk("Reg 0x4B: 0x%02X\n", t);
0735 
0736     *fe_status = 0;
0737     if (priv->config->prod == LGS8GXX_PROD_LGS8913) {
0738         if ((t & 0x40) == 0x40)
0739             *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
0740         if ((t & 0x80) == 0x80)
0741             *fe_status |= FE_HAS_VITERBI | FE_HAS_SYNC |
0742                 FE_HAS_LOCK;
0743     } else {
0744         if ((t & 0x80) == 0x80)
0745             *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
0746                 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
0747     }
0748 
0749     /* success */
0750     dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
0751     return 0;
0752 }
0753 
0754 static int lgs8gxx_read_signal_agc(struct lgs8gxx_state *priv, u16 *signal)
0755 {
0756     u16 v;
0757     u8 agc_lvl[2], cat;
0758 
0759     dprintk("%s()\n", __func__);
0760     lgs8gxx_read_reg(priv, 0x3F, &agc_lvl[0]);
0761     lgs8gxx_read_reg(priv, 0x3E, &agc_lvl[1]);
0762 
0763     v = agc_lvl[0];
0764     v <<= 8;
0765     v |= agc_lvl[1];
0766 
0767     dprintk("agc_lvl: 0x%04X\n", v);
0768 
0769     if (v < 0x100)
0770         cat = 0;
0771     else if (v < 0x190)
0772         cat = 5;
0773     else if (v < 0x2A8)
0774         cat = 4;
0775     else if (v < 0x381)
0776         cat = 3;
0777     else if (v < 0x400)
0778         cat = 2;
0779     else if (v == 0x400)
0780         cat = 1;
0781     else
0782         cat = 0;
0783 
0784     *signal = cat * 65535 / 5;
0785 
0786     return 0;
0787 }
0788 
0789 static int lgs8913_read_signal_strength(struct lgs8gxx_state *priv, u16 *signal)
0790 {
0791     u8 t; s8 ret;
0792     s16 max_strength = 0;
0793     u8 str;
0794     u16 i, gi = priv->curr_gi;
0795 
0796     dprintk("%s\n", __func__);
0797 
0798     ret = lgs8gxx_read_reg(priv, 0x4B, &t);
0799     if (ret != 0)
0800         return -EIO;
0801 
0802     if (fake_signal_str) {
0803         if ((t & 0xC0) == 0xC0) {
0804             dprintk("Fake signal strength\n");
0805             *signal = 0x7FFF;
0806         } else
0807             *signal = 0;
0808         return 0;
0809     }
0810 
0811     dprintk("gi = %d\n", gi);
0812     for (i = 0; i < gi; i++) {
0813 
0814         if ((i & 0xFF) == 0)
0815             lgs8gxx_write_reg(priv, 0x84, 0x03 & (i >> 8));
0816         lgs8gxx_write_reg(priv, 0x83, i & 0xFF);
0817 
0818         lgs8gxx_read_reg(priv, 0x94, &str);
0819         if (max_strength < str)
0820             max_strength = str;
0821     }
0822 
0823     *signal = max_strength;
0824     dprintk("%s: signal=0x%02X\n", __func__, *signal);
0825 
0826     lgs8gxx_read_reg(priv, 0x95, &t);
0827     dprintk("%s: AVG Noise=0x%02X\n", __func__, t);
0828 
0829     return 0;
0830 }
0831 
0832 static int lgs8g75_read_signal_strength(struct lgs8gxx_state *priv, u16 *signal)
0833 {
0834     u8 t;
0835     s16 v = 0;
0836 
0837     dprintk("%s\n", __func__);
0838 
0839     lgs8gxx_read_reg(priv, 0xB1, &t);
0840     v |= t;
0841     v <<= 8;
0842     lgs8gxx_read_reg(priv, 0xB0, &t);
0843     v |= t;
0844 
0845     *signal = v;
0846     dprintk("%s: signal=0x%02X\n", __func__, *signal);
0847 
0848     return 0;
0849 }
0850 
0851 static int lgs8gxx_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
0852 {
0853     struct lgs8gxx_state *priv = fe->demodulator_priv;
0854 
0855     if (priv->config->prod == LGS8GXX_PROD_LGS8913)
0856         return lgs8913_read_signal_strength(priv, signal);
0857     else if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
0858         return lgs8g75_read_signal_strength(priv, signal);
0859     else
0860         return lgs8gxx_read_signal_agc(priv, signal);
0861 }
0862 
0863 static int lgs8gxx_read_snr(struct dvb_frontend *fe, u16 *snr)
0864 {
0865     struct lgs8gxx_state *priv = fe->demodulator_priv;
0866     u8 t;
0867     *snr = 0;
0868 
0869     if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
0870         lgs8gxx_read_reg(priv, 0x34, &t);
0871     else
0872         lgs8gxx_read_reg(priv, 0x95, &t);
0873     dprintk("AVG Noise=0x%02X\n", t);
0874     *snr = 256 - t;
0875     *snr <<= 8;
0876     dprintk("snr=0x%x\n", *snr);
0877 
0878     return 0;
0879 }
0880 
0881 static int lgs8gxx_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0882 {
0883     *ucblocks = 0;
0884     dprintk("%s: ucblocks=0x%x\n", __func__, *ucblocks);
0885     return 0;
0886 }
0887 
0888 static void packet_counter_start(struct lgs8gxx_state *priv)
0889 {
0890     u8 orig, t;
0891 
0892     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0893         lgs8gxx_read_reg(priv, 0x30, &orig);
0894         orig &= 0xE7;
0895         t = orig | 0x10;
0896         lgs8gxx_write_reg(priv, 0x30, t);
0897         t = orig | 0x18;
0898         lgs8gxx_write_reg(priv, 0x30, t);
0899         t = orig | 0x10;
0900         lgs8gxx_write_reg(priv, 0x30, t);
0901     } else {
0902         lgs8gxx_write_reg(priv, 0xC6, 0x01);
0903         lgs8gxx_write_reg(priv, 0xC6, 0x41);
0904         lgs8gxx_write_reg(priv, 0xC6, 0x01);
0905     }
0906 }
0907 
0908 static void packet_counter_stop(struct lgs8gxx_state *priv)
0909 {
0910     u8 t;
0911 
0912     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0913         lgs8gxx_read_reg(priv, 0x30, &t);
0914         t &= 0xE7;
0915         lgs8gxx_write_reg(priv, 0x30, t);
0916     } else {
0917         lgs8gxx_write_reg(priv, 0xC6, 0x81);
0918     }
0919 }
0920 
0921 static int lgs8gxx_read_ber(struct dvb_frontend *fe, u32 *ber)
0922 {
0923     struct lgs8gxx_state *priv = fe->demodulator_priv;
0924     u8 reg_err, reg_total, t;
0925     u32 total_cnt = 0, err_cnt = 0;
0926     int i;
0927 
0928     dprintk("%s\n", __func__);
0929 
0930     packet_counter_start(priv);
0931     msleep(200);
0932     packet_counter_stop(priv);
0933 
0934     if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
0935         reg_total = 0x28; reg_err = 0x2C;
0936     } else {
0937         reg_total = 0xD0; reg_err = 0xD4;
0938     }
0939 
0940     for (i = 0; i < 4; i++) {
0941         total_cnt <<= 8;
0942         lgs8gxx_read_reg(priv, reg_total+3-i, &t);
0943         total_cnt |= t;
0944     }
0945     for (i = 0; i < 4; i++) {
0946         err_cnt <<= 8;
0947         lgs8gxx_read_reg(priv, reg_err+3-i, &t);
0948         err_cnt |= t;
0949     }
0950     dprintk("error=%d total=%d\n", err_cnt, total_cnt);
0951 
0952     if (total_cnt == 0)
0953         *ber = 0;
0954     else
0955         *ber = err_cnt * 100 / total_cnt;
0956 
0957     dprintk("%s: ber=0x%x\n", __func__, *ber);
0958     return 0;
0959 }
0960 
0961 static int lgs8gxx_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
0962 {
0963     struct lgs8gxx_state *priv = fe->demodulator_priv;
0964 
0965     if (priv->config->tuner_address == 0)
0966         return 0;
0967     if (enable) {
0968         u8 v = 0x80 | priv->config->tuner_address;
0969         return lgs8gxx_write_reg(priv, 0x01, v);
0970     }
0971     return lgs8gxx_write_reg(priv, 0x01, 0);
0972 }
0973 
0974 static const struct dvb_frontend_ops lgs8gxx_ops = {
0975     .delsys = { SYS_DTMB },
0976     .info = {
0977         .name = "Legend Silicon LGS8913/LGS8GXX DMB-TH",
0978         .frequency_min_hz = 474 * MHz,
0979         .frequency_max_hz = 858 * MHz,
0980         .frequency_stepsize_hz = 10 * kHz,
0981         .caps =
0982             FE_CAN_FEC_AUTO |
0983             FE_CAN_QAM_AUTO |
0984             FE_CAN_TRANSMISSION_MODE_AUTO |
0985             FE_CAN_GUARD_INTERVAL_AUTO
0986     },
0987 
0988     .release = lgs8gxx_release,
0989 
0990     .init = lgs8gxx_init,
0991     .write = lgs8gxx_write,
0992     .i2c_gate_ctrl = lgs8gxx_i2c_gate_ctrl,
0993 
0994     .set_frontend = lgs8gxx_set_fe,
0995     .get_tune_settings = lgs8gxx_get_tune_settings,
0996 
0997     .read_status = lgs8gxx_read_status,
0998     .read_ber = lgs8gxx_read_ber,
0999     .read_signal_strength = lgs8gxx_read_signal_strength,
1000     .read_snr = lgs8gxx_read_snr,
1001     .read_ucblocks = lgs8gxx_read_ucblocks,
1002 };
1003 
1004 struct dvb_frontend *lgs8gxx_attach(const struct lgs8gxx_config *config,
1005     struct i2c_adapter *i2c)
1006 {
1007     struct lgs8gxx_state *priv = NULL;
1008     u8 data = 0;
1009 
1010     dprintk("%s()\n", __func__);
1011 
1012     if (config == NULL || i2c == NULL)
1013         return NULL;
1014 
1015     priv = kzalloc(sizeof(struct lgs8gxx_state), GFP_KERNEL);
1016     if (priv == NULL)
1017         goto error_out;
1018 
1019     priv->config = config;
1020     priv->i2c = i2c;
1021 
1022     /* check if the demod is there */
1023     if (lgs8gxx_read_reg(priv, 0, &data) != 0) {
1024         dprintk("%s lgs8gxx not found at i2c addr 0x%02X\n",
1025             __func__, priv->config->demod_address);
1026         goto error_out;
1027     }
1028 
1029     lgs8gxx_read_reg(priv, 1, &data);
1030 
1031     memcpy(&priv->frontend.ops, &lgs8gxx_ops,
1032            sizeof(struct dvb_frontend_ops));
1033     priv->frontend.demodulator_priv = priv;
1034 
1035     if (config->prod == LGS8GXX_PROD_LGS8G75)
1036         lgs8g75_init_data(priv);
1037 
1038     return &priv->frontend;
1039 
1040 error_out:
1041     dprintk("%s() error_out\n", __func__);
1042     kfree(priv);
1043     return NULL;
1044 
1045 }
1046 EXPORT_SYMBOL(lgs8gxx_attach);
1047 
1048 MODULE_DESCRIPTION("Legend Silicon LGS8913/LGS8GXX DMB-TH demodulator driver");
1049 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
1050 MODULE_LICENSE("GPL");
1051 MODULE_FIRMWARE(LGS8GXX_FIRMWARE);
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