Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *    Support for LGDT3302 and LGDT3303 - VSB/QAM
0004  *
0005  *    Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
0006  */
0007 
0008 /*
0009  *                      NOTES ABOUT THIS DRIVER
0010  *
0011  * This Linux driver supports:
0012  *   DViCO FusionHDTV 3 Gold-Q
0013  *   DViCO FusionHDTV 3 Gold-T
0014  *   DViCO FusionHDTV 5 Gold
0015  *   DViCO FusionHDTV 5 Lite
0016  *   DViCO FusionHDTV 5 USB Gold
0017  *   Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
0018  *   pcHDTV HD5500
0019  *
0020  */
0021 
0022 #include <linux/kernel.h>
0023 #include <linux/module.h>
0024 #include <linux/init.h>
0025 #include <linux/delay.h>
0026 #include <linux/string.h>
0027 #include <linux/slab.h>
0028 #include <asm/byteorder.h>
0029 
0030 #include <media/dvb_frontend.h>
0031 #include <media/dvb_math.h>
0032 #include "lgdt330x_priv.h"
0033 #include "lgdt330x.h"
0034 
0035 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
0036 /* #define USE_EQMSE */
0037 
0038 static int debug;
0039 module_param(debug, int, 0644);
0040 MODULE_PARM_DESC(debug, "Turn on/off lgdt330x frontend debugging (default:off).");
0041 
0042 #define dprintk(state, fmt, arg...) do {                \
0043     if (debug)                          \
0044         dev_printk(KERN_DEBUG, &state->client->dev, fmt, ##arg);\
0045 } while (0)
0046 
0047 struct lgdt330x_state {
0048     struct i2c_client *client;
0049 
0050     /* Configuration settings */
0051     struct lgdt330x_config config;
0052 
0053     struct dvb_frontend frontend;
0054 
0055     /* Demodulator private data */
0056     enum fe_modulation current_modulation;
0057     u32 snr;    /* Result of last SNR calculation */
0058     u16 ucblocks;
0059     unsigned long last_stats_time;
0060 
0061     /* Tuner private data */
0062     u32 current_frequency;
0063 };
0064 
0065 static int i2c_write_demod_bytes(struct lgdt330x_state *state,
0066                  const u8 *buf, /* data bytes to send */
0067                  int len  /* number of bytes to send */)
0068 {
0069     int i;
0070     int err;
0071 
0072     for (i = 0; i < len - 1; i += 2) {
0073         err = i2c_master_send(state->client, buf, 2);
0074         if (err != 2) {
0075             dev_warn(&state->client->dev,
0076                  "%s: error (addr %02x <- %02x, err = %i)\n",
0077                 __func__, buf[0], buf[1], err);
0078             if (err < 0)
0079                 return err;
0080             else
0081                 return -EREMOTEIO;
0082         }
0083         buf += 2;
0084     }
0085     return 0;
0086 }
0087 
0088 /*
0089  * This routine writes the register (reg) to the demod bus
0090  * then reads the data returned for (len) bytes.
0091  */
0092 static int i2c_read_demod_bytes(struct lgdt330x_state *state,
0093                 enum I2C_REG reg, u8 *buf, int len)
0094 {
0095     u8 wr[] = { reg };
0096     struct i2c_msg msg[] = {
0097         {
0098             .addr = state->client->addr,
0099             .flags = 0,
0100             .buf = wr,
0101             .len = 1
0102         }, {
0103             .addr = state->client->addr,
0104             .flags = I2C_M_RD,
0105             .buf = buf,
0106             .len = len
0107         },
0108     };
0109     int ret;
0110 
0111     ret = i2c_transfer(state->client->adapter, msg, 2);
0112     if (ret != 2) {
0113         dev_warn(&state->client->dev,
0114              "%s: addr 0x%02x select 0x%02x error (ret == %i)\n",
0115              __func__, state->client->addr, reg, ret);
0116         if (ret >= 0)
0117             ret = -EIO;
0118     } else {
0119         ret = 0;
0120     }
0121     return ret;
0122 }
0123 
0124 /* Software reset */
0125 static int lgdt3302_sw_reset(struct lgdt330x_state *state)
0126 {
0127     u8 ret;
0128     u8 reset[] = {
0129         IRQ_MASK,
0130         /*
0131          * bit 6 is active low software reset
0132          * bits 5-0 are 1 to mask interrupts
0133          */
0134         0x00
0135     };
0136 
0137     ret = i2c_write_demod_bytes(state,
0138                     reset, sizeof(reset));
0139     if (ret == 0) {
0140         /* force reset high (inactive) and unmask interrupts */
0141         reset[1] = 0x7f;
0142         ret = i2c_write_demod_bytes(state,
0143                         reset, sizeof(reset));
0144     }
0145     return ret;
0146 }
0147 
0148 static int lgdt3303_sw_reset(struct lgdt330x_state *state)
0149 {
0150     u8 ret;
0151     u8 reset[] = {
0152         0x02,
0153         0x00 /* bit 0 is active low software reset */
0154     };
0155 
0156     ret = i2c_write_demod_bytes(state,
0157                     reset, sizeof(reset));
0158     if (ret == 0) {
0159         /* force reset high (inactive) */
0160         reset[1] = 0x01;
0161         ret = i2c_write_demod_bytes(state,
0162                         reset, sizeof(reset));
0163     }
0164     return ret;
0165 }
0166 
0167 static int lgdt330x_sw_reset(struct lgdt330x_state *state)
0168 {
0169     switch (state->config.demod_chip) {
0170     case LGDT3302:
0171         return lgdt3302_sw_reset(state);
0172     case LGDT3303:
0173         return lgdt3303_sw_reset(state);
0174     default:
0175         return -ENODEV;
0176     }
0177 }
0178 
0179 static int lgdt330x_init(struct dvb_frontend *fe)
0180 {
0181     struct lgdt330x_state *state = fe->demodulator_priv;
0182     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0183     char  *chip_name;
0184     int    err;
0185     /*
0186      * Array of byte pairs <address, value>
0187      * to initialize each different chip
0188      */
0189     static const u8 lgdt3302_init_data[] = {
0190         /* Use 50MHz param values from spec sheet since xtal is 50 */
0191         /*
0192          * Change the value of NCOCTFV[25:0] of carrier
0193          * recovery center frequency register
0194          */
0195         VSB_CARRIER_FREQ0, 0x00,
0196         VSB_CARRIER_FREQ1, 0x87,
0197         VSB_CARRIER_FREQ2, 0x8e,
0198         VSB_CARRIER_FREQ3, 0x01,
0199         /*
0200          * Change the TPCLK pin polarity
0201          * data is valid on falling clock
0202          */
0203         DEMUX_CONTROL, 0xfb,
0204         /*
0205          * Change the value of IFBW[11:0] of
0206          * AGC IF/RF loop filter bandwidth register
0207          */
0208         AGC_RF_BANDWIDTH0, 0x40,
0209         AGC_RF_BANDWIDTH1, 0x93,
0210         AGC_RF_BANDWIDTH2, 0x00,
0211         /*
0212          * Change the value of bit 6, 'nINAGCBY' and
0213          * 'NSSEL[1:0] of ACG function control register 2
0214          */
0215         AGC_FUNC_CTRL2, 0xc6,
0216         /*
0217          * Change the value of bit 6 'RFFIX'
0218          * of AGC function control register 3
0219          */
0220         AGC_FUNC_CTRL3, 0x40,
0221         /*
0222          * Set the value of 'INLVTHD' register 0x2a/0x2c
0223          * to 0x7fe
0224          */
0225         AGC_DELAY0, 0x07,
0226         AGC_DELAY2, 0xfe,
0227         /*
0228          * Change the value of IAGCBW[15:8]
0229          * of inner AGC loop filter bandwidth
0230          */
0231         AGC_LOOP_BANDWIDTH0, 0x08,
0232         AGC_LOOP_BANDWIDTH1, 0x9a
0233     };
0234     static const u8 lgdt3303_init_data[] = {
0235         0x4c, 0x14
0236     };
0237     static const u8 flip_1_lgdt3303_init_data[] = {
0238         0x4c, 0x14,
0239         0x87, 0xf3
0240     };
0241     static const u8 flip_2_lgdt3303_init_data[] = {
0242         0x4c, 0x14,
0243         0x87, 0xda
0244     };
0245 
0246     /*
0247      * Hardware reset is done using gpio[0] of cx23880x chip.
0248      * I'd like to do it here, but don't know how to find chip address.
0249      * cx88-cards.c arranges for the reset bit to be inactive (high).
0250      * Maybe there needs to be a callable function in cx88-core or
0251      * the caller of this function needs to do it.
0252      */
0253 
0254     switch (state->config.demod_chip) {
0255     case LGDT3302:
0256         chip_name = "LGDT3302";
0257         err = i2c_write_demod_bytes(state, lgdt3302_init_data,
0258                         sizeof(lgdt3302_init_data));
0259         break;
0260     case LGDT3303:
0261         chip_name = "LGDT3303";
0262         switch (state->config.clock_polarity_flip) {
0263         case 2:
0264             err = i2c_write_demod_bytes(state,
0265                             flip_2_lgdt3303_init_data,
0266                             sizeof(flip_2_lgdt3303_init_data));
0267             break;
0268         case 1:
0269             err = i2c_write_demod_bytes(state,
0270                             flip_1_lgdt3303_init_data,
0271                             sizeof(flip_1_lgdt3303_init_data));
0272             break;
0273         case 0:
0274         default:
0275             err = i2c_write_demod_bytes(state, lgdt3303_init_data,
0276                             sizeof(lgdt3303_init_data));
0277         }
0278         break;
0279     default:
0280         chip_name = "undefined";
0281         dev_warn(&state->client->dev,
0282              "Only LGDT3302 and LGDT3303 are supported chips.\n");
0283         err = -ENODEV;
0284     }
0285     dprintk(state, "Initialized the %s chip\n", chip_name);
0286     if (err < 0)
0287         return err;
0288 
0289     p->cnr.len = 1;
0290     p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0291     p->block_error.len = 1;
0292     p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0293     p->block_count.len = 1;
0294     p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0295     state->last_stats_time = 0;
0296 
0297     return lgdt330x_sw_reset(state);
0298 }
0299 
0300 static int lgdt330x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0301 {
0302     struct lgdt330x_state *state = fe->demodulator_priv;
0303 
0304     *ucblocks = state->ucblocks;
0305 
0306     return 0;
0307 }
0308 
0309 static int lgdt330x_set_parameters(struct dvb_frontend *fe)
0310 {
0311     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0312     struct lgdt330x_state *state = fe->demodulator_priv;
0313     /*
0314      * Array of byte pairs <address, value>
0315      * to initialize 8VSB for lgdt3303 chip 50 MHz IF
0316      */
0317     static const u8 lgdt3303_8vsb_44_data[] = {
0318         0x04, 0x00,
0319         0x0d, 0x40,
0320         0x0e, 0x87,
0321         0x0f, 0x8e,
0322         0x10, 0x01,
0323         0x47, 0x8b
0324     };
0325     /*
0326      * Array of byte pairs <address, value>
0327      * to initialize QAM for lgdt3303 chip
0328      */
0329     static const u8 lgdt3303_qam_data[] = {
0330         0x04, 0x00,
0331         0x0d, 0x00,
0332         0x0e, 0x00,
0333         0x0f, 0x00,
0334         0x10, 0x00,
0335         0x51, 0x63,
0336         0x47, 0x66,
0337         0x48, 0x66,
0338         0x4d, 0x1a,
0339         0x49, 0x08,
0340         0x4a, 0x9b
0341     };
0342     u8 top_ctrl_cfg[]   = { TOP_CONTROL, 0x03 };
0343 
0344     int err = 0;
0345     /* Change only if we are actually changing the modulation */
0346     if (state->current_modulation != p->modulation) {
0347         switch (p->modulation) {
0348         case VSB_8:
0349             dprintk(state, "VSB_8 MODE\n");
0350 
0351             /* Select VSB mode */
0352             top_ctrl_cfg[1] = 0x03;
0353 
0354             /* Select ANT connector if supported by card */
0355             if (state->config.pll_rf_set)
0356                 state->config.pll_rf_set(fe, 1);
0357 
0358             if (state->config.demod_chip == LGDT3303) {
0359                 err = i2c_write_demod_bytes(state,
0360                                 lgdt3303_8vsb_44_data,
0361                                 sizeof(lgdt3303_8vsb_44_data));
0362             }
0363             break;
0364 
0365         case QAM_64:
0366             dprintk(state, "QAM_64 MODE\n");
0367 
0368             /* Select QAM_64 mode */
0369             top_ctrl_cfg[1] = 0x00;
0370 
0371             /* Select CABLE connector if supported by card */
0372             if (state->config.pll_rf_set)
0373                 state->config.pll_rf_set(fe, 0);
0374 
0375             if (state->config.demod_chip == LGDT3303) {
0376                 err = i2c_write_demod_bytes(state,
0377                                 lgdt3303_qam_data,
0378                                 sizeof(lgdt3303_qam_data));
0379             }
0380             break;
0381 
0382         case QAM_256:
0383             dprintk(state, "QAM_256 MODE\n");
0384 
0385             /* Select QAM_256 mode */
0386             top_ctrl_cfg[1] = 0x01;
0387 
0388             /* Select CABLE connector if supported by card */
0389             if (state->config.pll_rf_set)
0390                 state->config.pll_rf_set(fe, 0);
0391 
0392             if (state->config.demod_chip == LGDT3303) {
0393                 err = i2c_write_demod_bytes(state,
0394                                 lgdt3303_qam_data,
0395                                 sizeof(lgdt3303_qam_data));
0396             }
0397             break;
0398         default:
0399             dev_warn(&state->client->dev,
0400                  "%s: Modulation type(%d) UNSUPPORTED\n",
0401                  __func__, p->modulation);
0402             return -1;
0403         }
0404         if (err < 0)
0405             dev_warn(&state->client->dev,
0406                  "%s: error blasting bytes to lgdt3303 for modulation type(%d)\n",
0407                  __func__, p->modulation);
0408 
0409         /*
0410          * select serial or parallel MPEG hardware interface
0411          * Serial:   0x04 for LGDT3302 or 0x40 for LGDT3303
0412          * Parallel: 0x00
0413          */
0414         top_ctrl_cfg[1] |= state->config.serial_mpeg;
0415 
0416         /* Select the requested mode */
0417         i2c_write_demod_bytes(state, top_ctrl_cfg,
0418                       sizeof(top_ctrl_cfg));
0419         if (state->config.set_ts_params)
0420             state->config.set_ts_params(fe, 0);
0421         state->current_modulation = p->modulation;
0422     }
0423 
0424     /* Tune to the specified frequency */
0425     if (fe->ops.tuner_ops.set_params) {
0426         fe->ops.tuner_ops.set_params(fe);
0427         if (fe->ops.i2c_gate_ctrl)
0428             fe->ops.i2c_gate_ctrl(fe, 0);
0429     }
0430 
0431     /* Keep track of the new frequency */
0432     /*
0433      * FIXME this is the wrong way to do this...
0434      * The tuner is shared with the video4linux analog API
0435      */
0436     state->current_frequency = p->frequency;
0437 
0438     lgdt330x_sw_reset(state);
0439     return 0;
0440 }
0441 
0442 static int lgdt330x_get_frontend(struct dvb_frontend *fe,
0443                  struct dtv_frontend_properties *p)
0444 {
0445     struct lgdt330x_state *state = fe->demodulator_priv;
0446 
0447     p->frequency = state->current_frequency;
0448     return 0;
0449 }
0450 
0451 /*
0452  * Calculate SNR estimation (scaled by 2^24)
0453  *
0454  * 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM
0455  * equations from LGDT3303 datasheet.  VSB is the same between the '02
0456  * and '03, so maybe QAM is too?  Perhaps someone with a newer datasheet
0457  * that has QAM information could verify?
0458  *
0459  * For 8-VSB: (two ways, take your pick)
0460  * LGDT3302:
0461  *   SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE)
0462  * LGDT3303:
0463  *   SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE)
0464  * LGDT3302 & LGDT3303:
0465  *   SNR_PT = 10 * log10(25 * 32^2 / PT_MSE)  (we use this one)
0466  * For 64-QAM:
0467  *   SNR    = 10 * log10( 688128   / MSEQAM)
0468  * For 256-QAM:
0469  *   SNR    = 10 * log10( 696320   / MSEQAM)
0470  *
0471  * We re-write the snr equation as:
0472  *   SNR * 2^24 = 10*(c - intlog10(MSE))
0473  * Where for 256-QAM, c = log10(696320) * 2^24, and so on.
0474  */
0475 static u32 calculate_snr(u32 mse, u32 c)
0476 {
0477     if (mse == 0) /* No signal */
0478         return 0;
0479 
0480     mse = intlog10(mse);
0481     if (mse > c) {
0482         /*
0483          * Negative SNR, which is possible, but realisticly the
0484          * demod will lose lock before the signal gets this bad.
0485          * The API only allows for unsigned values, so just return 0
0486          */
0487         return 0;
0488     }
0489     return 10 * (c - mse);
0490 }
0491 
0492 static int lgdt3302_read_snr(struct dvb_frontend *fe)
0493 {
0494     struct lgdt330x_state *state = fe->demodulator_priv;
0495     u8 buf[5];  /* read data buffer */
0496     u32 noise;  /* noise value */
0497     u32 c;      /* per-modulation SNR calculation constant */
0498 
0499     switch (state->current_modulation) {
0500     case VSB_8:
0501         i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5);
0502 #ifdef USE_EQMSE
0503         /* Use Equalizer Mean-Square Error Register */
0504         /* SNR for ranges from -15.61 to +41.58 */
0505         noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
0506         c = 69765745; /* log10(25*24^2)*2^24 */
0507 #else
0508         /* Use Phase Tracker Mean-Square Error Register */
0509         /* SNR for ranges from -13.11 to +44.08 */
0510         noise = ((buf[0] & 7 << 3) << 13) | (buf[3] << 8) | buf[4];
0511         c = 73957994; /* log10(25*32^2)*2^24 */
0512 #endif
0513         break;
0514     case QAM_64:
0515     case QAM_256:
0516         i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
0517         noise = ((buf[0] & 3) << 8) | buf[1];
0518         c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
0519         /* log10(688128)*2^24 and log10(696320)*2^24 */
0520         break;
0521     default:
0522         dev_err(&state->client->dev,
0523             "%s: Modulation set to unsupported value\n",
0524             __func__);
0525 
0526         state->snr = 0;
0527 
0528         return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
0529     }
0530 
0531     state->snr = calculate_snr(noise, c);
0532 
0533     dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
0534         state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
0535 
0536     return 0;
0537 }
0538 
0539 static int lgdt3303_read_snr(struct dvb_frontend *fe)
0540 {
0541     struct lgdt330x_state *state = fe->demodulator_priv;
0542     u8 buf[5];  /* read data buffer */
0543     u32 noise;  /* noise value */
0544     u32 c;      /* per-modulation SNR calculation constant */
0545 
0546     switch (state->current_modulation) {
0547     case VSB_8:
0548         i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5);
0549 #ifdef USE_EQMSE
0550         /* Use Equalizer Mean-Square Error Register */
0551         /* SNR for ranges from -16.12 to +44.08 */
0552         noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2];
0553         c = 73957994; /* log10(25*32^2)*2^24 */
0554 #else
0555         /* Use Phase Tracker Mean-Square Error Register */
0556         /* SNR for ranges from -13.11 to +44.08 */
0557         noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
0558         c = 73957994; /* log10(25*32^2)*2^24 */
0559 #endif
0560         break;
0561     case QAM_64:
0562     case QAM_256:
0563         i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
0564         noise = (buf[0] << 8) | buf[1];
0565         c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
0566         /* log10(688128)*2^24 and log10(696320)*2^24 */
0567         break;
0568     default:
0569         dev_err(&state->client->dev,
0570             "%s: Modulation set to unsupported value\n",
0571             __func__);
0572         state->snr = 0;
0573         return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
0574     }
0575 
0576     state->snr = calculate_snr(noise, c);
0577 
0578     dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
0579         state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
0580 
0581     return 0;
0582 }
0583 
0584 static int lgdt330x_read_snr(struct dvb_frontend *fe, u16 *snr)
0585 {
0586     struct lgdt330x_state *state = fe->demodulator_priv;
0587 
0588     *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
0589 
0590     return 0;
0591 }
0592 
0593 static int lgdt330x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
0594 {
0595     /* Calculate Strength from SNR up to 35dB */
0596     /*
0597      * Even though the SNR can go higher than 35dB, there is some comfort
0598      * factor in having a range of strong signals that can show at 100%
0599      */
0600     struct lgdt330x_state *state = fe->demodulator_priv;
0601     u16 snr;
0602     int ret;
0603 
0604     ret = fe->ops.read_snr(fe, &snr);
0605     if (ret != 0)
0606         return ret;
0607     /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
0608     /* scale the range 0 - 35*2^24 into 0 - 65535 */
0609     if (state->snr >= 8960 * 0x10000)
0610         *strength = 0xffff;
0611     else
0612         *strength = state->snr / 8960;
0613 
0614     return 0;
0615 }
0616 
0617 
0618 static int lgdt3302_read_status(struct dvb_frontend *fe,
0619                 enum fe_status *status)
0620 {
0621     struct lgdt330x_state *state = fe->demodulator_priv;
0622     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0623     u8 buf[3];
0624     int err;
0625 
0626     *status = 0; /* Reset status result */
0627 
0628     /* AGC status register */
0629     i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
0630     dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
0631     if ((buf[0] & 0x0c) == 0x8) {
0632         /*
0633          * Test signal does not exist flag
0634          * as well as the AGC lock flag.
0635          */
0636         *status |= FE_HAS_SIGNAL;
0637     }
0638 
0639     /*
0640      * You must set the Mask bits to 1 in the IRQ_MASK in order
0641      * to see that status bit in the IRQ_STATUS register.
0642      * This is done in SwReset();
0643      */
0644 
0645     /* signal status */
0646     i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
0647     dprintk(state,
0648         "TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n",
0649         buf[0], buf[1], buf[2]);
0650 
0651     /* sync status */
0652     if ((buf[2] & 0x03) == 0x01)
0653         *status |= FE_HAS_SYNC;
0654 
0655     /* FEC error status */
0656     if ((buf[2] & 0x0c) == 0x08)
0657         *status |= FE_HAS_LOCK | FE_HAS_VITERBI;
0658 
0659     /* Carrier Recovery Lock Status Register */
0660     i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
0661     dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
0662     switch (state->current_modulation) {
0663     case QAM_256:
0664     case QAM_64:
0665         /* Need to understand why there are 3 lock levels here */
0666         if ((buf[0] & 0x07) == 0x07)
0667             *status |= FE_HAS_CARRIER;
0668         break;
0669     case VSB_8:
0670         if ((buf[0] & 0x80) == 0x80)
0671             *status |= FE_HAS_CARRIER;
0672         break;
0673     default:
0674         dev_warn(&state->client->dev,
0675              "%s: Modulation set to unsupported value\n",
0676              __func__);
0677     }
0678 
0679     if (!(*status & FE_HAS_LOCK)) {
0680         p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0681         p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0682         p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0683         return 0;
0684     }
0685 
0686     if (state->last_stats_time &&
0687         time_is_after_jiffies(state->last_stats_time))
0688         return 0;
0689 
0690     state->last_stats_time = jiffies + msecs_to_jiffies(1000);
0691 
0692     err = lgdt3302_read_snr(fe);
0693     if (!err) {
0694         p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0695         p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
0696     } else {
0697         p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0698     }
0699 
0700     err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
0701                        buf, sizeof(buf));
0702     if (!err) {
0703         state->ucblocks = (buf[0] << 8) | buf[1];
0704 
0705         dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
0706 
0707         p->block_error.stat[0].uvalue += state->ucblocks;
0708         /* FIXME: what's the basis for block count */
0709         p->block_count.stat[0].uvalue += 10000;
0710 
0711         p->block_error.stat[0].scale = FE_SCALE_COUNTER;
0712         p->block_count.stat[0].scale = FE_SCALE_COUNTER;
0713     } else {
0714         p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0715         p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0716     }
0717 
0718     return 0;
0719 }
0720 
0721 static int lgdt3303_read_status(struct dvb_frontend *fe,
0722                 enum fe_status *status)
0723 {
0724     struct lgdt330x_state *state = fe->demodulator_priv;
0725     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0726     u8 buf[3];
0727     int err;
0728 
0729     *status = 0; /* Reset status result */
0730 
0731     /* lgdt3303 AGC status register */
0732     err = i2c_read_demod_bytes(state, 0x58, buf, 1);
0733     if (err < 0)
0734         return err;
0735 
0736     dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
0737     if ((buf[0] & 0x21) == 0x01) {
0738         /*
0739          * Test input signal does not exist flag
0740          * as well as the AGC lock flag.
0741          */
0742         *status |= FE_HAS_SIGNAL;
0743     }
0744 
0745     /* Carrier Recovery Lock Status Register */
0746     i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
0747     dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
0748     switch (state->current_modulation) {
0749     case QAM_256:
0750     case QAM_64:
0751         /* Need to understand why there are 3 lock levels here */
0752         if ((buf[0] & 0x07) == 0x07)
0753             *status |= FE_HAS_CARRIER;
0754         else
0755             break;
0756         i2c_read_demod_bytes(state, 0x8a, buf, 1);
0757         dprintk(state, "QAM LOCK = 0x%02x\n", buf[0]);
0758 
0759         if ((buf[0] & 0x04) == 0x04)
0760             *status |= FE_HAS_SYNC;
0761         if ((buf[0] & 0x01) == 0x01)
0762             *status |= FE_HAS_LOCK;
0763         if ((buf[0] & 0x08) == 0x08)
0764             *status |= FE_HAS_VITERBI;
0765         break;
0766     case VSB_8:
0767         if ((buf[0] & 0x80) == 0x80)
0768             *status |= FE_HAS_CARRIER;
0769         else
0770             break;
0771         i2c_read_demod_bytes(state, 0x38, buf, 1);
0772         dprintk(state, "8-VSB LOCK = 0x%02x\n", buf[0]);
0773 
0774         if ((buf[0] & 0x02) == 0x00)
0775             *status |= FE_HAS_SYNC;
0776         if ((buf[0] & 0x01) == 0x01)
0777             *status |= FE_HAS_VITERBI | FE_HAS_LOCK;
0778         break;
0779     default:
0780         dev_warn(&state->client->dev,
0781              "%s: Modulation set to unsupported value\n",
0782              __func__);
0783     }
0784 
0785     if (!(*status & FE_HAS_LOCK)) {
0786         p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0787         p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0788         p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0789         return 0;
0790     }
0791 
0792     if (state->last_stats_time &&
0793         time_is_after_jiffies(state->last_stats_time))
0794         return 0;
0795 
0796     state->last_stats_time = jiffies + msecs_to_jiffies(1000);
0797 
0798     err = lgdt3303_read_snr(fe);
0799     if (!err) {
0800         p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0801         p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
0802     } else {
0803         p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0804     }
0805 
0806     err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
0807                        buf, sizeof(buf));
0808     if (!err) {
0809         state->ucblocks = (buf[0] << 8) | buf[1];
0810 
0811         dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
0812 
0813         p->block_error.stat[0].uvalue += state->ucblocks;
0814         /* FIXME: what's the basis for block count */
0815         p->block_count.stat[0].uvalue += 10000;
0816 
0817         p->block_error.stat[0].scale = FE_SCALE_COUNTER;
0818         p->block_count.stat[0].scale = FE_SCALE_COUNTER;
0819     } else {
0820         p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0821         p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0822     }
0823 
0824     return 0;
0825 }
0826 
0827 static int
0828 lgdt330x_get_tune_settings(struct dvb_frontend *fe,
0829                struct dvb_frontend_tune_settings *fe_tune_settings)
0830 {
0831     /* I have no idea about this - it may not be needed */
0832     fe_tune_settings->min_delay_ms = 500;
0833     fe_tune_settings->step_size = 0;
0834     fe_tune_settings->max_drift = 0;
0835     return 0;
0836 }
0837 
0838 static void lgdt330x_release(struct dvb_frontend *fe)
0839 {
0840     struct lgdt330x_state *state = fe->demodulator_priv;
0841     struct i2c_client *client = state->client;
0842 
0843     dev_dbg(&client->dev, "\n");
0844 
0845     i2c_unregister_device(client);
0846 }
0847 
0848 static struct dvb_frontend *lgdt330x_get_dvb_frontend(struct i2c_client *client)
0849 {
0850     struct lgdt330x_state *state = i2c_get_clientdata(client);
0851 
0852     dev_dbg(&client->dev, "\n");
0853 
0854     return &state->frontend;
0855 }
0856 
0857 static const struct dvb_frontend_ops lgdt3302_ops;
0858 static const struct dvb_frontend_ops lgdt3303_ops;
0859 
0860 static int lgdt330x_probe(struct i2c_client *client,
0861               const struct i2c_device_id *id)
0862 {
0863     struct lgdt330x_state *state = NULL;
0864     u8 buf[1];
0865 
0866     /* Allocate memory for the internal state */
0867     state = kzalloc(sizeof(*state), GFP_KERNEL);
0868     if (!state)
0869         goto error;
0870 
0871     /* Setup the state */
0872     memcpy(&state->config, client->dev.platform_data,
0873            sizeof(state->config));
0874     i2c_set_clientdata(client, state);
0875     state->client = client;
0876 
0877     /* Create dvb_frontend */
0878     switch (state->config.demod_chip) {
0879     case LGDT3302:
0880         memcpy(&state->frontend.ops, &lgdt3302_ops,
0881                sizeof(struct dvb_frontend_ops));
0882         break;
0883     case LGDT3303:
0884         memcpy(&state->frontend.ops, &lgdt3303_ops,
0885                sizeof(struct dvb_frontend_ops));
0886         break;
0887     default:
0888         goto error;
0889     }
0890     state->frontend.demodulator_priv = state;
0891 
0892     /* Setup get frontend callback */
0893     state->config.get_dvb_frontend = lgdt330x_get_dvb_frontend;
0894 
0895     /* Verify communication with demod chip */
0896     if (i2c_read_demod_bytes(state, 2, buf, 1))
0897         goto error;
0898 
0899     state->current_frequency = -1;
0900     state->current_modulation = -1;
0901 
0902     dev_info(&state->client->dev,
0903         "Demod loaded for LGDT330%s chip\n",
0904         state->config.demod_chip == LGDT3302 ? "2" : "3");
0905 
0906     return 0;
0907 
0908 error:
0909     kfree(state);
0910     if (debug)
0911         dev_printk(KERN_DEBUG, &client->dev, "Error loading lgdt330x driver\n");
0912     return -ENODEV;
0913 }
0914 struct dvb_frontend *lgdt330x_attach(const struct lgdt330x_config *_config,
0915                      u8 demod_address,
0916                      struct i2c_adapter *i2c)
0917 {
0918     struct i2c_client *client;
0919     struct i2c_board_info board_info = {};
0920     struct lgdt330x_config config = *_config;
0921 
0922     strscpy(board_info.type, "lgdt330x", sizeof(board_info.type));
0923     board_info.addr = demod_address;
0924     board_info.platform_data = &config;
0925     client = i2c_new_client_device(i2c, &board_info);
0926     if (!i2c_client_has_driver(client))
0927         return NULL;
0928 
0929     return lgdt330x_get_dvb_frontend(client);
0930 }
0931 EXPORT_SYMBOL(lgdt330x_attach);
0932 
0933 static const struct dvb_frontend_ops lgdt3302_ops = {
0934     .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
0935     .info = {
0936         .name = "LG Electronics LGDT3302 VSB/QAM Frontend",
0937         .frequency_min_hz =  54 * MHz,
0938         .frequency_max_hz = 858 * MHz,
0939         .frequency_stepsize_hz = 62500,
0940         .symbol_rate_min    = 5056941,  /* QAM 64 */
0941         .symbol_rate_max    = 10762000, /* VSB 8  */
0942         .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
0943     },
0944     .init                 = lgdt330x_init,
0945     .set_frontend         = lgdt330x_set_parameters,
0946     .get_frontend         = lgdt330x_get_frontend,
0947     .get_tune_settings    = lgdt330x_get_tune_settings,
0948     .read_status          = lgdt3302_read_status,
0949     .read_signal_strength = lgdt330x_read_signal_strength,
0950     .read_snr             = lgdt330x_read_snr,
0951     .read_ucblocks        = lgdt330x_read_ucblocks,
0952     .release              = lgdt330x_release,
0953 };
0954 
0955 static const struct dvb_frontend_ops lgdt3303_ops = {
0956     .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
0957     .info = {
0958         .name = "LG Electronics LGDT3303 VSB/QAM Frontend",
0959         .frequency_min_hz =  54 * MHz,
0960         .frequency_max_hz = 858 * MHz,
0961         .frequency_stepsize_hz = 62500,
0962         .symbol_rate_min    = 5056941,  /* QAM 64 */
0963         .symbol_rate_max    = 10762000, /* VSB 8  */
0964         .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
0965     },
0966     .init                 = lgdt330x_init,
0967     .set_frontend         = lgdt330x_set_parameters,
0968     .get_frontend         = lgdt330x_get_frontend,
0969     .get_tune_settings    = lgdt330x_get_tune_settings,
0970     .read_status          = lgdt3303_read_status,
0971     .read_signal_strength = lgdt330x_read_signal_strength,
0972     .read_snr             = lgdt330x_read_snr,
0973     .read_ucblocks        = lgdt330x_read_ucblocks,
0974     .release              = lgdt330x_release,
0975 };
0976 
0977 static int lgdt330x_remove(struct i2c_client *client)
0978 {
0979     struct lgdt330x_state *state = i2c_get_clientdata(client);
0980 
0981     dev_dbg(&client->dev, "\n");
0982 
0983     kfree(state);
0984 
0985     return 0;
0986 }
0987 
0988 static const struct i2c_device_id lgdt330x_id_table[] = {
0989     {"lgdt330x", 0},
0990     {}
0991 };
0992 MODULE_DEVICE_TABLE(i2c, lgdt330x_id_table);
0993 
0994 static struct i2c_driver lgdt330x_driver = {
0995     .driver = {
0996         .name   = "lgdt330x",
0997         .suppress_bind_attrs = true,
0998     },
0999     .probe      = lgdt330x_probe,
1000     .remove     = lgdt330x_remove,
1001     .id_table   = lgdt330x_id_table,
1002 };
1003 
1004 module_i2c_driver(lgdt330x_driver);
1005 
1006 
1007 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1008 MODULE_AUTHOR("Wilson Michaels");
1009 MODULE_LICENSE("GPL");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!