dvb-frontends/cxd2880/cxd2880_tnrdmd_mon.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * cxd2880_tnrdmd_mon.c
0004  * Sony CXD2880 DVB-T2/T tuner + demodulator driver
0005  * common monitor functions
0006  *
0007  * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation
0008  */
0009
0010 #include "cxd2880_common.h"
0011 #include "cxd2880_tnrdmd_mon.h"
0012
0013 static const u8 rf_lvl_seq[2] = {
0014     0x80, 0x00,
0015 };
0016
0017 int cxd2880_tnrdmd_mon_rf_lvl(struct cxd2880_tnrdmd *tnr_dmd,
0018                   int *rf_lvl_db)
0019 {
0020     u8 rdata[2];
0021     int ret;
0022
0023     if (!tnr_dmd || !rf_lvl_db)
0024         return -EINVAL;
0025
0026     if (tnr_dmd->state != CXD2880_TNRDMD_STATE_ACTIVE)
0027         return -EINVAL;
0028
0029     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0030                      CXD2880_IO_TGT_DMD,
0031                      0x00, 0x00);
0032     if (ret)
0033         return ret;
0034
0035     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0036                      CXD2880_IO_TGT_DMD,
0037                      0x10, 0x01);
0038     if (ret)
0039         return ret;
0040
0041     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0042                      CXD2880_IO_TGT_SYS,
0043                      0x00, 0x10);
0044     if (ret)
0045         return ret;
0046
0047     ret = tnr_dmd->io->write_regs(tnr_dmd->io,
0048                       CXD2880_IO_TGT_SYS,
0049                       0x5b, rf_lvl_seq, 2);
0050     if (ret)
0051         return ret;
0052
0053     usleep_range(2000, 3000);
0054
0055     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0056                      CXD2880_IO_TGT_SYS,
0057                      0x00, 0x1a);
0058     if (ret)
0059         return ret;
0060
0061     ret = tnr_dmd->io->read_regs(tnr_dmd->io,
0062                      CXD2880_IO_TGT_SYS,
0063                      0x15, rdata, 2);
0064     if (ret)
0065         return ret;
0066
0067     if (rdata[0] || rdata[1])
0068         return -EINVAL;
0069
0070     ret = tnr_dmd->io->read_regs(tnr_dmd->io,
0071                      CXD2880_IO_TGT_SYS,
0072                      0x11, rdata, 2);
0073     if (ret)
0074         return ret;
0075
0076     *rf_lvl_db =
0077         cxd2880_convert2s_complement((rdata[0] << 3) |
0078                      ((rdata[1] & 0xe0) >> 5), 11);
0079
0080     *rf_lvl_db *= 125;
0081
0082     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0083                      CXD2880_IO_TGT_DMD,
0084                      0x00, 0x00);
0085     if (ret)
0086         return ret;
0087
0088     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0089                      CXD2880_IO_TGT_DMD,
0090                      0x10, 0x00);
0091     if (ret)
0092         return ret;
0093
0094     if (tnr_dmd->rf_lvl_cmpstn)
0095         ret = tnr_dmd->rf_lvl_cmpstn(tnr_dmd, rf_lvl_db);
0096
0097     return ret;
0098 }
0099
0100 int cxd2880_tnrdmd_mon_rf_lvl_sub(struct cxd2880_tnrdmd *tnr_dmd,
0101                   int *rf_lvl_db)
0102 {
0103     if (!tnr_dmd || !rf_lvl_db)
0104         return -EINVAL;
0105
0106     if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
0107         return -EINVAL;
0108
0109     return cxd2880_tnrdmd_mon_rf_lvl(tnr_dmd->diver_sub, rf_lvl_db);
0110 }
0111
0112 int cxd2880_tnrdmd_mon_internal_cpu_status(struct cxd2880_tnrdmd
0113                        *tnr_dmd, u16 *status)
0114 {
0115     u8 data[2] = { 0 };
0116     int ret;
0117
0118     if (!tnr_dmd || !status)
0119         return -EINVAL;
0120
0121     ret = tnr_dmd->io->write_reg(tnr_dmd->io,
0122                      CXD2880_IO_TGT_SYS,
0123                      0x00, 0x1a);
0124     if (ret)
0125         return ret;
0126     ret = tnr_dmd->io->read_regs(tnr_dmd->io,
0127                      CXD2880_IO_TGT_SYS,
0128                      0x15, data, 2);
0129     if (ret)
0130         return ret;
0131
0132     *status = (data[0] << 8) | data[1];
0133
0134     return 0;
0135 }
0136
0137 int cxd2880_tnrdmd_mon_internal_cpu_status_sub(struct
0138                            cxd2880_tnrdmd
0139                            *tnr_dmd,
0140                            u16 *status)
0141 {
0142     if (!tnr_dmd || !status)
0143         return -EINVAL;
0144
0145     if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
0146         return -EINVAL;
0147
0148     return cxd2880_tnrdmd_mon_internal_cpu_status(tnr_dmd->diver_sub,
0149                               status);
0150 }