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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver
0004 
0005     Copyright (C) 2013 Luis Alves <ljalvs@gmail.com>
0006     July, 6th 2013
0007         First release based on cx24116 driver by:
0008         Steven Toth and Georg Acher, Darron Broad, Igor Liplianin
0009         Cards currently supported:
0010         TBS6980 - Dual DVBS/S2 PCIe card
0011         TBS6981 - Dual DVBS/S2 PCIe card
0012 
0013 */
0014 
0015 #include <linux/slab.h>
0016 #include <linux/kernel.h>
0017 #include <linux/module.h>
0018 #include <linux/moduleparam.h>
0019 #include <linux/init.h>
0020 #include <linux/firmware.h>
0021 
0022 #include "tuner-i2c.h"
0023 #include <media/dvb_frontend.h>
0024 #include "cx24117.h"
0025 
0026 
0027 #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw"
0028 #define CX24117_SEARCH_RANGE_KHZ 5000
0029 
0030 /* known registers */
0031 #define CX24117_REG_COMMAND      (0x00)      /* command buffer */
0032 #define CX24117_REG_EXECUTE      (0x1f)      /* execute command */
0033 
0034 #define CX24117_REG_FREQ3_0      (0x34)      /* frequency */
0035 #define CX24117_REG_FREQ2_0      (0x35)
0036 #define CX24117_REG_FREQ1_0      (0x36)
0037 #define CX24117_REG_STATE0       (0x39)
0038 #define CX24117_REG_SSTATUS0     (0x3a)      /* demod0 signal high / status */
0039 #define CX24117_REG_SIGNAL0      (0x3b)
0040 #define CX24117_REG_FREQ5_0      (0x3c)      /* +-freq */
0041 #define CX24117_REG_FREQ6_0      (0x3d)
0042 #define CX24117_REG_SRATE2_0     (0x3e)      /* +- 1000 * srate */
0043 #define CX24117_REG_SRATE1_0     (0x3f)
0044 #define CX24117_REG_QUALITY2_0   (0x40)
0045 #define CX24117_REG_QUALITY1_0   (0x41)
0046 
0047 #define CX24117_REG_BER4_0       (0x47)
0048 #define CX24117_REG_BER3_0       (0x48)
0049 #define CX24117_REG_BER2_0       (0x49)
0050 #define CX24117_REG_BER1_0       (0x4a)
0051 #define CX24117_REG_DVBS_UCB2_0  (0x4b)
0052 #define CX24117_REG_DVBS_UCB1_0  (0x4c)
0053 #define CX24117_REG_DVBS2_UCB2_0 (0x50)
0054 #define CX24117_REG_DVBS2_UCB1_0 (0x51)
0055 #define CX24117_REG_QSTATUS0     (0x93)
0056 #define CX24117_REG_CLKDIV0      (0xe6)
0057 #define CX24117_REG_RATEDIV0     (0xf0)
0058 
0059 
0060 #define CX24117_REG_FREQ3_1      (0x55)      /* frequency */
0061 #define CX24117_REG_FREQ2_1      (0x56)
0062 #define CX24117_REG_FREQ1_1      (0x57)
0063 #define CX24117_REG_STATE1       (0x5a)
0064 #define CX24117_REG_SSTATUS1     (0x5b)      /* demod1 signal high / status */
0065 #define CX24117_REG_SIGNAL1      (0x5c)
0066 #define CX24117_REG_FREQ5_1      (0x5d)      /* +- freq */
0067 #define CX24117_REG_FREQ4_1      (0x5e)
0068 #define CX24117_REG_SRATE2_1     (0x5f)
0069 #define CX24117_REG_SRATE1_1     (0x60)
0070 #define CX24117_REG_QUALITY2_1   (0x61)
0071 #define CX24117_REG_QUALITY1_1   (0x62)
0072 #define CX24117_REG_BER4_1       (0x68)
0073 #define CX24117_REG_BER3_1       (0x69)
0074 #define CX24117_REG_BER2_1       (0x6a)
0075 #define CX24117_REG_BER1_1       (0x6b)
0076 #define CX24117_REG_DVBS_UCB2_1  (0x6c)
0077 #define CX24117_REG_DVBS_UCB1_1  (0x6d)
0078 #define CX24117_REG_DVBS2_UCB2_1 (0x71)
0079 #define CX24117_REG_DVBS2_UCB1_1 (0x72)
0080 #define CX24117_REG_QSTATUS1     (0x9f)
0081 #define CX24117_REG_CLKDIV1      (0xe7)
0082 #define CX24117_REG_RATEDIV1     (0xf1)
0083 
0084 
0085 /* arg buffer size */
0086 #define CX24117_ARGLEN       (0x1e)
0087 
0088 /* rolloff */
0089 #define CX24117_ROLLOFF_020  (0x00)
0090 #define CX24117_ROLLOFF_025  (0x01)
0091 #define CX24117_ROLLOFF_035  (0x02)
0092 
0093 /* pilot bit */
0094 #define CX24117_PILOT_OFF    (0x00)
0095 #define CX24117_PILOT_ON     (0x40)
0096 #define CX24117_PILOT_AUTO   (0x80)
0097 
0098 /* signal status */
0099 #define CX24117_HAS_SIGNAL   (0x01)
0100 #define CX24117_HAS_CARRIER  (0x02)
0101 #define CX24117_HAS_VITERBI  (0x04)
0102 #define CX24117_HAS_SYNCLOCK (0x08)
0103 #define CX24117_STATUS_MASK  (0x0f)
0104 #define CX24117_SIGNAL_MASK  (0xc0)
0105 
0106 
0107 /* arg offset for DiSEqC */
0108 #define CX24117_DISEQC_DEMOD  (1)
0109 #define CX24117_DISEQC_BURST  (2)
0110 #define CX24117_DISEQC_ARG3_2 (3)   /* unknown value=2 */
0111 #define CX24117_DISEQC_ARG4_0 (4)   /* unknown value=0 */
0112 #define CX24117_DISEQC_ARG5_0 (5)   /* unknown value=0 */
0113 #define CX24117_DISEQC_MSGLEN (6)
0114 #define CX24117_DISEQC_MSGOFS (7)
0115 
0116 /* DiSEqC burst */
0117 #define CX24117_DISEQC_MINI_A (0)
0118 #define CX24117_DISEQC_MINI_B (1)
0119 
0120 
0121 #define CX24117_PNE (0) /* 0 disabled / 2 enabled */
0122 #define CX24117_OCC (1) /* 0 disabled / 1 enabled */
0123 
0124 
0125 enum cmds {
0126     CMD_SET_VCOFREQ    = 0x10,
0127     CMD_TUNEREQUEST    = 0x11,
0128     CMD_GLOBAL_MPEGCFG = 0x13,
0129     CMD_MPEGCFG        = 0x14,
0130     CMD_TUNERINIT      = 0x15,
0131     CMD_GET_SRATE      = 0x18,
0132     CMD_SET_GOLDCODE   = 0x19,
0133     CMD_GET_AGCACC     = 0x1a,
0134     CMD_DEMODINIT      = 0x1b,
0135     CMD_GETCTLACC      = 0x1c,
0136 
0137     CMD_LNBCONFIG      = 0x20,
0138     CMD_LNBSEND        = 0x21,
0139     CMD_LNBDCLEVEL     = 0x22,
0140     CMD_LNBPCBCONFIG   = 0x23,
0141     CMD_LNBSENDTONEBST = 0x24,
0142     CMD_LNBUPDREPLY    = 0x25,
0143 
0144     CMD_SET_GPIOMODE   = 0x30,
0145     CMD_SET_GPIOEN     = 0x31,
0146     CMD_SET_GPIODIR    = 0x32,
0147     CMD_SET_GPIOOUT    = 0x33,
0148     CMD_ENABLERSCORR   = 0x34,
0149     CMD_FWVERSION      = 0x35,
0150     CMD_SET_SLEEPMODE  = 0x36,
0151     CMD_BERCTRL        = 0x3c,
0152     CMD_EVENTCTRL      = 0x3d,
0153 };
0154 
0155 static LIST_HEAD(hybrid_tuner_instance_list);
0156 static DEFINE_MUTEX(cx24117_list_mutex);
0157 
0158 /* The Demod/Tuner can't easily provide these, we cache them */
0159 struct cx24117_tuning {
0160     u32 frequency;
0161     u32 symbol_rate;
0162     enum fe_spectral_inversion inversion;
0163     enum fe_code_rate fec;
0164 
0165     enum fe_delivery_system delsys;
0166     enum fe_modulation modulation;
0167     enum fe_pilot pilot;
0168     enum fe_rolloff rolloff;
0169 
0170     /* Demod values */
0171     u8 fec_val;
0172     u8 fec_mask;
0173     u8 inversion_val;
0174     u8 pilot_val;
0175     u8 rolloff_val;
0176 };
0177 
0178 /* Basic commands that are sent to the firmware */
0179 struct cx24117_cmd {
0180     u8 len;
0181     u8 args[CX24117_ARGLEN];
0182 };
0183 
0184 /* common to both fe's */
0185 struct cx24117_priv {
0186     u8 demod_address;
0187     struct i2c_adapter *i2c;
0188     u8 skip_fw_load;
0189     struct mutex fe_lock;
0190 
0191     /* Used for sharing this struct between demods */
0192     struct tuner_i2c_props i2c_props;
0193     struct list_head hybrid_tuner_instance_list;
0194 };
0195 
0196 /* one per each fe */
0197 struct cx24117_state {
0198     struct cx24117_priv *priv;
0199     struct dvb_frontend frontend;
0200 
0201     struct cx24117_tuning dcur;
0202     struct cx24117_tuning dnxt;
0203     struct cx24117_cmd dsec_cmd;
0204 
0205     int demod;
0206 };
0207 
0208 /* modfec (modulation and FEC) lookup table */
0209 /* Check cx24116.c for a detailed description of each field */
0210 static struct cx24117_modfec {
0211     enum fe_delivery_system delivery_system;
0212     enum fe_modulation modulation;
0213     enum fe_code_rate fec;
0214     u8 mask;    /* In DVBS mode this is used to autodetect */
0215     u8 val;     /* Passed to the firmware to indicate mode selection */
0216 } cx24117_modfec_modes[] = {
0217     /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */
0218 
0219     /*mod   fec       mask  val */
0220     { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 },
0221     { SYS_DVBS, QPSK, FEC_1_2,  0x02, 0x2e }, /* 00000010 00101110 */
0222     { SYS_DVBS, QPSK, FEC_2_3,  0x04, 0x2f }, /* 00000100 00101111 */
0223     { SYS_DVBS, QPSK, FEC_3_4,  0x08, 0x30 }, /* 00001000 00110000 */
0224     { SYS_DVBS, QPSK, FEC_4_5,  0xfe, 0x30 }, /* 000?0000 ?        */
0225     { SYS_DVBS, QPSK, FEC_5_6,  0x20, 0x31 }, /* 00100000 00110001 */
0226     { SYS_DVBS, QPSK, FEC_6_7,  0xfe, 0x30 }, /* 0?000000 ?        */
0227     { SYS_DVBS, QPSK, FEC_7_8,  0x80, 0x32 }, /* 10000000 00110010 */
0228     { SYS_DVBS, QPSK, FEC_8_9,  0xfe, 0x30 }, /* 0000000? ?        */
0229     { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 },
0230     /* NBC-QPSK */
0231     { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 },
0232     { SYS_DVBS2, QPSK, FEC_1_2,  0x00, 0x04 },
0233     { SYS_DVBS2, QPSK, FEC_3_5,  0x00, 0x05 },
0234     { SYS_DVBS2, QPSK, FEC_2_3,  0x00, 0x06 },
0235     { SYS_DVBS2, QPSK, FEC_3_4,  0x00, 0x07 },
0236     { SYS_DVBS2, QPSK, FEC_4_5,  0x00, 0x08 },
0237     { SYS_DVBS2, QPSK, FEC_5_6,  0x00, 0x09 },
0238     { SYS_DVBS2, QPSK, FEC_8_9,  0x00, 0x0a },
0239     { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b },
0240     { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 },
0241     /* 8PSK */
0242     { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 },
0243     { SYS_DVBS2, PSK_8, FEC_3_5,  0x00, 0x0c },
0244     { SYS_DVBS2, PSK_8, FEC_2_3,  0x00, 0x0d },
0245     { SYS_DVBS2, PSK_8, FEC_3_4,  0x00, 0x0e },
0246     { SYS_DVBS2, PSK_8, FEC_5_6,  0x00, 0x0f },
0247     { SYS_DVBS2, PSK_8, FEC_8_9,  0x00, 0x10 },
0248     { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 },
0249     { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 },
0250     /*
0251      * 'val' can be found in the FECSTATUS register when tuning.
0252      * FECSTATUS will give the actual FEC in use if tuning was successful.
0253      */
0254 };
0255 
0256 
0257 static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data)
0258 {
0259     u8 buf[] = { reg, data };
0260     struct i2c_msg msg = { .addr = state->priv->demod_address,
0261         .flags = 0, .buf = buf, .len = 2 };
0262     int ret;
0263 
0264     dev_dbg(&state->priv->i2c->dev,
0265             "%s() demod%d i2c wr @0x%02x=0x%02x\n",
0266             __func__, state->demod, reg, data);
0267 
0268     ret = i2c_transfer(state->priv->i2c, &msg, 1);
0269     if (ret < 0) {
0270         dev_warn(&state->priv->i2c->dev,
0271             "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n",
0272             KBUILD_MODNAME, state->demod, ret, reg, data);
0273         return ret;
0274     }
0275     return 0;
0276 }
0277 
0278 static int cx24117_writecmd(struct cx24117_state *state,
0279     struct cx24117_cmd *cmd)
0280 {
0281     struct i2c_msg msg;
0282     u8 buf[CX24117_ARGLEN+1];
0283     int ret;
0284 
0285     dev_dbg(&state->priv->i2c->dev,
0286             "%s() demod%d i2c wr cmd len=%d\n",
0287             __func__, state->demod, cmd->len);
0288 
0289     buf[0] = CX24117_REG_COMMAND;
0290     memcpy(&buf[1], cmd->args, cmd->len);
0291 
0292     msg.addr = state->priv->demod_address;
0293     msg.flags = 0;
0294     msg.len = cmd->len+1;
0295     msg.buf = buf;
0296     ret = i2c_transfer(state->priv->i2c, &msg, 1);
0297     if (ret < 0) {
0298         dev_warn(&state->priv->i2c->dev,
0299             "%s: demod%d i2c wr cmd err(%i) len=%d\n",
0300             KBUILD_MODNAME, state->demod, ret, cmd->len);
0301         return ret;
0302     }
0303     return 0;
0304 }
0305 
0306 static int cx24117_readreg(struct cx24117_state *state, u8 reg)
0307 {
0308     int ret;
0309     u8 recv = 0;
0310     struct i2c_msg msg[] = {
0311         { .addr = state->priv->demod_address, .flags = 0,
0312             .buf = &reg, .len = 1 },
0313         { .addr = state->priv->demod_address, .flags = I2C_M_RD,
0314             .buf = &recv, .len = 1 }
0315     };
0316 
0317     ret = i2c_transfer(state->priv->i2c, msg, 2);
0318     if (ret < 0) {
0319         dev_warn(&state->priv->i2c->dev,
0320             "%s: demod%d i2c rd err(%d) @0x%x\n",
0321             KBUILD_MODNAME, state->demod, ret, reg);
0322         return ret;
0323     }
0324 
0325     dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n",
0326         __func__, state->demod, reg, recv);
0327 
0328     return recv;
0329 }
0330 
0331 static int cx24117_readregN(struct cx24117_state *state,
0332     u8 reg, u8 *buf, int len)
0333 {
0334     int ret;
0335     struct i2c_msg msg[] = {
0336         { .addr = state->priv->demod_address, .flags = 0,
0337             .buf = &reg, .len = 1 },
0338         { .addr = state->priv->demod_address, .flags = I2C_M_RD,
0339             .buf = buf, .len = len }
0340     };
0341 
0342     ret = i2c_transfer(state->priv->i2c, msg, 2);
0343     if (ret < 0) {
0344         dev_warn(&state->priv->i2c->dev,
0345             "%s: demod%d i2c rd err(%d) @0x%x\n",
0346             KBUILD_MODNAME, state->demod, ret, reg);
0347         return ret;
0348     }
0349     return 0;
0350 }
0351 
0352 static int cx24117_set_inversion(struct cx24117_state *state,
0353     enum fe_spectral_inversion inversion)
0354 {
0355     dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
0356         __func__, inversion, state->demod);
0357 
0358     switch (inversion) {
0359     case INVERSION_OFF:
0360         state->dnxt.inversion_val = 0x00;
0361         break;
0362     case INVERSION_ON:
0363         state->dnxt.inversion_val = 0x04;
0364         break;
0365     case INVERSION_AUTO:
0366         state->dnxt.inversion_val = 0x0C;
0367         break;
0368     default:
0369         return -EINVAL;
0370     }
0371 
0372     state->dnxt.inversion = inversion;
0373 
0374     return 0;
0375 }
0376 
0377 static int cx24117_lookup_fecmod(struct cx24117_state *state,
0378     enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f)
0379 {
0380     int i, ret = -EINVAL;
0381 
0382     dev_dbg(&state->priv->i2c->dev,
0383         "%s(demod(0x%02x,0x%02x) demod%d\n",
0384         __func__, m, f, state->demod);
0385 
0386     for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) {
0387         if ((d == cx24117_modfec_modes[i].delivery_system) &&
0388             (m == cx24117_modfec_modes[i].modulation) &&
0389             (f == cx24117_modfec_modes[i].fec)) {
0390                 ret = i;
0391                 break;
0392             }
0393     }
0394 
0395     return ret;
0396 }
0397 
0398 static int cx24117_set_fec(struct cx24117_state *state,
0399                enum fe_delivery_system delsys,
0400                enum fe_modulation mod,
0401                enum fe_code_rate fec)
0402 {
0403     int ret;
0404 
0405     dev_dbg(&state->priv->i2c->dev,
0406         "%s(0x%02x,0x%02x) demod%d\n",
0407         __func__, mod, fec, state->demod);
0408 
0409     ret = cx24117_lookup_fecmod(state, delsys, mod, fec);
0410     if (ret < 0)
0411         return ret;
0412 
0413     state->dnxt.fec = fec;
0414     state->dnxt.fec_val = cx24117_modfec_modes[ret].val;
0415     state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask;
0416     dev_dbg(&state->priv->i2c->dev,
0417         "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__,
0418         state->demod, state->dnxt.fec_mask, state->dnxt.fec_val);
0419 
0420     return 0;
0421 }
0422 
0423 static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate)
0424 {
0425     dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
0426         __func__, rate, state->demod);
0427 
0428     state->dnxt.symbol_rate = rate;
0429 
0430     dev_dbg(&state->priv->i2c->dev,
0431         "%s() demod%d symbol_rate = %d\n",
0432         __func__, state->demod, rate);
0433 
0434     return 0;
0435 }
0436 
0437 static int cx24117_load_firmware(struct dvb_frontend *fe,
0438     const struct firmware *fw);
0439 
0440 static int cx24117_firmware_ondemand(struct dvb_frontend *fe)
0441 {
0442     struct cx24117_state *state = fe->demodulator_priv;
0443     const struct firmware *fw;
0444     int ret = 0;
0445 
0446     dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n",
0447         __func__, state->demod, state->priv->skip_fw_load);
0448 
0449     if (state->priv->skip_fw_load)
0450         return 0;
0451 
0452     /* check if firmware is already running */
0453     if (cx24117_readreg(state, 0xeb) != 0xa) {
0454         /* Load firmware */
0455         /* request the firmware, this will block until loaded */
0456         dev_dbg(&state->priv->i2c->dev,
0457             "%s: Waiting for firmware upload (%s)...\n",
0458             __func__, CX24117_DEFAULT_FIRMWARE);
0459         ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE,
0460             state->priv->i2c->dev.parent);
0461         dev_dbg(&state->priv->i2c->dev,
0462             "%s: Waiting for firmware upload(2)...\n", __func__);
0463         if (ret) {
0464             dev_err(&state->priv->i2c->dev,
0465                 "%s: No firmware uploaded (timeout or file not found?)\n",
0466 __func__);
0467             return ret;
0468         }
0469 
0470         /* Make sure we don't recurse back through here
0471          * during loading */
0472         state->priv->skip_fw_load = 1;
0473 
0474         ret = cx24117_load_firmware(fe, fw);
0475         if (ret)
0476             dev_err(&state->priv->i2c->dev,
0477                 "%s: Writing firmware failed\n", __func__);
0478         release_firmware(fw);
0479 
0480         dev_info(&state->priv->i2c->dev,
0481             "%s: Firmware upload %s\n", __func__,
0482             ret == 0 ? "complete" : "failed");
0483 
0484         /* Ensure firmware is always loaded if required */
0485         state->priv->skip_fw_load = 0;
0486     }
0487 
0488     return ret;
0489 }
0490 
0491 /* Take a basic firmware command structure, format it
0492  * and forward it for processing
0493  */
0494 static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe,
0495     struct cx24117_cmd *cmd)
0496 {
0497     struct cx24117_state *state = fe->demodulator_priv;
0498     int i, ret;
0499 
0500     dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
0501         __func__, state->demod);
0502 
0503     /* Load the firmware if required */
0504     ret = cx24117_firmware_ondemand(fe);
0505     if (ret != 0)
0506         return ret;
0507 
0508     /* Write the command */
0509     cx24117_writecmd(state, cmd);
0510 
0511     /* Start execution and wait for cmd to terminate */
0512     cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01);
0513     i = 0;
0514     while (cx24117_readreg(state, CX24117_REG_EXECUTE)) {
0515         msleep(20);
0516         if (i++ > 40) {
0517             /* Avoid looping forever if the firmware does
0518                 not respond */
0519             dev_warn(&state->priv->i2c->dev,
0520                 "%s() Firmware not responding\n", __func__);
0521             return -EIO;
0522         }
0523     }
0524     return 0;
0525 }
0526 
0527 static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd)
0528 {
0529     struct cx24117_state *state = fe->demodulator_priv;
0530     int ret;
0531 
0532     mutex_lock(&state->priv->fe_lock);
0533     ret = cx24117_cmd_execute_nolock(fe, cmd);
0534     mutex_unlock(&state->priv->fe_lock);
0535 
0536     return ret;
0537 }
0538 
0539 static int cx24117_load_firmware(struct dvb_frontend *fe,
0540     const struct firmware *fw)
0541 {
0542     struct cx24117_state *state = fe->demodulator_priv;
0543     struct cx24117_cmd cmd;
0544     int i, ret;
0545     unsigned char vers[4];
0546 
0547     struct i2c_msg msg;
0548     u8 *buf;
0549 
0550     dev_dbg(&state->priv->i2c->dev,
0551         "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n",
0552         __func__, state->demod, fw->size, fw->data[0], fw->data[1],
0553         fw->data[fw->size - 2], fw->data[fw->size - 1]);
0554 
0555     cx24117_writereg(state, 0xea, 0x00);
0556     cx24117_writereg(state, 0xea, 0x01);
0557     cx24117_writereg(state, 0xea, 0x00);
0558 
0559     cx24117_writereg(state, 0xce, 0x92);
0560 
0561     cx24117_writereg(state, 0xfb, 0x00);
0562     cx24117_writereg(state, 0xfc, 0x00);
0563 
0564     cx24117_writereg(state, 0xc3, 0x04);
0565     cx24117_writereg(state, 0xc4, 0x04);
0566 
0567     cx24117_writereg(state, 0xce, 0x00);
0568     cx24117_writereg(state, 0xcf, 0x00);
0569 
0570     cx24117_writereg(state, 0xea, 0x00);
0571     cx24117_writereg(state, 0xeb, 0x0c);
0572     cx24117_writereg(state, 0xec, 0x06);
0573     cx24117_writereg(state, 0xed, 0x05);
0574     cx24117_writereg(state, 0xee, 0x03);
0575     cx24117_writereg(state, 0xef, 0x05);
0576 
0577     cx24117_writereg(state, 0xf3, 0x03);
0578     cx24117_writereg(state, 0xf4, 0x44);
0579 
0580     cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04);
0581     cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02);
0582 
0583     cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04);
0584     cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02);
0585 
0586     cx24117_writereg(state, 0xf2, 0x04);
0587     cx24117_writereg(state, 0xe8, 0x02);
0588     cx24117_writereg(state, 0xea, 0x01);
0589     cx24117_writereg(state, 0xc8, 0x00);
0590     cx24117_writereg(state, 0xc9, 0x00);
0591     cx24117_writereg(state, 0xca, 0x00);
0592     cx24117_writereg(state, 0xcb, 0x00);
0593     cx24117_writereg(state, 0xcc, 0x00);
0594     cx24117_writereg(state, 0xcd, 0x00);
0595     cx24117_writereg(state, 0xe4, 0x03);
0596     cx24117_writereg(state, 0xeb, 0x0a);
0597 
0598     cx24117_writereg(state, 0xfb, 0x00);
0599     cx24117_writereg(state, 0xe0, 0x76);
0600     cx24117_writereg(state, 0xf7, 0x81);
0601     cx24117_writereg(state, 0xf8, 0x00);
0602     cx24117_writereg(state, 0xf9, 0x00);
0603 
0604     buf = kmalloc(fw->size + 1, GFP_KERNEL);
0605     if (buf == NULL) {
0606         state->priv->skip_fw_load = 0;
0607         return -ENOMEM;
0608     }
0609 
0610     /* fw upload reg */
0611     buf[0] = 0xfa;
0612     memcpy(&buf[1], fw->data, fw->size);
0613 
0614     /* prepare i2c message to send */
0615     msg.addr = state->priv->demod_address;
0616     msg.flags = 0;
0617     msg.len = fw->size + 1;
0618     msg.buf = buf;
0619 
0620     /* send fw */
0621     ret = i2c_transfer(state->priv->i2c, &msg, 1);
0622     if (ret < 0) {
0623         kfree(buf);
0624         return ret;
0625     }
0626 
0627     kfree(buf);
0628 
0629     cx24117_writereg(state, 0xf7, 0x0c);
0630     cx24117_writereg(state, 0xe0, 0x00);
0631 
0632     /* Init demodulator */
0633     cmd.args[0] = CMD_DEMODINIT;
0634     cmd.args[1] = 0x00;
0635     cmd.args[2] = 0x01;
0636     cmd.args[3] = 0x00;
0637     cmd.len = 4;
0638     ret = cx24117_cmd_execute_nolock(fe, &cmd);
0639     if (ret != 0)
0640         goto error;
0641 
0642     /* Set VCO frequency */
0643     cmd.args[0] = CMD_SET_VCOFREQ;
0644     cmd.args[1] = 0x06;
0645     cmd.args[2] = 0x2b;
0646     cmd.args[3] = 0xd8;
0647     cmd.args[4] = 0xa5;
0648     cmd.args[5] = 0xee;
0649     cmd.args[6] = 0x03;
0650     cmd.args[7] = 0x9d;
0651     cmd.args[8] = 0xfc;
0652     cmd.args[9] = 0x06;
0653     cmd.args[10] = 0x02;
0654     cmd.args[11] = 0x9d;
0655     cmd.args[12] = 0xfc;
0656     cmd.len = 13;
0657     ret = cx24117_cmd_execute_nolock(fe, &cmd);
0658     if (ret != 0)
0659         goto error;
0660 
0661     /* Tuner init */
0662     cmd.args[0] = CMD_TUNERINIT;
0663     cmd.args[1] = 0x00;
0664     cmd.args[2] = 0x01;
0665     cmd.args[3] = 0x00;
0666     cmd.args[4] = 0x00;
0667     cmd.args[5] = 0x01;
0668     cmd.args[6] = 0x01;
0669     cmd.args[7] = 0x01;
0670     cmd.args[8] = 0x00;
0671     cmd.args[9] = 0x05;
0672     cmd.args[10] = 0x02;
0673     cmd.args[11] = 0x02;
0674     cmd.args[12] = 0x00;
0675     cmd.len = 13;
0676     ret = cx24117_cmd_execute_nolock(fe, &cmd);
0677     if (ret != 0)
0678         goto error;
0679 
0680     /* Global MPEG config */
0681     cmd.args[0] = CMD_GLOBAL_MPEGCFG;
0682     cmd.args[1] = 0x00;
0683     cmd.args[2] = 0x00;
0684     cmd.args[3] = 0x00;
0685     cmd.args[4] = 0x01;
0686     cmd.args[5] = 0x00;
0687     cmd.len = 6;
0688     ret = cx24117_cmd_execute_nolock(fe, &cmd);
0689     if (ret != 0)
0690         goto error;
0691 
0692     /* MPEG config for each demod */
0693     for (i = 0; i < 2; i++) {
0694         cmd.args[0] = CMD_MPEGCFG;
0695         cmd.args[1] = (u8) i;
0696         cmd.args[2] = 0x00;
0697         cmd.args[3] = 0x05;
0698         cmd.args[4] = 0x00;
0699         cmd.args[5] = 0x00;
0700         cmd.args[6] = 0x55;
0701         cmd.args[7] = 0x00;
0702         cmd.len = 8;
0703         ret = cx24117_cmd_execute_nolock(fe, &cmd);
0704         if (ret != 0)
0705             goto error;
0706     }
0707 
0708     cx24117_writereg(state, 0xce, 0xc0);
0709     cx24117_writereg(state, 0xcf, 0x00);
0710     cx24117_writereg(state, 0xe5, 0x04);
0711 
0712     /* Get firmware version */
0713     cmd.args[0] = CMD_FWVERSION;
0714     cmd.len = 2;
0715     for (i = 0; i < 4; i++) {
0716         cmd.args[1] = i;
0717         ret = cx24117_cmd_execute_nolock(fe, &cmd);
0718         if (ret != 0)
0719             goto error;
0720         vers[i] = cx24117_readreg(state, 0x33);
0721     }
0722     dev_info(&state->priv->i2c->dev,
0723         "%s: FW version %i.%i.%i.%i\n", __func__,
0724         vers[0], vers[1], vers[2], vers[3]);
0725     return 0;
0726 error:
0727     state->priv->skip_fw_load = 0;
0728     dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__);
0729     return ret;
0730 }
0731 
0732 static int cx24117_read_status(struct dvb_frontend *fe, enum fe_status *status)
0733 {
0734     struct cx24117_state *state = fe->demodulator_priv;
0735     int lock;
0736 
0737     lock = cx24117_readreg(state,
0738         (state->demod == 0) ? CX24117_REG_SSTATUS0 :
0739                       CX24117_REG_SSTATUS1) &
0740         CX24117_STATUS_MASK;
0741 
0742     dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n",
0743         __func__, state->demod, lock);
0744 
0745     *status = 0;
0746 
0747     if (lock & CX24117_HAS_SIGNAL)
0748         *status |= FE_HAS_SIGNAL;
0749     if (lock & CX24117_HAS_CARRIER)
0750         *status |= FE_HAS_CARRIER;
0751     if (lock & CX24117_HAS_VITERBI)
0752         *status |= FE_HAS_VITERBI;
0753     if (lock & CX24117_HAS_SYNCLOCK)
0754         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
0755 
0756     return 0;
0757 }
0758 
0759 static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber)
0760 {
0761     struct cx24117_state *state = fe->demodulator_priv;
0762     int ret;
0763     u8 buf[4];
0764     u8 base_reg = (state->demod == 0) ?
0765             CX24117_REG_BER4_0 :
0766             CX24117_REG_BER4_1;
0767 
0768     ret = cx24117_readregN(state, base_reg, buf, 4);
0769     if (ret != 0)
0770         return ret;
0771 
0772     *ber = (buf[0] << 24) | (buf[1] << 16) |
0773         (buf[1] << 8) | buf[0];
0774 
0775     dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n",
0776         __func__, state->demod, *ber);
0777 
0778     return 0;
0779 }
0780 
0781 static int cx24117_read_signal_strength(struct dvb_frontend *fe,
0782     u16 *signal_strength)
0783 {
0784     struct cx24117_state *state = fe->demodulator_priv;
0785     struct cx24117_cmd cmd;
0786     int ret;
0787     u16 sig_reading;
0788     u8 buf[2];
0789     u8 reg = (state->demod == 0) ?
0790         CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1;
0791 
0792     /* Read AGC accumulator register */
0793     cmd.args[0] = CMD_GET_AGCACC;
0794     cmd.args[1] = (u8) state->demod;
0795     cmd.len = 2;
0796     ret = cx24117_cmd_execute(fe, &cmd);
0797     if (ret != 0)
0798         return ret;
0799 
0800     ret = cx24117_readregN(state, reg, buf, 2);
0801     if (ret != 0)
0802         return ret;
0803     sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1];
0804 
0805     *signal_strength = -100 * sig_reading + 94324;
0806 
0807     dev_dbg(&state->priv->i2c->dev,
0808         "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n",
0809         __func__, state->demod, sig_reading, *signal_strength);
0810 
0811     return 0;
0812 }
0813 
0814 static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr)
0815 {
0816     struct cx24117_state *state = fe->demodulator_priv;
0817     int ret;
0818     u8 buf[2];
0819     u8 reg = (state->demod == 0) ?
0820         CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1;
0821 
0822     ret = cx24117_readregN(state, reg, buf, 2);
0823     if (ret != 0)
0824         return ret;
0825 
0826     *snr = (buf[0] << 8) | buf[1];
0827 
0828     dev_dbg(&state->priv->i2c->dev,
0829         "%s() demod%d snr = 0x%04x\n",
0830         __func__, state->demod, *snr);
0831 
0832     return ret;
0833 }
0834 
0835 static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0836 {
0837     struct cx24117_state *state = fe->demodulator_priv;
0838     enum fe_delivery_system delsys = fe->dtv_property_cache.delivery_system;
0839     int ret;
0840     u8 buf[2];
0841     u8 reg = (state->demod == 0) ?
0842         CX24117_REG_DVBS_UCB2_0 :
0843         CX24117_REG_DVBS_UCB2_1;
0844 
0845     switch (delsys) {
0846     case SYS_DVBS:
0847         break;
0848     case SYS_DVBS2:
0849         reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0);
0850         break;
0851     default:
0852         return -EINVAL;
0853     }
0854 
0855     ret = cx24117_readregN(state, reg, buf, 2);
0856     if (ret != 0)
0857         return ret;
0858     *ucblocks = (buf[0] << 8) | buf[1];
0859 
0860     dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n",
0861         __func__, state->demod, *ucblocks);
0862 
0863     return 0;
0864 }
0865 
0866 /* Overwrite the current tuning params, we are about to tune */
0867 static void cx24117_clone_params(struct dvb_frontend *fe)
0868 {
0869     struct cx24117_state *state = fe->demodulator_priv;
0870     state->dcur = state->dnxt;
0871 }
0872 
0873 /* Wait for LNB */
0874 static int cx24117_wait_for_lnb(struct dvb_frontend *fe)
0875 {
0876     struct cx24117_state *state = fe->demodulator_priv;
0877     int i;
0878     u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 :
0879                         CX24117_REG_QSTATUS1;
0880 
0881     dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n",
0882         __func__, state->demod, cx24117_readreg(state, reg));
0883 
0884     /* Wait for up to 300 ms */
0885     for (i = 0; i < 10; i++) {
0886         val = cx24117_readreg(state, reg) & 0x01;
0887         if (val != 0)
0888             return 0;
0889         msleep(30);
0890     }
0891 
0892     dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n",
0893         KBUILD_MODNAME, state->demod);
0894 
0895     return -ETIMEDOUT; /* -EBUSY ? */
0896 }
0897 
0898 static int cx24117_set_voltage(struct dvb_frontend *fe,
0899                    enum fe_sec_voltage voltage)
0900 {
0901     struct cx24117_state *state = fe->demodulator_priv;
0902     struct cx24117_cmd cmd;
0903     int ret;
0904     u8 reg = (state->demod == 0) ? 0x10 : 0x20;
0905 
0906     dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n",
0907         __func__, state->demod,
0908         voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
0909         voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" :
0910         "SEC_VOLTAGE_OFF");
0911 
0912     /* Prepare a set GPIO logic level CMD */
0913     cmd.args[0] = CMD_SET_GPIOOUT;
0914     cmd.args[2] = reg; /* mask */
0915     cmd.len = 3;
0916 
0917     if ((voltage == SEC_VOLTAGE_13) ||
0918         (voltage == SEC_VOLTAGE_18)) {
0919         /* power on LNB */
0920         cmd.args[1] = reg;
0921         ret = cx24117_cmd_execute(fe, &cmd);
0922         if (ret != 0)
0923             return ret;
0924 
0925         ret = cx24117_wait_for_lnb(fe);
0926         if (ret != 0)
0927             return ret;
0928 
0929         /* Wait for voltage/min repeat delay */
0930         msleep(100);
0931 
0932         /* Set 13V/18V select pin */
0933         cmd.args[0] = CMD_LNBDCLEVEL;
0934         cmd.args[1] = state->demod ? 0 : 1;
0935         cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00);
0936         cmd.len = 3;
0937         ret = cx24117_cmd_execute(fe, &cmd);
0938 
0939         /* Min delay time before DiSEqC send */
0940         msleep(20);
0941     } else {
0942         /* power off LNB */
0943         cmd.args[1] = 0x00;
0944         ret = cx24117_cmd_execute(fe, &cmd);
0945     }
0946 
0947     return ret;
0948 }
0949 
0950 static int cx24117_set_tone(struct dvb_frontend *fe,
0951                 enum fe_sec_tone_mode tone)
0952 {
0953     struct cx24117_state *state = fe->demodulator_priv;
0954     struct cx24117_cmd cmd;
0955     int ret;
0956 
0957     dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
0958         __func__, state->demod, tone);
0959     if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
0960         dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n",
0961             KBUILD_MODNAME, state->demod, tone);
0962         return -EINVAL;
0963     }
0964 
0965     /* Wait for LNB ready */
0966     ret = cx24117_wait_for_lnb(fe);
0967     if (ret != 0)
0968         return ret;
0969 
0970     /* Min delay time after DiSEqC send */
0971     msleep(20);
0972 
0973     /* Set the tone */
0974     cmd.args[0] = CMD_LNBPCBCONFIG;
0975     cmd.args[1] = (state->demod ? 0 : 1);
0976     cmd.args[2] = 0x00;
0977     cmd.args[3] = 0x00;
0978     cmd.len = 5;
0979     switch (tone) {
0980     case SEC_TONE_ON:
0981         cmd.args[4] = 0x01;
0982         break;
0983     case SEC_TONE_OFF:
0984         cmd.args[4] = 0x00;
0985         break;
0986     }
0987 
0988     msleep(20);
0989 
0990     return cx24117_cmd_execute(fe, &cmd);
0991 }
0992 
0993 /* Initialise DiSEqC */
0994 static int cx24117_diseqc_init(struct dvb_frontend *fe)
0995 {
0996     struct cx24117_state *state = fe->demodulator_priv;
0997 
0998     /* Prepare a DiSEqC command */
0999     state->dsec_cmd.args[0] = CMD_LNBSEND;
1000 
1001     /* demod */
1002     state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1;
1003 
1004     /* DiSEqC burst */
1005     state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A;
1006 
1007     /* Unknown */
1008     state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02;
1009     state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00;
1010 
1011     /* Continuation flag? */
1012     state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00;
1013 
1014     /* DiSEqC message length */
1015     state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00;
1016 
1017     /* Command length */
1018     state->dsec_cmd.len = 7;
1019 
1020     return 0;
1021 }
1022 
1023 /* Send DiSEqC message */
1024 static int cx24117_send_diseqc_msg(struct dvb_frontend *fe,
1025     struct dvb_diseqc_master_cmd *d)
1026 {
1027     struct cx24117_state *state = fe->demodulator_priv;
1028     int i, ret;
1029 
1030     /* Dump DiSEqC message */
1031     dev_dbg(&state->priv->i2c->dev, "%s: demod %d (",
1032         __func__, state->demod);
1033     for (i = 0; i < d->msg_len; i++)
1034         dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]);
1035     dev_dbg(&state->priv->i2c->dev, ")\n");
1036 
1037     /* Validate length */
1038     if (d->msg_len > sizeof(d->msg))
1039         return -EINVAL;
1040 
1041     /* DiSEqC message */
1042     for (i = 0; i < d->msg_len; i++)
1043         state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i];
1044 
1045     /* DiSEqC message length */
1046     state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len;
1047 
1048     /* Command length */
1049     state->dsec_cmd.len = CX24117_DISEQC_MSGOFS +
1050         state->dsec_cmd.args[CX24117_DISEQC_MSGLEN];
1051 
1052     /*
1053      * Message is sent with derived else cached burst
1054      *
1055      * WRITE PORT GROUP COMMAND 38
1056      *
1057      * 0/A/A: E0 10 38 F0..F3
1058      * 1/B/B: E0 10 38 F4..F7
1059      * 2/C/A: E0 10 38 F8..FB
1060      * 3/D/B: E0 10 38 FC..FF
1061      *
1062      * databyte[3]= 8421:8421
1063      *              ABCD:WXYZ
1064      *              CLR :SET
1065      *
1066      *              WX= PORT SELECT 0..3    (X=TONEBURST)
1067      *              Y = VOLTAGE             (0=13V, 1=18V)
1068      *              Z = BAND                (0=LOW, 1=HIGH(22K))
1069      */
1070     if (d->msg_len >= 4 && d->msg[2] == 0x38)
1071         state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1072             ((d->msg[3] & 4) >> 2);
1073 
1074     dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n",
1075         __func__, state->demod,
1076         state->dsec_cmd.args[CX24117_DISEQC_BURST]);
1077 
1078     /* Wait for LNB ready */
1079     ret = cx24117_wait_for_lnb(fe);
1080     if (ret != 0)
1081         return ret;
1082 
1083     /* Wait for voltage/min repeat delay */
1084     msleep(100);
1085 
1086     /* Command */
1087     ret = cx24117_cmd_execute(fe, &state->dsec_cmd);
1088     if (ret != 0)
1089         return ret;
1090     /*
1091      * Wait for send
1092      *
1093      * Eutelsat spec:
1094      * >15ms delay          + (XXX determine if FW does this, see set_tone)
1095      *  13.5ms per byte     +
1096      * >15ms delay          +
1097      *  12.5ms burst        +
1098      * >15ms delay            (XXX determine if FW does this, see set_tone)
1099      */
1100     msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60);
1101 
1102     return 0;
1103 }
1104 
1105 /* Send DiSEqC burst */
1106 static int cx24117_diseqc_send_burst(struct dvb_frontend *fe,
1107     enum fe_sec_mini_cmd burst)
1108 {
1109     struct cx24117_state *state = fe->demodulator_priv;
1110 
1111     dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n",
1112         __func__, burst, state->demod);
1113 
1114     /* DiSEqC burst */
1115     if (burst == SEC_MINI_A)
1116         state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1117             CX24117_DISEQC_MINI_A;
1118     else if (burst == SEC_MINI_B)
1119         state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1120             CX24117_DISEQC_MINI_B;
1121     else
1122         return -EINVAL;
1123 
1124     return 0;
1125 }
1126 
1127 static int cx24117_get_priv(struct cx24117_priv **priv,
1128     struct i2c_adapter *i2c, u8 client_address)
1129 {
1130     int ret;
1131 
1132     mutex_lock(&cx24117_list_mutex);
1133     ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv),
1134         hybrid_tuner_instance_list, i2c, client_address, "cx24117");
1135     mutex_unlock(&cx24117_list_mutex);
1136 
1137     return ret;
1138 }
1139 
1140 static void cx24117_release_priv(struct cx24117_priv *priv)
1141 {
1142     mutex_lock(&cx24117_list_mutex);
1143     if (priv != NULL)
1144         hybrid_tuner_release_state(priv);
1145     mutex_unlock(&cx24117_list_mutex);
1146 }
1147 
1148 static void cx24117_release(struct dvb_frontend *fe)
1149 {
1150     struct cx24117_state *state = fe->demodulator_priv;
1151     dev_dbg(&state->priv->i2c->dev, "%s demod%d\n",
1152         __func__, state->demod);
1153     cx24117_release_priv(state->priv);
1154     kfree(state);
1155 }
1156 
1157 static const struct dvb_frontend_ops cx24117_ops;
1158 
1159 struct dvb_frontend *cx24117_attach(const struct cx24117_config *config,
1160     struct i2c_adapter *i2c)
1161 {
1162     struct cx24117_state *state = NULL;
1163     struct cx24117_priv *priv = NULL;
1164     int demod = 0;
1165 
1166     /* get the common data struct for both demods */
1167     demod = cx24117_get_priv(&priv, i2c, config->demod_address);
1168 
1169     switch (demod) {
1170     case 0:
1171         dev_err(&i2c->dev,
1172             "%s: Error attaching frontend %d\n",
1173             KBUILD_MODNAME, demod);
1174         goto error1;
1175     case 1:
1176         /* new priv instance */
1177         priv->i2c = i2c;
1178         priv->demod_address = config->demod_address;
1179         mutex_init(&priv->fe_lock);
1180         break;
1181     default:
1182         /* existing priv instance */
1183         break;
1184     }
1185 
1186     /* allocate memory for the internal state */
1187     state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL);
1188     if (state == NULL)
1189         goto error2;
1190 
1191     state->demod = demod - 1;
1192     state->priv = priv;
1193 
1194     dev_info(&state->priv->i2c->dev,
1195         "%s: Attaching frontend %d\n",
1196         KBUILD_MODNAME, state->demod);
1197 
1198     /* create dvb_frontend */
1199     memcpy(&state->frontend.ops, &cx24117_ops,
1200         sizeof(struct dvb_frontend_ops));
1201     state->frontend.demodulator_priv = state;
1202     return &state->frontend;
1203 
1204 error2:
1205     cx24117_release_priv(priv);
1206 error1:
1207     return NULL;
1208 }
1209 EXPORT_SYMBOL_GPL(cx24117_attach);
1210 
1211 /*
1212  * Initialise or wake up device
1213  *
1214  * Power config will reset and load initial firmware if required
1215  */
1216 static int cx24117_initfe(struct dvb_frontend *fe)
1217 {
1218     struct cx24117_state *state = fe->demodulator_priv;
1219     struct cx24117_cmd cmd;
1220     int ret;
1221 
1222     dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1223         __func__, state->demod);
1224 
1225     mutex_lock(&state->priv->fe_lock);
1226 
1227     /* Set sleep mode off */
1228     cmd.args[0] = CMD_SET_SLEEPMODE;
1229     cmd.args[1] = (state->demod ? 1 : 0);
1230     cmd.args[2] = 0;
1231     cmd.len = 3;
1232     ret = cx24117_cmd_execute_nolock(fe, &cmd);
1233     if (ret != 0)
1234         goto exit;
1235 
1236     ret = cx24117_diseqc_init(fe);
1237     if (ret != 0)
1238         goto exit;
1239 
1240     /* Set BER control */
1241     cmd.args[0] = CMD_BERCTRL;
1242     cmd.args[1] = (state->demod ? 1 : 0);
1243     cmd.args[2] = 0x10;
1244     cmd.args[3] = 0x10;
1245     cmd.len = 4;
1246     ret = cx24117_cmd_execute_nolock(fe, &cmd);
1247     if (ret != 0)
1248         goto exit;
1249 
1250     /* Set RS correction (enable/disable) */
1251     cmd.args[0] = CMD_ENABLERSCORR;
1252     cmd.args[1] = (state->demod ? 1 : 0);
1253     cmd.args[2] = CX24117_OCC;
1254     cmd.len = 3;
1255     ret = cx24117_cmd_execute_nolock(fe, &cmd);
1256     if (ret != 0)
1257         goto exit;
1258 
1259     /* Set GPIO direction */
1260     /* Set as output - controls LNB power on/off */
1261     cmd.args[0] = CMD_SET_GPIODIR;
1262     cmd.args[1] = 0x30;
1263     cmd.args[2] = 0x30;
1264     cmd.len = 3;
1265     ret = cx24117_cmd_execute_nolock(fe, &cmd);
1266 
1267 exit:
1268     mutex_unlock(&state->priv->fe_lock);
1269 
1270     return ret;
1271 }
1272 
1273 /*
1274  * Put device to sleep
1275  */
1276 static int cx24117_sleep(struct dvb_frontend *fe)
1277 {
1278     struct cx24117_state *state = fe->demodulator_priv;
1279     struct cx24117_cmd cmd;
1280 
1281     dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1282         __func__, state->demod);
1283 
1284     /* Set sleep mode on */
1285     cmd.args[0] = CMD_SET_SLEEPMODE;
1286     cmd.args[1] = (state->demod ? 1 : 0);
1287     cmd.args[2] = 1;
1288     cmd.len = 3;
1289     return cx24117_cmd_execute(fe, &cmd);
1290 }
1291 
1292 /* dvb-core told us to tune, the tv property cache will be complete,
1293  * it's safe for is to pull values and use them for tuning purposes.
1294  */
1295 static int cx24117_set_frontend(struct dvb_frontend *fe)
1296 {
1297     struct cx24117_state *state = fe->demodulator_priv;
1298     struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1299     struct cx24117_cmd cmd;
1300     enum fe_status tunerstat;
1301     int i, status, ret, retune = 1;
1302     u8 reg_clkdiv, reg_ratediv;
1303 
1304     dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1305         __func__, state->demod);
1306 
1307     switch (c->delivery_system) {
1308     case SYS_DVBS:
1309         dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n",
1310             __func__, state->demod);
1311 
1312         /* Only QPSK is supported for DVB-S */
1313         if (c->modulation != QPSK) {
1314             dev_dbg(&state->priv->i2c->dev,
1315                 "%s() demod%d unsupported modulation (%d)\n",
1316                 __func__, state->demod, c->modulation);
1317             return -EINVAL;
1318         }
1319 
1320         /* Pilot doesn't exist in DVB-S, turn bit off */
1321         state->dnxt.pilot_val = CX24117_PILOT_OFF;
1322 
1323         /* DVB-S only supports 0.35 */
1324         state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1325         break;
1326 
1327     case SYS_DVBS2:
1328         dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n",
1329             __func__, state->demod);
1330 
1331         /*
1332          * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2,
1333          * but not hardware auto detection
1334          */
1335         if (c->modulation != PSK_8 && c->modulation != QPSK) {
1336             dev_dbg(&state->priv->i2c->dev,
1337                 "%s() demod%d unsupported modulation (%d)\n",
1338                 __func__, state->demod, c->modulation);
1339             return -EOPNOTSUPP;
1340         }
1341 
1342         switch (c->pilot) {
1343         case PILOT_AUTO:
1344             state->dnxt.pilot_val = CX24117_PILOT_AUTO;
1345             break;
1346         case PILOT_OFF:
1347             state->dnxt.pilot_val = CX24117_PILOT_OFF;
1348             break;
1349         case PILOT_ON:
1350             state->dnxt.pilot_val = CX24117_PILOT_ON;
1351             break;
1352         default:
1353             dev_dbg(&state->priv->i2c->dev,
1354                 "%s() demod%d unsupported pilot mode (%d)\n",
1355                 __func__, state->demod, c->pilot);
1356             return -EOPNOTSUPP;
1357         }
1358 
1359         switch (c->rolloff) {
1360         case ROLLOFF_20:
1361             state->dnxt.rolloff_val = CX24117_ROLLOFF_020;
1362             break;
1363         case ROLLOFF_25:
1364             state->dnxt.rolloff_val = CX24117_ROLLOFF_025;
1365             break;
1366         case ROLLOFF_35:
1367             state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1368             break;
1369         case ROLLOFF_AUTO:
1370             state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1371             /* soft-auto rolloff */
1372             retune = 3;
1373             break;
1374         default:
1375             dev_warn(&state->priv->i2c->dev,
1376                 "%s: demod%d unsupported rolloff (%d)\n",
1377                 KBUILD_MODNAME, state->demod, c->rolloff);
1378             return -EOPNOTSUPP;
1379         }
1380         break;
1381 
1382     default:
1383         dev_warn(&state->priv->i2c->dev,
1384             "%s: demod %d unsupported delivery system (%d)\n",
1385             KBUILD_MODNAME, state->demod, c->delivery_system);
1386         return -EINVAL;
1387     }
1388 
1389     state->dnxt.delsys = c->delivery_system;
1390     state->dnxt.modulation = c->modulation;
1391     state->dnxt.frequency = c->frequency;
1392     state->dnxt.pilot = c->pilot;
1393     state->dnxt.rolloff = c->rolloff;
1394 
1395     ret = cx24117_set_inversion(state, c->inversion);
1396     if (ret !=  0)
1397         return ret;
1398 
1399     ret = cx24117_set_fec(state,
1400         c->delivery_system, c->modulation, c->fec_inner);
1401     if (ret !=  0)
1402         return ret;
1403 
1404     ret = cx24117_set_symbolrate(state, c->symbol_rate);
1405     if (ret !=  0)
1406         return ret;
1407 
1408     /* discard the 'current' tuning parameters and prepare to tune */
1409     cx24117_clone_params(fe);
1410 
1411     dev_dbg(&state->priv->i2c->dev,
1412         "%s: delsys      = %d\n", __func__, state->dcur.delsys);
1413     dev_dbg(&state->priv->i2c->dev,
1414         "%s: modulation  = %d\n", __func__, state->dcur.modulation);
1415     dev_dbg(&state->priv->i2c->dev,
1416         "%s: frequency   = %d\n", __func__, state->dcur.frequency);
1417     dev_dbg(&state->priv->i2c->dev,
1418         "%s: pilot       = %d (val = 0x%02x)\n", __func__,
1419         state->dcur.pilot, state->dcur.pilot_val);
1420     dev_dbg(&state->priv->i2c->dev,
1421         "%s: retune      = %d\n", __func__, retune);
1422     dev_dbg(&state->priv->i2c->dev,
1423         "%s: rolloff     = %d (val = 0x%02x)\n", __func__,
1424         state->dcur.rolloff, state->dcur.rolloff_val);
1425     dev_dbg(&state->priv->i2c->dev,
1426         "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
1427     dev_dbg(&state->priv->i2c->dev,
1428         "%s: FEC         = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1429         state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1430     dev_dbg(&state->priv->i2c->dev,
1431         "%s: Inversion   = %d (val = 0x%02x)\n", __func__,
1432         state->dcur.inversion, state->dcur.inversion_val);
1433 
1434     /* Prepare a tune request */
1435     cmd.args[0] = CMD_TUNEREQUEST;
1436 
1437     /* demod */
1438     cmd.args[1] = state->demod;
1439 
1440     /* Frequency */
1441     cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16;
1442     cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8;
1443     cmd.args[4] = (state->dcur.frequency & 0x0000ff);
1444 
1445     /* Symbol Rate */
1446     cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1447     cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1448 
1449     /* Automatic Inversion */
1450     cmd.args[7] = state->dcur.inversion_val;
1451 
1452     /* Modulation / FEC / Pilot */
1453     cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val;
1454 
1455     cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8;
1456     cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff;
1457 
1458     cmd.args[11] = state->dcur.rolloff_val;
1459     cmd.args[12] = state->dcur.fec_mask;
1460 
1461     if (state->dcur.symbol_rate > 30000000) {
1462         reg_ratediv = 0x04;
1463         reg_clkdiv = 0x02;
1464     } else if (state->dcur.symbol_rate > 10000000) {
1465         reg_ratediv = 0x06;
1466         reg_clkdiv = 0x03;
1467     } else {
1468         reg_ratediv = 0x0a;
1469         reg_clkdiv = 0x05;
1470     }
1471 
1472     cmd.args[13] = reg_ratediv;
1473     cmd.args[14] = reg_clkdiv;
1474 
1475     cx24117_writereg(state, (state->demod == 0) ?
1476         CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv);
1477     cx24117_writereg(state, (state->demod == 0) ?
1478         CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv);
1479 
1480     cmd.args[15] = CX24117_PNE;
1481     cmd.len = 16;
1482 
1483     do {
1484         /* Reset status register */
1485         status = cx24117_readreg(state, (state->demod == 0) ?
1486             CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) &
1487             CX24117_SIGNAL_MASK;
1488 
1489         dev_dbg(&state->priv->i2c->dev,
1490             "%s() demod%d status_setfe = %02x\n",
1491             __func__, state->demod, status);
1492 
1493         cx24117_writereg(state, (state->demod == 0) ?
1494             CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status);
1495 
1496         /* Tune */
1497         ret = cx24117_cmd_execute(fe, &cmd);
1498         if (ret != 0)
1499             break;
1500 
1501         /*
1502          * Wait for up to 500 ms before retrying
1503          *
1504          * If we are able to tune then generally it occurs within 100ms.
1505          * If it takes longer, try a different rolloff setting.
1506          */
1507         for (i = 0; i < 50; i++) {
1508             cx24117_read_status(fe, &tunerstat);
1509             status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC);
1510             if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) {
1511                 dev_dbg(&state->priv->i2c->dev,
1512                     "%s() demod%d tuned\n",
1513                     __func__, state->demod);
1514                 return 0;
1515             }
1516             msleep(20);
1517         }
1518 
1519         dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n",
1520             __func__, state->demod);
1521 
1522         /* try next rolloff value */
1523         if (state->dcur.rolloff == 3)
1524             cmd.args[11]--;
1525 
1526     } while (--retune);
1527     return -EINVAL;
1528 }
1529 
1530 static int cx24117_tune(struct dvb_frontend *fe, bool re_tune,
1531     unsigned int mode_flags, unsigned int *delay, enum fe_status *status)
1532 {
1533     struct cx24117_state *state = fe->demodulator_priv;
1534 
1535     dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1536         __func__, state->demod);
1537 
1538     *delay = HZ / 5;
1539     if (re_tune) {
1540         int ret = cx24117_set_frontend(fe);
1541         if (ret)
1542             return ret;
1543     }
1544     return cx24117_read_status(fe, status);
1545 }
1546 
1547 static enum dvbfe_algo cx24117_get_algo(struct dvb_frontend *fe)
1548 {
1549     return DVBFE_ALGO_HW;
1550 }
1551 
1552 static int cx24117_get_frontend(struct dvb_frontend *fe,
1553                 struct dtv_frontend_properties *c)
1554 {
1555     struct cx24117_state *state = fe->demodulator_priv;
1556     struct cx24117_cmd cmd;
1557     u8 reg, st, inv;
1558     int ret, idx;
1559     unsigned int freq;
1560     short srate_os, freq_os;
1561 
1562     u8 buf[0x1f-4];
1563 
1564     /* Read current tune parameters */
1565     cmd.args[0] = CMD_GETCTLACC;
1566     cmd.args[1] = (u8) state->demod;
1567     cmd.len = 2;
1568     ret = cx24117_cmd_execute(fe, &cmd);
1569     if (ret != 0)
1570         return ret;
1571 
1572     /* read all required regs at once */
1573     reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1;
1574     ret = cx24117_readregN(state, reg, buf, 0x1f-4);
1575     if (ret != 0)
1576         return ret;
1577 
1578     st = buf[5];
1579 
1580     /* get spectral inversion */
1581     inv = (((state->demod == 0) ? ~st : st) >> 6) & 1;
1582     if (inv == 0)
1583         c->inversion = INVERSION_OFF;
1584     else
1585         c->inversion = INVERSION_ON;
1586 
1587     /* modulation and fec */
1588     idx = st & 0x3f;
1589     if (c->delivery_system == SYS_DVBS2) {
1590         if (idx > 11)
1591             idx += 9;
1592         else
1593             idx += 7;
1594     }
1595 
1596     c->modulation = cx24117_modfec_modes[idx].modulation;
1597     c->fec_inner = cx24117_modfec_modes[idx].fec;
1598 
1599     /* frequency */
1600     freq = (buf[0] << 16) | (buf[1] << 8) | buf[2];
1601     freq_os = (buf[8] << 8) | buf[9];
1602     c->frequency = freq + freq_os;
1603 
1604     /* symbol rate */
1605     srate_os = (buf[10] << 8) | buf[11];
1606     c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate;
1607     return 0;
1608 }
1609 
1610 static const struct dvb_frontend_ops cx24117_ops = {
1611     .delsys = { SYS_DVBS, SYS_DVBS2 },
1612     .info = {
1613         .name = "Conexant CX24117/CX24132",
1614         .frequency_min_hz =  950 * MHz,
1615         .frequency_max_hz = 2150 * MHz,
1616         .frequency_stepsize_hz = 1011 * kHz,
1617         .frequency_tolerance_hz = 5 * MHz,
1618         .symbol_rate_min = 1000000,
1619         .symbol_rate_max = 45000000,
1620         .caps = FE_CAN_INVERSION_AUTO |
1621             FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1622             FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1623             FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1624             FE_CAN_2G_MODULATION |
1625             FE_CAN_QPSK | FE_CAN_RECOVER
1626     },
1627 
1628     .release = cx24117_release,
1629 
1630     .init = cx24117_initfe,
1631     .sleep = cx24117_sleep,
1632     .read_status = cx24117_read_status,
1633     .read_ber = cx24117_read_ber,
1634     .read_signal_strength = cx24117_read_signal_strength,
1635     .read_snr = cx24117_read_snr,
1636     .read_ucblocks = cx24117_read_ucblocks,
1637     .set_tone = cx24117_set_tone,
1638     .set_voltage = cx24117_set_voltage,
1639     .diseqc_send_master_cmd = cx24117_send_diseqc_msg,
1640     .diseqc_send_burst = cx24117_diseqc_send_burst,
1641     .get_frontend_algo = cx24117_get_algo,
1642     .tune = cx24117_tune,
1643 
1644     .set_frontend = cx24117_set_frontend,
1645     .get_frontend = cx24117_get_frontend,
1646 };
1647 
1648 
1649 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware");
1650 MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)");
1651 MODULE_LICENSE("GPL");
1652 MODULE_VERSION("1.1");
1653 MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE);
1654
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