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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *    Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
0004  *    ATBM8830, ATBM8831
0005  *
0006  *    Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
0007  */
0008 
0009 #include <asm/div64.h>
0010 #include <media/dvb_frontend.h>
0011 
0012 #include "atbm8830.h"
0013 #include "atbm8830_priv.h"
0014 
0015 #define dprintk(args...) \
0016     do { \
0017         if (debug) \
0018             printk(KERN_DEBUG "atbm8830: " args); \
0019     } while (0)
0020 
0021 static int debug;
0022 
0023 module_param(debug, int, 0644);
0024 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
0025 
0026 static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
0027 {
0028     int ret = 0;
0029     u8 dev_addr;
0030     u8 buf1[] = { reg >> 8, reg & 0xFF };
0031     u8 buf2[] = { data };
0032     struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
0033     struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
0034 
0035     dev_addr = priv->config->demod_address;
0036     msg1.addr = dev_addr;
0037     msg2.addr = dev_addr;
0038 
0039     if (debug >= 2)
0040         dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
0041 
0042     ret = i2c_transfer(priv->i2c, &msg1, 1);
0043     if (ret != 1)
0044         return -EIO;
0045 
0046     ret = i2c_transfer(priv->i2c, &msg2, 1);
0047     return (ret != 1) ? -EIO : 0;
0048 }
0049 
0050 static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
0051 {
0052     int ret;
0053     u8 dev_addr;
0054 
0055     u8 buf1[] = { reg >> 8, reg & 0xFF };
0056     u8 buf2[] = { 0 };
0057     struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
0058     struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
0059 
0060     dev_addr = priv->config->demod_address;
0061     msg1.addr = dev_addr;
0062     msg2.addr = dev_addr;
0063 
0064     ret = i2c_transfer(priv->i2c, &msg1, 1);
0065     if (ret != 1) {
0066         dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
0067         return -EIO;
0068     }
0069 
0070     ret = i2c_transfer(priv->i2c, &msg2, 1);
0071     if (ret != 1)
0072         return -EIO;
0073 
0074     *p_data = buf2[0];
0075     if (debug >= 2)
0076         dprintk("%s: reg=0x%04X, data=0x%02X\n",
0077             __func__, reg, buf2[0]);
0078 
0079     return 0;
0080 }
0081 
0082 /* Lock register latch so that multi-register read is atomic */
0083 static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
0084 {
0085     return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
0086 }
0087 
0088 static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
0089 {
0090     u32 val;
0091     u64 t;
0092 
0093     /* 0x100000 * freq / 30.4MHz */
0094     t = (u64)0x100000 * freq;
0095     do_div(t, 30400);
0096     val = t;
0097 
0098     atbm8830_write_reg(priv, REG_OSC_CLK, val);
0099     atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
0100     atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
0101 
0102     return 0;
0103 }
0104 
0105 static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
0106 {
0107 
0108     u32 fs = priv->config->osc_clk_freq;
0109     u64 t;
0110     u32 val;
0111     u8 dat;
0112 
0113     if (freq != 0) {
0114         /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
0115         t = (u64) 2 * 31416 * (freq - fs);
0116         t <<= 22;
0117         do_div(t, fs);
0118         do_div(t, 1000);
0119         val = t;
0120 
0121         atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
0122         atbm8830_write_reg(priv, REG_IF_FREQ, val);
0123         atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
0124         atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
0125 
0126         atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
0127         dat &= 0xFC;
0128         atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
0129     } else {
0130         /* Zero IF */
0131         atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
0132 
0133         atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
0134         dat &= 0xFC;
0135         dat |= 0x02;
0136         atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
0137 
0138         if (priv->config->zif_swap_iq)
0139             atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
0140         else
0141             atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
0142     }
0143 
0144     return 0;
0145 }
0146 
0147 static int is_locked(struct atbm_state *priv, u8 *locked)
0148 {
0149     u8 status;
0150 
0151     atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
0152 
0153     if (locked != NULL)
0154         *locked = (status == 1);
0155     return 0;
0156 }
0157 
0158 static int set_agc_config(struct atbm_state *priv,
0159     u8 min, u8 max, u8 hold_loop)
0160 {
0161     /* no effect if both min and max are zero */
0162     if (!min && !max)
0163         return 0;
0164 
0165     atbm8830_write_reg(priv, REG_AGC_MIN, min);
0166     atbm8830_write_reg(priv, REG_AGC_MAX, max);
0167     atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
0168 
0169     return 0;
0170 }
0171 
0172 static int set_static_channel_mode(struct atbm_state *priv)
0173 {
0174     int i;
0175 
0176     for (i = 0; i < 5; i++)
0177         atbm8830_write_reg(priv, 0x099B + i, 0x08);
0178 
0179     atbm8830_write_reg(priv, 0x095B, 0x7F);
0180     atbm8830_write_reg(priv, 0x09CB, 0x01);
0181     atbm8830_write_reg(priv, 0x09CC, 0x7F);
0182     atbm8830_write_reg(priv, 0x09CD, 0x7F);
0183     atbm8830_write_reg(priv, 0x0E01, 0x20);
0184 
0185     /* For single carrier */
0186     atbm8830_write_reg(priv, 0x0B03, 0x0A);
0187     atbm8830_write_reg(priv, 0x0935, 0x10);
0188     atbm8830_write_reg(priv, 0x0936, 0x08);
0189     atbm8830_write_reg(priv, 0x093E, 0x08);
0190     atbm8830_write_reg(priv, 0x096E, 0x06);
0191 
0192     /* frame_count_max0 */
0193     atbm8830_write_reg(priv, 0x0B09, 0x00);
0194     /* frame_count_max1 */
0195     atbm8830_write_reg(priv, 0x0B0A, 0x08);
0196 
0197     return 0;
0198 }
0199 
0200 static int set_ts_config(struct atbm_state *priv)
0201 {
0202     const struct atbm8830_config *cfg = priv->config;
0203 
0204     /*Set parallel/serial ts mode*/
0205     atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
0206     atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
0207     /*Set ts sampling edge*/
0208     atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
0209         cfg->ts_sampling_edge ? 1 : 0);
0210     /*Set ts clock freerun*/
0211     atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
0212         cfg->ts_clk_gated ? 0 : 1);
0213 
0214     return 0;
0215 }
0216 
0217 static int atbm8830_init(struct dvb_frontend *fe)
0218 {
0219     struct atbm_state *priv = fe->demodulator_priv;
0220     const struct atbm8830_config *cfg = priv->config;
0221 
0222     /*Set oscillator frequency*/
0223     set_osc_freq(priv, cfg->osc_clk_freq);
0224 
0225     /*Set IF frequency*/
0226     set_if_freq(priv, cfg->if_freq);
0227 
0228     /*Set AGC Config*/
0229     set_agc_config(priv, cfg->agc_min, cfg->agc_max,
0230         cfg->agc_hold_loop);
0231 
0232     /*Set static channel mode*/
0233     set_static_channel_mode(priv);
0234 
0235     set_ts_config(priv);
0236     /*Turn off DSP reset*/
0237     atbm8830_write_reg(priv, 0x000A, 0);
0238 
0239     /*SW version test*/
0240     atbm8830_write_reg(priv, 0x020C, 11);
0241 
0242     /* Run */
0243     atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
0244 
0245     return 0;
0246 }
0247 
0248 
0249 static void atbm8830_release(struct dvb_frontend *fe)
0250 {
0251     struct atbm_state *state = fe->demodulator_priv;
0252     dprintk("%s\n", __func__);
0253 
0254     kfree(state);
0255 }
0256 
0257 static int atbm8830_set_fe(struct dvb_frontend *fe)
0258 {
0259     struct atbm_state *priv = fe->demodulator_priv;
0260     int i;
0261     u8 locked = 0;
0262     dprintk("%s\n", __func__);
0263 
0264     /* set frequency */
0265     if (fe->ops.tuner_ops.set_params) {
0266         if (fe->ops.i2c_gate_ctrl)
0267             fe->ops.i2c_gate_ctrl(fe, 1);
0268         fe->ops.tuner_ops.set_params(fe);
0269         if (fe->ops.i2c_gate_ctrl)
0270             fe->ops.i2c_gate_ctrl(fe, 0);
0271     }
0272 
0273     /* start auto lock */
0274     for (i = 0; i < 10; i++) {
0275         mdelay(100);
0276         dprintk("Try %d\n", i);
0277         is_locked(priv, &locked);
0278         if (locked != 0) {
0279             dprintk("ATBM8830 locked!\n");
0280             break;
0281         }
0282     }
0283 
0284     return 0;
0285 }
0286 
0287 static int atbm8830_get_fe(struct dvb_frontend *fe,
0288                struct dtv_frontend_properties *c)
0289 {
0290     dprintk("%s\n", __func__);
0291 
0292     /* TODO: get real readings from device */
0293     /* inversion status */
0294     c->inversion = INVERSION_OFF;
0295 
0296     /* bandwidth */
0297     c->bandwidth_hz = 8000000;
0298 
0299     c->code_rate_HP = FEC_AUTO;
0300     c->code_rate_LP = FEC_AUTO;
0301 
0302     c->modulation = QAM_AUTO;
0303 
0304     /* transmission mode */
0305     c->transmission_mode = TRANSMISSION_MODE_AUTO;
0306 
0307     /* guard interval */
0308     c->guard_interval = GUARD_INTERVAL_AUTO;
0309 
0310     /* hierarchy */
0311     c->hierarchy = HIERARCHY_NONE;
0312 
0313     return 0;
0314 }
0315 
0316 static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
0317     struct dvb_frontend_tune_settings *fesettings)
0318 {
0319     fesettings->min_delay_ms = 0;
0320     fesettings->step_size = 0;
0321     fesettings->max_drift = 0;
0322     return 0;
0323 }
0324 
0325 static int atbm8830_read_status(struct dvb_frontend *fe,
0326                 enum fe_status *fe_status)
0327 {
0328     struct atbm_state *priv = fe->demodulator_priv;
0329     u8 locked = 0;
0330     u8 agc_locked = 0;
0331 
0332     dprintk("%s\n", __func__);
0333     *fe_status = 0;
0334 
0335     is_locked(priv, &locked);
0336     if (locked) {
0337         *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
0338             FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
0339     }
0340     dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
0341 
0342     atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
0343     dprintk("AGC Lock: %d\n", agc_locked);
0344 
0345     return 0;
0346 }
0347 
0348 static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
0349 {
0350     struct atbm_state *priv = fe->demodulator_priv;
0351     u32 frame_err;
0352     u8 t;
0353 
0354     dprintk("%s\n", __func__);
0355 
0356     atbm8830_reglatch_lock(priv, 1);
0357 
0358     atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
0359     frame_err = t & 0x7F;
0360     frame_err <<= 8;
0361     atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
0362     frame_err |= t;
0363 
0364     atbm8830_reglatch_lock(priv, 0);
0365 
0366     *ber = frame_err * 100 / 32767;
0367 
0368     dprintk("%s: ber=0x%x\n", __func__, *ber);
0369     return 0;
0370 }
0371 
0372 static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
0373 {
0374     struct atbm_state *priv = fe->demodulator_priv;
0375     u32 pwm;
0376     u8 t;
0377 
0378     dprintk("%s\n", __func__);
0379     atbm8830_reglatch_lock(priv, 1);
0380 
0381     atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
0382     pwm = t & 0x03;
0383     pwm <<= 8;
0384     atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
0385     pwm |= t;
0386 
0387     atbm8830_reglatch_lock(priv, 0);
0388 
0389     dprintk("AGC PWM = 0x%02X\n", pwm);
0390     pwm = 0x400 - pwm;
0391 
0392     *signal = pwm * 0x10000 / 0x400;
0393 
0394     return 0;
0395 }
0396 
0397 static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
0398 {
0399     dprintk("%s\n", __func__);
0400     *snr = 0;
0401     return 0;
0402 }
0403 
0404 static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0405 {
0406     dprintk("%s\n", __func__);
0407     *ucblocks = 0;
0408     return 0;
0409 }
0410 
0411 static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
0412 {
0413     struct atbm_state *priv = fe->demodulator_priv;
0414 
0415     return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
0416 }
0417 
0418 static const struct dvb_frontend_ops atbm8830_ops = {
0419     .delsys = { SYS_DTMB },
0420     .info = {
0421         .name = "AltoBeam ATBM8830/8831 DMB-TH",
0422         .frequency_min_hz = 474 * MHz,
0423         .frequency_max_hz = 858 * MHz,
0424         .frequency_stepsize_hz = 10 * kHz,
0425         .caps =
0426             FE_CAN_FEC_AUTO |
0427             FE_CAN_QAM_AUTO |
0428             FE_CAN_TRANSMISSION_MODE_AUTO |
0429             FE_CAN_GUARD_INTERVAL_AUTO
0430     },
0431 
0432     .release = atbm8830_release,
0433 
0434     .init = atbm8830_init,
0435     .sleep = NULL,
0436     .write = NULL,
0437     .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
0438 
0439     .set_frontend = atbm8830_set_fe,
0440     .get_frontend = atbm8830_get_fe,
0441     .get_tune_settings = atbm8830_get_tune_settings,
0442 
0443     .read_status = atbm8830_read_status,
0444     .read_ber = atbm8830_read_ber,
0445     .read_signal_strength = atbm8830_read_signal_strength,
0446     .read_snr = atbm8830_read_snr,
0447     .read_ucblocks = atbm8830_read_ucblocks,
0448 };
0449 
0450 struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
0451     struct i2c_adapter *i2c)
0452 {
0453     struct atbm_state *priv = NULL;
0454     u8 data = 0;
0455 
0456     dprintk("%s()\n", __func__);
0457 
0458     if (config == NULL || i2c == NULL)
0459         return NULL;
0460 
0461     priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
0462     if (priv == NULL)
0463         goto error_out;
0464 
0465     priv->config = config;
0466     priv->i2c = i2c;
0467 
0468     /* check if the demod is there */
0469     if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
0470         dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
0471             __func__, priv->config->demod_address);
0472         goto error_out;
0473     }
0474     dprintk("atbm8830 chip id: 0x%02X\n", data);
0475 
0476     memcpy(&priv->frontend.ops, &atbm8830_ops,
0477            sizeof(struct dvb_frontend_ops));
0478     priv->frontend.demodulator_priv = priv;
0479 
0480     atbm8830_init(&priv->frontend);
0481 
0482     atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
0483 
0484     return &priv->frontend;
0485 
0486 error_out:
0487     dprintk("%s() error_out\n", __func__);
0488     kfree(priv);
0489     return NULL;
0490 
0491 }
0492 EXPORT_SYMBOL(atbm8830_attach);
0493 
0494 MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
0495 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
0496 MODULE_LICENSE("GPL");
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