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0011 #include "af9013_priv.h"
0012
0013 struct af9013_state {
0014 struct i2c_client *client;
0015 struct regmap *regmap;
0016 struct i2c_mux_core *muxc;
0017 struct dvb_frontend fe;
0018 u32 clk;
0019 u8 tuner;
0020 u32 if_frequency;
0021 u8 ts_mode;
0022 u8 ts_output_pin;
0023 bool spec_inv;
0024 u8 api_version[4];
0025 u8 gpio[4];
0026
0027 u32 bandwidth_hz;
0028 enum fe_status fe_status;
0029
0030 u8 strength_en, rf_agc_50, rf_agc_80, if_agc_50, if_agc_80;
0031 unsigned long set_frontend_jiffies;
0032 unsigned long read_status_jiffies;
0033 unsigned long strength_jiffies;
0034 unsigned long cnr_jiffies;
0035 unsigned long ber_ucb_jiffies;
0036 u16 dvbv3_snr;
0037 u16 dvbv3_strength;
0038 u32 dvbv3_ber;
0039 u32 dvbv3_ucblocks;
0040 bool first_tune;
0041 };
0042
0043 static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
0044 {
0045 struct i2c_client *client = state->client;
0046 int ret;
0047 u8 pos;
0048 u16 addr;
0049
0050 dev_dbg(&client->dev, "gpio %u, gpioval %02x\n", gpio, gpioval);
0051
0052
0053
0054
0055
0056
0057 switch (gpio) {
0058 case 0:
0059 case 1:
0060 addr = 0xd735;
0061 break;
0062 case 2:
0063 case 3:
0064 addr = 0xd736;
0065 break;
0066
0067 default:
0068 ret = -EINVAL;
0069 goto err;
0070 }
0071
0072 switch (gpio) {
0073 case 0:
0074 case 2:
0075 pos = 0;
0076 break;
0077 case 1:
0078 case 3:
0079 default:
0080 pos = 4;
0081 break;
0082 }
0083
0084 ret = regmap_update_bits(state->regmap, addr, 0x0f << pos,
0085 gpioval << pos);
0086 if (ret)
0087 goto err;
0088
0089 return 0;
0090 err:
0091 dev_dbg(&client->dev, "failed %d\n", ret);
0092 return ret;
0093 }
0094
0095 static int af9013_get_tune_settings(struct dvb_frontend *fe,
0096 struct dvb_frontend_tune_settings *fesettings)
0097 {
0098 fesettings->min_delay_ms = 800;
0099 fesettings->step_size = 0;
0100 fesettings->max_drift = 0;
0101
0102 return 0;
0103 }
0104
0105 static int af9013_set_frontend(struct dvb_frontend *fe)
0106 {
0107 struct af9013_state *state = fe->demodulator_priv;
0108 struct i2c_client *client = state->client;
0109 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0110 int ret, i, sampling_freq;
0111 bool auto_mode, spec_inv;
0112 u8 buf[6];
0113 u32 if_frequency, freq_cw;
0114
0115 dev_dbg(&client->dev, "frequency %u, bandwidth_hz %u\n",
0116 c->frequency, c->bandwidth_hz);
0117
0118
0119 if (fe->ops.tuner_ops.set_params) {
0120 ret = fe->ops.tuner_ops.set_params(fe);
0121 if (ret)
0122 goto err;
0123 }
0124
0125
0126 if (c->bandwidth_hz != state->bandwidth_hz) {
0127 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
0128 if (coeff_lut[i].clock == state->clk &&
0129 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
0130 break;
0131 }
0132 }
0133
0134
0135 if (i == ARRAY_SIZE(coeff_lut)) {
0136 ret = -EINVAL;
0137 goto err;
0138 }
0139
0140 ret = regmap_bulk_write(state->regmap, 0xae00, coeff_lut[i].val,
0141 sizeof(coeff_lut[i].val));
0142 if (ret)
0143 goto err;
0144 }
0145
0146
0147 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
0148
0149 if (fe->ops.tuner_ops.get_if_frequency) {
0150 ret = fe->ops.tuner_ops.get_if_frequency(fe,
0151 &if_frequency);
0152 if (ret)
0153 goto err;
0154 } else {
0155 if_frequency = state->if_frequency;
0156 }
0157
0158 dev_dbg(&client->dev, "if_frequency %u\n", if_frequency);
0159
0160 sampling_freq = if_frequency;
0161
0162 while (sampling_freq > (state->clk / 2))
0163 sampling_freq -= state->clk;
0164
0165 if (sampling_freq < 0) {
0166 sampling_freq *= -1;
0167 spec_inv = state->spec_inv;
0168 } else {
0169 spec_inv = !state->spec_inv;
0170 }
0171
0172 freq_cw = DIV_ROUND_CLOSEST_ULL((u64)sampling_freq * 0x800000,
0173 state->clk);
0174
0175 if (spec_inv)
0176 freq_cw = 0x800000 - freq_cw;
0177
0178 buf[0] = (freq_cw >> 0) & 0xff;
0179 buf[1] = (freq_cw >> 8) & 0xff;
0180 buf[2] = (freq_cw >> 16) & 0x7f;
0181
0182 freq_cw = 0x800000 - freq_cw;
0183
0184 buf[3] = (freq_cw >> 0) & 0xff;
0185 buf[4] = (freq_cw >> 8) & 0xff;
0186 buf[5] = (freq_cw >> 16) & 0x7f;
0187
0188 ret = regmap_bulk_write(state->regmap, 0xd140, buf, 3);
0189 if (ret)
0190 goto err;
0191
0192 ret = regmap_bulk_write(state->regmap, 0x9be7, buf, 6);
0193 if (ret)
0194 goto err;
0195 }
0196
0197
0198 ret = regmap_update_bits(state->regmap, 0xd330, 0x08, 0x08);
0199 if (ret)
0200 goto err;
0201
0202
0203 ret = regmap_update_bits(state->regmap, 0xd507, 0x40, 0x00);
0204 if (ret)
0205 goto err;
0206
0207
0208 ret = regmap_update_bits(state->regmap, 0x9bfe, 0x01, 0x00);
0209 if (ret)
0210 goto err;
0211
0212
0213 ret = regmap_update_bits(state->regmap, 0x9bc2, 0x01, 0x00);
0214 if (ret)
0215 goto err;
0216
0217
0218 auto_mode = false;
0219 memset(buf, 0, 3);
0220
0221 switch (c->transmission_mode) {
0222 case TRANSMISSION_MODE_AUTO:
0223 auto_mode = true;
0224 break;
0225 case TRANSMISSION_MODE_2K:
0226 break;
0227 case TRANSMISSION_MODE_8K:
0228 buf[0] |= (1 << 0);
0229 break;
0230 default:
0231 dev_dbg(&client->dev, "invalid transmission_mode\n");
0232 auto_mode = true;
0233 }
0234
0235 switch (c->guard_interval) {
0236 case GUARD_INTERVAL_AUTO:
0237 auto_mode = true;
0238 break;
0239 case GUARD_INTERVAL_1_32:
0240 break;
0241 case GUARD_INTERVAL_1_16:
0242 buf[0] |= (1 << 2);
0243 break;
0244 case GUARD_INTERVAL_1_8:
0245 buf[0] |= (2 << 2);
0246 break;
0247 case GUARD_INTERVAL_1_4:
0248 buf[0] |= (3 << 2);
0249 break;
0250 default:
0251 dev_dbg(&client->dev, "invalid guard_interval\n");
0252 auto_mode = true;
0253 }
0254
0255 switch (c->hierarchy) {
0256 case HIERARCHY_AUTO:
0257 auto_mode = true;
0258 break;
0259 case HIERARCHY_NONE:
0260 break;
0261 case HIERARCHY_1:
0262 buf[0] |= (1 << 4);
0263 break;
0264 case HIERARCHY_2:
0265 buf[0] |= (2 << 4);
0266 break;
0267 case HIERARCHY_4:
0268 buf[0] |= (3 << 4);
0269 break;
0270 default:
0271 dev_dbg(&client->dev, "invalid hierarchy\n");
0272 auto_mode = true;
0273 }
0274
0275 switch (c->modulation) {
0276 case QAM_AUTO:
0277 auto_mode = true;
0278 break;
0279 case QPSK:
0280 break;
0281 case QAM_16:
0282 buf[1] |= (1 << 6);
0283 break;
0284 case QAM_64:
0285 buf[1] |= (2 << 6);
0286 break;
0287 default:
0288 dev_dbg(&client->dev, "invalid modulation\n");
0289 auto_mode = true;
0290 }
0291
0292
0293 buf[1] |= (1 << 4);
0294
0295 switch (c->code_rate_HP) {
0296 case FEC_AUTO:
0297 auto_mode = true;
0298 break;
0299 case FEC_1_2:
0300 break;
0301 case FEC_2_3:
0302 buf[2] |= (1 << 0);
0303 break;
0304 case FEC_3_4:
0305 buf[2] |= (2 << 0);
0306 break;
0307 case FEC_5_6:
0308 buf[2] |= (3 << 0);
0309 break;
0310 case FEC_7_8:
0311 buf[2] |= (4 << 0);
0312 break;
0313 default:
0314 dev_dbg(&client->dev, "invalid code_rate_HP\n");
0315 auto_mode = true;
0316 }
0317
0318 switch (c->code_rate_LP) {
0319 case FEC_AUTO:
0320 auto_mode = true;
0321 break;
0322 case FEC_1_2:
0323 break;
0324 case FEC_2_3:
0325 buf[2] |= (1 << 3);
0326 break;
0327 case FEC_3_4:
0328 buf[2] |= (2 << 3);
0329 break;
0330 case FEC_5_6:
0331 buf[2] |= (3 << 3);
0332 break;
0333 case FEC_7_8:
0334 buf[2] |= (4 << 3);
0335 break;
0336 case FEC_NONE:
0337 break;
0338 default:
0339 dev_dbg(&client->dev, "invalid code_rate_LP\n");
0340 auto_mode = true;
0341 }
0342
0343 switch (c->bandwidth_hz) {
0344 case 6000000:
0345 break;
0346 case 7000000:
0347 buf[1] |= (1 << 2);
0348 break;
0349 case 8000000:
0350 buf[1] |= (2 << 2);
0351 break;
0352 default:
0353 dev_dbg(&client->dev, "invalid bandwidth_hz\n");
0354 ret = -EINVAL;
0355 goto err;
0356 }
0357
0358 ret = regmap_bulk_write(state->regmap, 0xd3c0, buf, 3);
0359 if (ret)
0360 goto err;
0361
0362 if (auto_mode) {
0363
0364 ret = regmap_write(state->regmap, 0xaefd, 0x00);
0365 if (ret)
0366 goto err;
0367
0368 dev_dbg(&client->dev, "auto params\n");
0369 } else {
0370
0371 ret = regmap_write(state->regmap, 0xaefd, 0x01);
0372 if (ret)
0373 goto err;
0374
0375 ret = regmap_write(state->regmap, 0xaefe, 0x00);
0376 if (ret)
0377 goto err;
0378
0379 dev_dbg(&client->dev, "manual params\n");
0380 }
0381
0382
0383 ret = regmap_write(state->regmap, 0xffff, 0x00);
0384 if (ret)
0385 goto err;
0386
0387 state->bandwidth_hz = c->bandwidth_hz;
0388 state->set_frontend_jiffies = jiffies;
0389 state->first_tune = false;
0390
0391 return 0;
0392 err:
0393 dev_dbg(&client->dev, "failed %d\n", ret);
0394 return ret;
0395 }
0396
0397 static int af9013_get_frontend(struct dvb_frontend *fe,
0398 struct dtv_frontend_properties *c)
0399 {
0400 struct af9013_state *state = fe->demodulator_priv;
0401 struct i2c_client *client = state->client;
0402 int ret;
0403 u8 buf[3];
0404
0405 dev_dbg(&client->dev, "\n");
0406
0407 ret = regmap_bulk_read(state->regmap, 0xd3c0, buf, 3);
0408 if (ret)
0409 goto err;
0410
0411 switch ((buf[1] >> 6) & 3) {
0412 case 0:
0413 c->modulation = QPSK;
0414 break;
0415 case 1:
0416 c->modulation = QAM_16;
0417 break;
0418 case 2:
0419 c->modulation = QAM_64;
0420 break;
0421 }
0422
0423 switch ((buf[0] >> 0) & 3) {
0424 case 0:
0425 c->transmission_mode = TRANSMISSION_MODE_2K;
0426 break;
0427 case 1:
0428 c->transmission_mode = TRANSMISSION_MODE_8K;
0429 }
0430
0431 switch ((buf[0] >> 2) & 3) {
0432 case 0:
0433 c->guard_interval = GUARD_INTERVAL_1_32;
0434 break;
0435 case 1:
0436 c->guard_interval = GUARD_INTERVAL_1_16;
0437 break;
0438 case 2:
0439 c->guard_interval = GUARD_INTERVAL_1_8;
0440 break;
0441 case 3:
0442 c->guard_interval = GUARD_INTERVAL_1_4;
0443 break;
0444 }
0445
0446 switch ((buf[0] >> 4) & 7) {
0447 case 0:
0448 c->hierarchy = HIERARCHY_NONE;
0449 break;
0450 case 1:
0451 c->hierarchy = HIERARCHY_1;
0452 break;
0453 case 2:
0454 c->hierarchy = HIERARCHY_2;
0455 break;
0456 case 3:
0457 c->hierarchy = HIERARCHY_4;
0458 break;
0459 }
0460
0461 switch ((buf[2] >> 0) & 7) {
0462 case 0:
0463 c->code_rate_HP = FEC_1_2;
0464 break;
0465 case 1:
0466 c->code_rate_HP = FEC_2_3;
0467 break;
0468 case 2:
0469 c->code_rate_HP = FEC_3_4;
0470 break;
0471 case 3:
0472 c->code_rate_HP = FEC_5_6;
0473 break;
0474 case 4:
0475 c->code_rate_HP = FEC_7_8;
0476 break;
0477 }
0478
0479 switch ((buf[2] >> 3) & 7) {
0480 case 0:
0481 c->code_rate_LP = FEC_1_2;
0482 break;
0483 case 1:
0484 c->code_rate_LP = FEC_2_3;
0485 break;
0486 case 2:
0487 c->code_rate_LP = FEC_3_4;
0488 break;
0489 case 3:
0490 c->code_rate_LP = FEC_5_6;
0491 break;
0492 case 4:
0493 c->code_rate_LP = FEC_7_8;
0494 break;
0495 }
0496
0497 switch ((buf[1] >> 2) & 3) {
0498 case 0:
0499 c->bandwidth_hz = 6000000;
0500 break;
0501 case 1:
0502 c->bandwidth_hz = 7000000;
0503 break;
0504 case 2:
0505 c->bandwidth_hz = 8000000;
0506 break;
0507 }
0508
0509 return 0;
0510 err:
0511 dev_dbg(&client->dev, "failed %d\n", ret);
0512 return ret;
0513 }
0514
0515 static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
0516 {
0517 struct af9013_state *state = fe->demodulator_priv;
0518 struct i2c_client *client = state->client;
0519 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0520 int ret, stmp1;
0521 unsigned int utmp, utmp1, utmp2, utmp3, utmp4;
0522 u8 buf[7];
0523
0524 dev_dbg(&client->dev, "\n");
0525
0526
0527
0528
0529
0530 if (time_is_after_jiffies(state->read_status_jiffies + msecs_to_jiffies(2000)) &&
0531 time_is_before_jiffies(state->set_frontend_jiffies + msecs_to_jiffies(4000))) {
0532 *status = state->fe_status;
0533 } else {
0534
0535 ret = regmap_read(state->regmap, 0xd507, &utmp);
0536 if (ret)
0537 goto err;
0538
0539 if ((utmp >> 6) & 0x01) {
0540 utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0541 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
0542 } else {
0543
0544 ret = regmap_read(state->regmap, 0xd330, &utmp);
0545 if (ret)
0546 goto err;
0547
0548 if ((utmp >> 3) & 0x01)
0549 utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
0550 FE_HAS_VITERBI;
0551 else
0552 utmp1 = 0;
0553 }
0554
0555 dev_dbg(&client->dev, "fe_status %02x\n", utmp1);
0556
0557 state->read_status_jiffies = jiffies;
0558
0559 state->fe_status = utmp1;
0560 *status = utmp1;
0561 }
0562
0563
0564 switch (state->strength_en) {
0565 case 0:
0566
0567 ret = regmap_read(state->regmap, 0x9bee, &utmp);
0568 if (ret)
0569 goto err;
0570
0571 if ((utmp >> 0) & 0x01) {
0572
0573 ret = regmap_read(state->regmap, 0x9bbd, &utmp1);
0574 if (ret)
0575 goto err;
0576 ret = regmap_read(state->regmap, 0x9bd0, &utmp2);
0577 if (ret)
0578 goto err;
0579 ret = regmap_read(state->regmap, 0x9be2, &utmp3);
0580 if (ret)
0581 goto err;
0582 ret = regmap_read(state->regmap, 0x9be4, &utmp4);
0583 if (ret)
0584 goto err;
0585
0586 state->rf_agc_50 = utmp1;
0587 state->rf_agc_80 = utmp2;
0588 state->if_agc_50 = utmp3;
0589 state->if_agc_80 = utmp4;
0590 dev_dbg(&client->dev,
0591 "rf_agc_50 %u, rf_agc_80 %u, if_agc_50 %u, if_agc_80 %u\n",
0592 utmp1, utmp2, utmp3, utmp4);
0593
0594 state->strength_en = 1;
0595 } else {
0596
0597 state->strength_en = 2;
0598 break;
0599 }
0600 fallthrough;
0601 case 1:
0602 if (time_is_after_jiffies(state->strength_jiffies + msecs_to_jiffies(2000)))
0603 break;
0604
0605
0606 ret = regmap_bulk_read(state->regmap, 0xd07c, buf, 2);
0607 if (ret)
0608 goto err;
0609
0610
0611
0612
0613
0614 #define agc_gain (buf[0] + buf[1])
0615 #define agc_gain_50dbm (state->rf_agc_50 + state->if_agc_50)
0616 #define agc_gain_80dbm (state->rf_agc_80 + state->if_agc_80)
0617 stmp1 = 30000 * (agc_gain - agc_gain_80dbm) /
0618 (agc_gain_50dbm - agc_gain_80dbm) - 80000;
0619
0620 dev_dbg(&client->dev,
0621 "strength %d, agc_gain %d, agc_gain_50dbm %d, agc_gain_80dbm %d\n",
0622 stmp1, agc_gain, agc_gain_50dbm, agc_gain_80dbm);
0623
0624 state->strength_jiffies = jiffies;
0625
0626 utmp1 = clamp(stmp1 + 90000, 0, 60000);
0627 state->dvbv3_strength = div_u64((u64)utmp1 * 0xffff, 60000);
0628
0629 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
0630 c->strength.stat[0].svalue = stmp1;
0631 break;
0632 default:
0633 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0634 break;
0635 }
0636
0637
0638 switch (state->fe_status & FE_HAS_VITERBI) {
0639 case FE_HAS_VITERBI:
0640 if (time_is_after_jiffies(state->cnr_jiffies + msecs_to_jiffies(2000)))
0641 break;
0642
0643
0644 ret = regmap_read(state->regmap, 0xd2e1, &utmp);
0645 if (ret)
0646 goto err;
0647
0648 if (!((utmp >> 3) & 0x01)) {
0649 dev_dbg(&client->dev, "cnr not ready\n");
0650 break;
0651 }
0652
0653
0654 ret = regmap_bulk_read(state->regmap, 0xd2e3, buf, 3);
0655 if (ret)
0656 goto err;
0657
0658 utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
0659
0660
0661 ret = regmap_read(state->regmap, 0xd3c1, &utmp);
0662 if (ret)
0663 goto err;
0664
0665 switch ((utmp >> 6) & 3) {
0666 case 0:
0667
0668
0669
0670
0671
0672 utmp1 = clamp(utmp1, 653799U, 1689999U);
0673 utmp1 = ((u64)(intlog10(utmp1)
0674 - intlog10(1690000 - utmp1)
0675 + 3355443) * 13 * 1000) >> 24;
0676 break;
0677 case 1:
0678
0679
0680
0681
0682
0683 utmp1 = clamp(utmp1, 371105U, 827999U);
0684 utmp1 = ((u64)(intlog10(utmp1 - 370000)
0685 - intlog10(828000 - utmp1)
0686 + 43900382) * 6 * 1000) >> 24;
0687 break;
0688 case 2:
0689
0690
0691
0692
0693
0694 utmp1 = clamp(utmp1, 193246U, 424999U);
0695 utmp1 = ((u64)(intlog10(utmp1 - 193000)
0696 - intlog10(425000 - utmp1)
0697 + 49912218) * 8 * 1000) >> 24;
0698 break;
0699 default:
0700 dev_dbg(&client->dev, "invalid modulation %u\n",
0701 (utmp >> 6) & 3);
0702 utmp1 = 0;
0703 break;
0704 }
0705
0706 dev_dbg(&client->dev, "cnr %u\n", utmp1);
0707
0708 state->cnr_jiffies = jiffies;
0709 state->dvbv3_snr = utmp1 / 100;
0710
0711 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
0712 c->cnr.stat[0].svalue = utmp1;
0713 break;
0714 default:
0715 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0716 break;
0717 }
0718
0719
0720 switch (state->fe_status & FE_HAS_SYNC) {
0721 case FE_HAS_SYNC:
0722 if (time_is_after_jiffies(state->ber_ucb_jiffies + msecs_to_jiffies(2000)))
0723 break;
0724
0725
0726 ret = regmap_read(state->regmap, 0xd391, &utmp);
0727 if (ret)
0728 goto err;
0729
0730 if (!((utmp >> 4) & 0x01)) {
0731 dev_dbg(&client->dev, "ber not ready\n");
0732 break;
0733 }
0734
0735
0736 ret = regmap_bulk_read(state->regmap, 0xd385, buf, 7);
0737 if (ret)
0738 goto err;
0739
0740 utmp1 = buf[4] << 16 | buf[3] << 8 | buf[2] << 0;
0741 utmp2 = (buf[1] << 8 | buf[0] << 0) * 204 * 8;
0742 utmp3 = buf[6] << 8 | buf[5] << 0;
0743 utmp4 = buf[1] << 8 | buf[0] << 0;
0744
0745
0746 if (utmp4 != 10000) {
0747 buf[0] = (10000 >> 0) & 0xff;
0748 buf[1] = (10000 >> 8) & 0xff;
0749 ret = regmap_bulk_write(state->regmap, 0xd385, buf, 2);
0750 if (ret)
0751 goto err;
0752 }
0753
0754
0755 ret = regmap_update_bits(state->regmap, 0xd391, 0x20, 0x20);
0756 if (ret)
0757 goto err;
0758
0759 dev_dbg(&client->dev, "post_bit_error %u, post_bit_count %u\n",
0760 utmp1, utmp2);
0761 dev_dbg(&client->dev, "block_error %u, block_count %u\n",
0762 utmp3, utmp4);
0763
0764 state->ber_ucb_jiffies = jiffies;
0765 state->dvbv3_ber = utmp1;
0766 state->dvbv3_ucblocks += utmp3;
0767
0768 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
0769 c->post_bit_error.stat[0].uvalue += utmp1;
0770 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
0771 c->post_bit_count.stat[0].uvalue += utmp2;
0772
0773 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
0774 c->block_error.stat[0].uvalue += utmp3;
0775 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
0776 c->block_count.stat[0].uvalue += utmp4;
0777 break;
0778 default:
0779 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0780 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0781
0782 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0783 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
0784 break;
0785 }
0786
0787 return 0;
0788 err:
0789 dev_dbg(&client->dev, "failed %d\n", ret);
0790 return ret;
0791 }
0792
0793 static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
0794 {
0795 struct af9013_state *state = fe->demodulator_priv;
0796
0797 *snr = state->dvbv3_snr;
0798
0799 return 0;
0800 }
0801
0802 static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
0803 {
0804 struct af9013_state *state = fe->demodulator_priv;
0805
0806 *strength = state->dvbv3_strength;
0807
0808 return 0;
0809 }
0810
0811 static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
0812 {
0813 struct af9013_state *state = fe->demodulator_priv;
0814
0815 *ber = state->dvbv3_ber;
0816
0817 return 0;
0818 }
0819
0820 static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
0821 {
0822 struct af9013_state *state = fe->demodulator_priv;
0823
0824 *ucblocks = state->dvbv3_ucblocks;
0825
0826 return 0;
0827 }
0828
0829 static int af9013_init(struct dvb_frontend *fe)
0830 {
0831 struct af9013_state *state = fe->demodulator_priv;
0832 struct i2c_client *client = state->client;
0833 int ret, i, len;
0834 unsigned int utmp;
0835 u8 buf[3];
0836 const struct af9013_reg_mask_val *tab;
0837
0838 dev_dbg(&client->dev, "\n");
0839
0840
0841 ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x00);
0842 if (ret)
0843 goto err;
0844
0845
0846 ret = regmap_update_bits(state->regmap, 0xd417, 0x02, 0x00);
0847 if (ret)
0848 goto err;
0849
0850
0851 ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x00);
0852 if (ret)
0853 goto err;
0854
0855
0856 ret = regmap_bulk_write(state->regmap, 0x9bf2, state->api_version, 4);
0857 if (ret)
0858 goto err;
0859
0860
0861 switch (state->clk) {
0862 case 28800000:
0863 utmp = 0;
0864 break;
0865 case 20480000:
0866 utmp = 1;
0867 break;
0868 case 28000000:
0869 utmp = 2;
0870 break;
0871 case 25000000:
0872 utmp = 3;
0873 break;
0874 default:
0875 ret = -EINVAL;
0876 goto err;
0877 }
0878
0879 ret = regmap_update_bits(state->regmap, 0x9bd2, 0x0f, utmp);
0880 if (ret)
0881 goto err;
0882
0883 utmp = div_u64((u64)state->clk * 0x80000, 1000000);
0884 buf[0] = (utmp >> 0) & 0xff;
0885 buf[1] = (utmp >> 8) & 0xff;
0886 buf[2] = (utmp >> 16) & 0xff;
0887 ret = regmap_bulk_write(state->regmap, 0xd180, buf, 3);
0888 if (ret)
0889 goto err;
0890
0891
0892 dev_dbg(&client->dev, "load demod core settings\n");
0893 len = ARRAY_SIZE(demod_init_tab);
0894 tab = demod_init_tab;
0895 for (i = 0; i < len; i++) {
0896 ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
0897 tab[i].val);
0898 if (ret)
0899 goto err;
0900 }
0901
0902
0903 dev_dbg(&client->dev, "load tuner specific settings\n");
0904 switch (state->tuner) {
0905 case AF9013_TUNER_MXL5003D:
0906 len = ARRAY_SIZE(tuner_init_tab_mxl5003d);
0907 tab = tuner_init_tab_mxl5003d;
0908 break;
0909 case AF9013_TUNER_MXL5005D:
0910 case AF9013_TUNER_MXL5005R:
0911 case AF9013_TUNER_MXL5007T:
0912 len = ARRAY_SIZE(tuner_init_tab_mxl5005);
0913 tab = tuner_init_tab_mxl5005;
0914 break;
0915 case AF9013_TUNER_ENV77H11D5:
0916 len = ARRAY_SIZE(tuner_init_tab_env77h11d5);
0917 tab = tuner_init_tab_env77h11d5;
0918 break;
0919 case AF9013_TUNER_MT2060:
0920 len = ARRAY_SIZE(tuner_init_tab_mt2060);
0921 tab = tuner_init_tab_mt2060;
0922 break;
0923 case AF9013_TUNER_MC44S803:
0924 len = ARRAY_SIZE(tuner_init_tab_mc44s803);
0925 tab = tuner_init_tab_mc44s803;
0926 break;
0927 case AF9013_TUNER_QT1010:
0928 case AF9013_TUNER_QT1010A:
0929 len = ARRAY_SIZE(tuner_init_tab_qt1010);
0930 tab = tuner_init_tab_qt1010;
0931 break;
0932 case AF9013_TUNER_MT2060_2:
0933 len = ARRAY_SIZE(tuner_init_tab_mt2060_2);
0934 tab = tuner_init_tab_mt2060_2;
0935 break;
0936 case AF9013_TUNER_TDA18271:
0937 case AF9013_TUNER_TDA18218:
0938 len = ARRAY_SIZE(tuner_init_tab_tda18271);
0939 tab = tuner_init_tab_tda18271;
0940 break;
0941 case AF9013_TUNER_UNKNOWN:
0942 default:
0943 len = ARRAY_SIZE(tuner_init_tab_unknown);
0944 tab = tuner_init_tab_unknown;
0945 break;
0946 }
0947
0948 for (i = 0; i < len; i++) {
0949 ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
0950 tab[i].val);
0951 if (ret)
0952 goto err;
0953 }
0954
0955
0956 if (state->ts_output_pin == 7)
0957 utmp = 1 << 3 | state->ts_mode << 1;
0958 else
0959 utmp = 0 << 3 | state->ts_mode << 1;
0960 ret = regmap_update_bits(state->regmap, 0xd500, 0x0e, utmp);
0961 if (ret)
0962 goto err;
0963
0964
0965 ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x01);
0966 if (ret)
0967 goto err;
0968
0969 state->first_tune = true;
0970
0971 return 0;
0972 err:
0973 dev_dbg(&client->dev, "failed %d\n", ret);
0974 return ret;
0975 }
0976
0977 static int af9013_sleep(struct dvb_frontend *fe)
0978 {
0979 struct af9013_state *state = fe->demodulator_priv;
0980 struct i2c_client *client = state->client;
0981 int ret;
0982 unsigned int utmp;
0983
0984 dev_dbg(&client->dev, "\n");
0985
0986
0987 ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x00);
0988 if (ret)
0989 goto err;
0990
0991
0992 ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x10);
0993 if (ret)
0994 goto err;
0995
0996
0997 ret = regmap_write(state->regmap, 0xaeff, 0x01);
0998 if (ret)
0999 goto err;
1000
1001
1002 ret = regmap_read_poll_timeout(state->regmap, 0xd417, utmp,
1003 (utmp >> 1) & 0x01, 5000, 1000000);
1004 if (ret)
1005 goto err;
1006
1007 if (!((utmp >> 1) & 0x01)) {
1008 ret = -ETIMEDOUT;
1009 goto err;
1010 }
1011
1012
1013 ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x08);
1014 if (ret)
1015 goto err;
1016
1017 return 0;
1018 err:
1019 dev_dbg(&client->dev, "failed %d\n", ret);
1020 return ret;
1021 }
1022
1023 static const struct dvb_frontend_ops af9013_ops;
1024
1025 static int af9013_download_firmware(struct af9013_state *state)
1026 {
1027 struct i2c_client *client = state->client;
1028 int ret, i, len, rem;
1029 unsigned int utmp;
1030 u8 buf[4];
1031 u16 checksum = 0;
1032 const struct firmware *firmware;
1033 const char *name = AF9013_FIRMWARE;
1034
1035 dev_dbg(&client->dev, "\n");
1036
1037
1038 ret = regmap_read(state->regmap, 0x98be, &utmp);
1039 if (ret)
1040 goto err;
1041
1042 dev_dbg(&client->dev, "firmware status %02x\n", utmp);
1043
1044 if (utmp == 0x0c)
1045 return 0;
1046
1047 dev_info(&client->dev, "found a '%s' in cold state, will try to load a firmware\n",
1048 af9013_ops.info.name);
1049
1050
1051 ret = request_firmware(&firmware, name, &client->dev);
1052 if (ret) {
1053 dev_info(&client->dev, "firmware file '%s' not found %d\n",
1054 name, ret);
1055 goto err;
1056 }
1057
1058 dev_info(&client->dev, "downloading firmware from file '%s'\n",
1059 name);
1060
1061
1062 for (i = 0; i < firmware->size; i++)
1063 checksum += firmware->data[i];
1064
1065 buf[0] = (checksum >> 8) & 0xff;
1066 buf[1] = (checksum >> 0) & 0xff;
1067 buf[2] = (firmware->size >> 8) & 0xff;
1068 buf[3] = (firmware->size >> 0) & 0xff;
1069 ret = regmap_bulk_write(state->regmap, 0x50fc, buf, 4);
1070 if (ret)
1071 goto err_release_firmware;
1072
1073
1074 #define LEN_MAX 16
1075 for (rem = firmware->size; rem > 0; rem -= LEN_MAX) {
1076 len = min(LEN_MAX, rem);
1077 ret = regmap_bulk_write(state->regmap,
1078 0x5100 + firmware->size - rem,
1079 &firmware->data[firmware->size - rem],
1080 len);
1081 if (ret) {
1082 dev_err(&client->dev, "firmware download failed %d\n",
1083 ret);
1084 goto err_release_firmware;
1085 }
1086 }
1087
1088 release_firmware(firmware);
1089
1090
1091 ret = regmap_write(state->regmap, 0xe205, 0x01);
1092 if (ret)
1093 goto err;
1094
1095
1096 ret = regmap_read_poll_timeout(state->regmap, 0x98be, utmp,
1097 (utmp == 0x0c || utmp == 0x04),
1098 5000, 1000000);
1099 if (ret)
1100 goto err;
1101
1102 dev_dbg(&client->dev, "firmware status %02x\n", utmp);
1103
1104 if (utmp == 0x04) {
1105 ret = -ENODEV;
1106 dev_err(&client->dev, "firmware did not run\n");
1107 goto err;
1108 } else if (utmp != 0x0c) {
1109 ret = -ENODEV;
1110 dev_err(&client->dev, "firmware boot timeout\n");
1111 goto err;
1112 }
1113
1114 dev_info(&client->dev, "found a '%s' in warm state\n",
1115 af9013_ops.info.name);
1116
1117 return 0;
1118 err_release_firmware:
1119 release_firmware(firmware);
1120 err:
1121 dev_dbg(&client->dev, "failed %d\n", ret);
1122 return ret;
1123 }
1124
1125 static const struct dvb_frontend_ops af9013_ops = {
1126 .delsys = { SYS_DVBT },
1127 .info = {
1128 .name = "Afatech AF9013",
1129 .frequency_min_hz = 174 * MHz,
1130 .frequency_max_hz = 862 * MHz,
1131 .frequency_stepsize_hz = 250 * kHz,
1132 .caps = FE_CAN_FEC_1_2 |
1133 FE_CAN_FEC_2_3 |
1134 FE_CAN_FEC_3_4 |
1135 FE_CAN_FEC_5_6 |
1136 FE_CAN_FEC_7_8 |
1137 FE_CAN_FEC_AUTO |
1138 FE_CAN_QPSK |
1139 FE_CAN_QAM_16 |
1140 FE_CAN_QAM_64 |
1141 FE_CAN_QAM_AUTO |
1142 FE_CAN_TRANSMISSION_MODE_AUTO |
1143 FE_CAN_GUARD_INTERVAL_AUTO |
1144 FE_CAN_HIERARCHY_AUTO |
1145 FE_CAN_RECOVER |
1146 FE_CAN_MUTE_TS
1147 },
1148
1149 .init = af9013_init,
1150 .sleep = af9013_sleep,
1151
1152 .get_tune_settings = af9013_get_tune_settings,
1153 .set_frontend = af9013_set_frontend,
1154 .get_frontend = af9013_get_frontend,
1155
1156 .read_status = af9013_read_status,
1157 .read_snr = af9013_read_snr,
1158 .read_signal_strength = af9013_read_signal_strength,
1159 .read_ber = af9013_read_ber,
1160 .read_ucblocks = af9013_read_ucblocks,
1161 };
1162
1163 static int af9013_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1164 {
1165 struct af9013_state *state = fe->demodulator_priv;
1166 struct i2c_client *client = state->client;
1167 int ret;
1168
1169 dev_dbg(&client->dev, "onoff %d\n", onoff);
1170
1171 ret = regmap_update_bits(state->regmap, 0xd503, 0x01, onoff);
1172 if (ret)
1173 goto err;
1174
1175 return 0;
1176 err:
1177 dev_dbg(&client->dev, "failed %d\n", ret);
1178 return ret;
1179 }
1180
1181 static int af9013_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
1182 int onoff)
1183 {
1184 struct af9013_state *state = fe->demodulator_priv;
1185 struct i2c_client *client = state->client;
1186 int ret;
1187 u8 buf[2];
1188
1189 dev_dbg(&client->dev, "index %d, pid %04x, onoff %d\n",
1190 index, pid, onoff);
1191
1192 if (pid > 0x1fff) {
1193
1194 ret = 0;
1195 goto err;
1196 }
1197
1198 buf[0] = (pid >> 0) & 0xff;
1199 buf[1] = (pid >> 8) & 0xff;
1200 ret = regmap_bulk_write(state->regmap, 0xd505, buf, 2);
1201 if (ret)
1202 goto err;
1203 ret = regmap_write(state->regmap, 0xd504, onoff << 5 | index << 0);
1204 if (ret)
1205 goto err;
1206
1207 return 0;
1208 err:
1209 dev_dbg(&client->dev, "failed %d\n", ret);
1210 return ret;
1211 }
1212
1213 static struct dvb_frontend *af9013_get_dvb_frontend(struct i2c_client *client)
1214 {
1215 struct af9013_state *state = i2c_get_clientdata(client);
1216
1217 dev_dbg(&client->dev, "\n");
1218
1219 return &state->fe;
1220 }
1221
1222 static struct i2c_adapter *af9013_get_i2c_adapter(struct i2c_client *client)
1223 {
1224 struct af9013_state *state = i2c_get_clientdata(client);
1225
1226 dev_dbg(&client->dev, "\n");
1227
1228 return state->muxc->adapter[0];
1229 }
1230
1231
1232
1233
1234
1235
1236 static int af9013_select(struct i2c_mux_core *muxc, u32 chan)
1237 {
1238 struct af9013_state *state = i2c_mux_priv(muxc);
1239 struct i2c_client *client = state->client;
1240 int ret;
1241
1242 dev_dbg(&client->dev, "\n");
1243
1244 if (state->ts_mode == AF9013_TS_MODE_USB)
1245 ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x08);
1246 else
1247 ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x04);
1248 if (ret)
1249 goto err;
1250
1251 return 0;
1252 err:
1253 dev_dbg(&client->dev, "failed %d\n", ret);
1254 return ret;
1255 }
1256
1257 static int af9013_deselect(struct i2c_mux_core *muxc, u32 chan)
1258 {
1259 struct af9013_state *state = i2c_mux_priv(muxc);
1260 struct i2c_client *client = state->client;
1261 int ret;
1262
1263 dev_dbg(&client->dev, "\n");
1264
1265 if (state->ts_mode == AF9013_TS_MODE_USB)
1266 ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x00);
1267 else
1268 ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x00);
1269 if (ret)
1270 goto err;
1271
1272 return 0;
1273 err:
1274 dev_dbg(&client->dev, "failed %d\n", ret);
1275 return ret;
1276 }
1277
1278
1279 static int af9013_wregs(struct i2c_client *client, u8 cmd, u16 reg,
1280 const u8 *val, int len, u8 lock)
1281 {
1282 int ret;
1283 u8 buf[21];
1284 struct i2c_msg msg[1] = {
1285 {
1286 .addr = client->addr,
1287 .flags = 0,
1288 .len = 3 + len,
1289 .buf = buf,
1290 }
1291 };
1292
1293 if (3 + len > sizeof(buf)) {
1294 ret = -EINVAL;
1295 goto err;
1296 }
1297
1298 buf[0] = (reg >> 8) & 0xff;
1299 buf[1] = (reg >> 0) & 0xff;
1300 buf[2] = cmd;
1301 memcpy(&buf[3], val, len);
1302
1303 if (lock)
1304 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
1305 ret = __i2c_transfer(client->adapter, msg, 1);
1306 if (lock)
1307 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
1308 if (ret < 0) {
1309 goto err;
1310 } else if (ret != 1) {
1311 ret = -EREMOTEIO;
1312 goto err;
1313 }
1314
1315 return 0;
1316 err:
1317 dev_dbg(&client->dev, "failed %d\n", ret);
1318 return ret;
1319 }
1320
1321 static int af9013_rregs(struct i2c_client *client, u8 cmd, u16 reg,
1322 u8 *val, int len, u8 lock)
1323 {
1324 int ret;
1325 u8 buf[3];
1326 struct i2c_msg msg[2] = {
1327 {
1328 .addr = client->addr,
1329 .flags = 0,
1330 .len = 3,
1331 .buf = buf,
1332 }, {
1333 .addr = client->addr,
1334 .flags = I2C_M_RD,
1335 .len = len,
1336 .buf = val,
1337 }
1338 };
1339
1340 buf[0] = (reg >> 8) & 0xff;
1341 buf[1] = (reg >> 0) & 0xff;
1342 buf[2] = cmd;
1343
1344 if (lock)
1345 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
1346 ret = __i2c_transfer(client->adapter, msg, 2);
1347 if (lock)
1348 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
1349 if (ret < 0) {
1350 goto err;
1351 } else if (ret != 2) {
1352 ret = -EREMOTEIO;
1353 goto err;
1354 }
1355
1356 return 0;
1357 err:
1358 dev_dbg(&client->dev, "failed %d\n", ret);
1359 return ret;
1360 }
1361
1362 static int af9013_regmap_write(void *context, const void *data, size_t count)
1363 {
1364 struct i2c_client *client = context;
1365 struct af9013_state *state = i2c_get_clientdata(client);
1366 int ret, i;
1367 u8 cmd;
1368 u8 lock = !((u8 *)data)[0];
1369 u16 reg = ((u8 *)data)[1] << 8 | ((u8 *)data)[2] << 0;
1370 u8 *val = &((u8 *)data)[3];
1371 const unsigned int len = count - 3;
1372
1373 if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
1374 cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|1 << 0;
1375 ret = af9013_wregs(client, cmd, reg, val, len, lock);
1376 if (ret)
1377 goto err;
1378 } else if (reg >= 0x5100 && reg < 0x8fff) {
1379
1380 cmd = 1 << 7|1 << 6|(len - 1) << 2|1 << 1|1 << 0;
1381 ret = af9013_wregs(client, cmd, reg, val, len, lock);
1382 if (ret)
1383 goto err;
1384 } else {
1385 cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|1 << 0;
1386 for (i = 0; i < len; i++) {
1387 ret = af9013_wregs(client, cmd, reg + i, val + i, 1,
1388 lock);
1389 if (ret)
1390 goto err;
1391 }
1392 }
1393
1394 return 0;
1395 err:
1396 dev_dbg(&client->dev, "failed %d\n", ret);
1397 return ret;
1398 }
1399
1400 static int af9013_regmap_read(void *context, const void *reg_buf,
1401 size_t reg_size, void *val_buf, size_t val_size)
1402 {
1403 struct i2c_client *client = context;
1404 struct af9013_state *state = i2c_get_clientdata(client);
1405 int ret, i;
1406 u8 cmd;
1407 u8 lock = !((u8 *)reg_buf)[0];
1408 u16 reg = ((u8 *)reg_buf)[1] << 8 | ((u8 *)reg_buf)[2] << 0;
1409 u8 *val = &((u8 *)val_buf)[0];
1410 const unsigned int len = val_size;
1411
1412 if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
1413 cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|0 << 0;
1414 ret = af9013_rregs(client, cmd, reg, val_buf, len, lock);
1415 if (ret)
1416 goto err;
1417 } else {
1418 cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|0 << 0;
1419 for (i = 0; i < len; i++) {
1420 ret = af9013_rregs(client, cmd, reg + i, val + i, 1,
1421 lock);
1422 if (ret)
1423 goto err;
1424 }
1425 }
1426
1427 return 0;
1428 err:
1429 dev_dbg(&client->dev, "failed %d\n", ret);
1430 return ret;
1431 }
1432
1433 static int af9013_probe(struct i2c_client *client,
1434 const struct i2c_device_id *id)
1435 {
1436 struct af9013_state *state;
1437 struct af9013_platform_data *pdata = client->dev.platform_data;
1438 struct dtv_frontend_properties *c;
1439 int ret, i;
1440 u8 firmware_version[4];
1441 static const struct regmap_bus regmap_bus = {
1442 .read = af9013_regmap_read,
1443 .write = af9013_regmap_write,
1444 };
1445 static const struct regmap_config regmap_config = {
1446
1447 .reg_bits = 24,
1448 .val_bits = 8,
1449 };
1450
1451 state = kzalloc(sizeof(*state), GFP_KERNEL);
1452 if (!state) {
1453 ret = -ENOMEM;
1454 goto err;
1455 }
1456
1457 dev_dbg(&client->dev, "\n");
1458
1459
1460 state->client = client;
1461 i2c_set_clientdata(client, state);
1462 state->clk = pdata->clk;
1463 state->tuner = pdata->tuner;
1464 state->if_frequency = pdata->if_frequency;
1465 state->ts_mode = pdata->ts_mode;
1466 state->ts_output_pin = pdata->ts_output_pin;
1467 state->spec_inv = pdata->spec_inv;
1468 memcpy(&state->api_version, pdata->api_version, sizeof(state->api_version));
1469 memcpy(&state->gpio, pdata->gpio, sizeof(state->gpio));
1470 state->regmap = regmap_init(&client->dev, ®map_bus, client,
1471 ®map_config);
1472 if (IS_ERR(state->regmap)) {
1473 ret = PTR_ERR(state->regmap);
1474 goto err_kfree;
1475 }
1476
1477 state->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
1478 af9013_select, af9013_deselect);
1479 if (!state->muxc) {
1480 ret = -ENOMEM;
1481 goto err_regmap_exit;
1482 }
1483 state->muxc->priv = state;
1484 ret = i2c_mux_add_adapter(state->muxc, 0, 0, 0);
1485 if (ret)
1486 goto err_regmap_exit;
1487
1488
1489 if (state->ts_mode != AF9013_TS_MODE_USB) {
1490 ret = af9013_download_firmware(state);
1491 if (ret)
1492 goto err_i2c_mux_del_adapters;
1493 }
1494
1495
1496 ret = regmap_bulk_read(state->regmap, 0x5103, firmware_version,
1497 sizeof(firmware_version));
1498 if (ret)
1499 goto err_i2c_mux_del_adapters;
1500
1501
1502 for (i = 0; i < sizeof(state->gpio); i++) {
1503 ret = af9013_set_gpio(state, i, state->gpio[i]);
1504 if (ret)
1505 goto err_i2c_mux_del_adapters;
1506 }
1507
1508
1509 memcpy(&state->fe.ops, &af9013_ops, sizeof(state->fe.ops));
1510 state->fe.demodulator_priv = state;
1511
1512
1513 pdata->get_dvb_frontend = af9013_get_dvb_frontend;
1514 pdata->get_i2c_adapter = af9013_get_i2c_adapter;
1515 pdata->pid_filter = af9013_pid_filter;
1516 pdata->pid_filter_ctrl = af9013_pid_filter_ctrl;
1517
1518
1519 c = &state->fe.dtv_property_cache;
1520 c->strength.len = 1;
1521 c->cnr.len = 1;
1522 c->post_bit_error.len = 1;
1523 c->post_bit_count.len = 1;
1524 c->block_error.len = 1;
1525 c->block_count.len = 1;
1526
1527 dev_info(&client->dev, "Afatech AF9013 successfully attached\n");
1528 dev_info(&client->dev, "firmware version: %d.%d.%d.%d\n",
1529 firmware_version[0], firmware_version[1],
1530 firmware_version[2], firmware_version[3]);
1531 return 0;
1532 err_i2c_mux_del_adapters:
1533 i2c_mux_del_adapters(state->muxc);
1534 err_regmap_exit:
1535 regmap_exit(state->regmap);
1536 err_kfree:
1537 kfree(state);
1538 err:
1539 dev_dbg(&client->dev, "failed %d\n", ret);
1540 return ret;
1541 }
1542
1543 static int af9013_remove(struct i2c_client *client)
1544 {
1545 struct af9013_state *state = i2c_get_clientdata(client);
1546
1547 dev_dbg(&client->dev, "\n");
1548
1549 i2c_mux_del_adapters(state->muxc);
1550
1551 regmap_exit(state->regmap);
1552
1553 kfree(state);
1554
1555 return 0;
1556 }
1557
1558 static const struct i2c_device_id af9013_id_table[] = {
1559 {"af9013", 0},
1560 {}
1561 };
1562 MODULE_DEVICE_TABLE(i2c, af9013_id_table);
1563
1564 static struct i2c_driver af9013_driver = {
1565 .driver = {
1566 .name = "af9013",
1567 .suppress_bind_attrs = true,
1568 },
1569 .probe = af9013_probe,
1570 .remove = af9013_remove,
1571 .id_table = af9013_id_table,
1572 };
1573
1574 module_i2c_driver(af9013_driver);
1575
1576 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1577 MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1578 MODULE_LICENSE("GPL");
1579 MODULE_FIRMWARE(AF9013_FIRMWARE);