0001
0002 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0003
0004 #include <media/drv-intf/saa7146_vv.h>
0005
0006 static u32 saa7146_i2c_func(struct i2c_adapter *adapter)
0007 {
0008
0009
0010 return I2C_FUNC_I2C
0011 | I2C_FUNC_SMBUS_QUICK
0012 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE
0013 | I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
0014 }
0015
0016
0017 static inline u32 saa7146_i2c_status(struct saa7146_dev *dev)
0018 {
0019 u32 iicsta = saa7146_read(dev, I2C_STATUS);
0020
0021 return iicsta;
0022 }
0023
0024
0025
0026
0027
0028 static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op)
0029 {
0030 int h1, h2;
0031 int i, j, addr;
0032 int mem = 0, op_count = 0;
0033
0034
0035 for(i = 0; i < num; i++) {
0036 mem += m[i].len + 1;
0037 }
0038
0039
0040
0041 mem = 1 + ((mem-1) / 3);
0042
0043
0044
0045
0046 if ((4 * mem) > SAA7146_I2C_MEM) {
0047
0048 return -ENOMEM;
0049 }
0050
0051
0052 memset(op,0,sizeof(__le32)*mem);
0053
0054
0055 for(i = 0; i < num; i++) {
0056
0057 addr = i2c_8bit_addr_from_msg(&m[i]);
0058 h1 = op_count/3; h2 = op_count%3;
0059 op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8));
0060 op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2));
0061 op_count++;
0062
0063
0064 for(j = 0; j < m[i].len; j++) {
0065
0066 h1 = op_count/3; h2 = op_count%3;
0067 op[h1] |= cpu_to_le32( (u32)((u8)m[i].buf[j]) << ((3-h2)*8));
0068 op[h1] |= cpu_to_le32( SAA7146_I2C_CONT << ((3-h2)*2));
0069 op_count++;
0070 }
0071
0072 }
0073
0074
0075
0076 h1 = (op_count-1)/3; h2 = (op_count-1)%3;
0077 if ( SAA7146_I2C_CONT == (0x3 & (le32_to_cpu(op[h1]) >> ((3-h2)*2))) ) {
0078 op[h1] &= ~cpu_to_le32(0x2 << ((3-h2)*2));
0079 op[h1] |= cpu_to_le32(SAA7146_I2C_STOP << ((3-h2)*2));
0080 }
0081
0082
0083 return mem;
0084 }
0085
0086
0087
0088
0089
0090 static int saa7146_i2c_msg_cleanup(const struct i2c_msg *m, int num, __le32 *op)
0091 {
0092 int i, j;
0093 int op_count = 0;
0094
0095
0096 for(i = 0; i < num; i++) {
0097
0098 op_count++;
0099
0100
0101 for(j = 0; j < m[i].len; j++) {
0102
0103 m[i].buf[j] = (le32_to_cpu(op[op_count/3]) >> ((3-(op_count%3))*8));
0104 op_count++;
0105 }
0106 }
0107
0108 return 0;
0109 }
0110
0111
0112 static int saa7146_i2c_reset(struct saa7146_dev *dev)
0113 {
0114
0115 u32 status = saa7146_i2c_status(dev);
0116
0117
0118 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0119 saa7146_write(dev, I2C_TRANSFER, 0);
0120
0121
0122 if ( 0 != ( status & SAA7146_I2C_BUSY) ) {
0123
0124
0125 DEB_I2C("busy_state detected\n");
0126
0127
0128 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
0129 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0130 msleep(SAA7146_I2C_DELAY);
0131
0132
0133 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0134 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0135 msleep(SAA7146_I2C_DELAY);
0136 }
0137
0138
0139 status = saa7146_i2c_status(dev);
0140
0141 if ( dev->i2c_bitrate != status ) {
0142
0143 DEB_I2C("error_state detected. status:0x%08x\n", status);
0144
0145
0146
0147 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
0148 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0149 msleep(SAA7146_I2C_DELAY);
0150
0151
0152 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0153 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0154 msleep(SAA7146_I2C_DELAY);
0155
0156
0157
0158 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0159 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0160 msleep(SAA7146_I2C_DELAY);
0161 }
0162
0163
0164 status = saa7146_i2c_status(dev);
0165 if ( dev->i2c_bitrate != status ) {
0166 DEB_I2C("fatal error. status:0x%08x\n", status);
0167 return -1;
0168 }
0169
0170 return 0;
0171 }
0172
0173
0174
0175
0176 static int saa7146_i2c_writeout(struct saa7146_dev *dev, __le32 *dword, int short_delay)
0177 {
0178 u32 status = 0, mc2 = 0;
0179 int trial = 0;
0180 unsigned long timeout;
0181
0182
0183 DEB_I2C("before: 0x%08x (status: 0x%08x), %d\n",
0184 *dword, saa7146_read(dev, I2C_STATUS), dev->i2c_op);
0185
0186 if( 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) {
0187
0188 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0189 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
0190
0191 dev->i2c_op = 1;
0192 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
0193 SAA7146_IER_ENABLE(dev, MASK_16|MASK_17);
0194 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0195
0196 timeout = HZ/100 + 1;
0197 timeout = wait_event_interruptible_timeout(dev->i2c_wq, dev->i2c_op == 0, timeout);
0198 if (timeout == -ERESTARTSYS || dev->i2c_op) {
0199 SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
0200 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
0201 if (timeout == -ERESTARTSYS)
0202
0203 return -ERESTARTSYS;
0204
0205 pr_warn("%s %s [irq]: timed out waiting for end of xfer\n",
0206 dev->name, __func__);
0207 return -EIO;
0208 }
0209 status = saa7146_read(dev, I2C_STATUS);
0210 } else {
0211 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
0212 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
0213 saa7146_write(dev, MC2, (MASK_00 | MASK_16));
0214
0215
0216 timeout = jiffies + HZ/100 + 1;
0217 while(1) {
0218 mc2 = (saa7146_read(dev, MC2) & 0x1);
0219 if( 0 != mc2 ) {
0220 break;
0221 }
0222 if (time_after(jiffies,timeout)) {
0223 pr_warn("%s %s: timed out waiting for MC2\n",
0224 dev->name, __func__);
0225 return -EIO;
0226 }
0227 }
0228
0229 timeout = jiffies + HZ/100 + 1;
0230
0231 saa7146_i2c_status(dev);
0232 while(1) {
0233 status = saa7146_i2c_status(dev);
0234 if ((status & 0x3) != 1)
0235 break;
0236 if (time_after(jiffies,timeout)) {
0237
0238
0239
0240 pr_warn("%s %s [poll]: timed out waiting for end of xfer\n",
0241 dev->name, __func__);
0242 return -EIO;
0243 }
0244 if (++trial < 50 && short_delay)
0245 udelay(10);
0246 else
0247 msleep(1);
0248 }
0249 }
0250
0251
0252 if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR |
0253 SAA7146_I2C_DTERR | SAA7146_I2C_DRERR |
0254 SAA7146_I2C_AL | SAA7146_I2C_ERR |
0255 SAA7146_I2C_BUSY)) ) {
0256
0257 if ( 0 == (status & SAA7146_I2C_ERR) ||
0258 0 == (status & SAA7146_I2C_BUSY) ) {
0259
0260 DEB_I2C("unexpected i2c status %04x\n", status);
0261 }
0262 if( 0 != (status & SAA7146_I2C_SPERR) ) {
0263 DEB_I2C("error due to invalid start/stop condition\n");
0264 }
0265 if( 0 != (status & SAA7146_I2C_DTERR) ) {
0266 DEB_I2C("error in data transmission\n");
0267 }
0268 if( 0 != (status & SAA7146_I2C_DRERR) ) {
0269 DEB_I2C("error when receiving data\n");
0270 }
0271 if( 0 != (status & SAA7146_I2C_AL) ) {
0272 DEB_I2C("error because arbitration lost\n");
0273 }
0274
0275
0276 if( 0 != (status & SAA7146_I2C_APERR) ) {
0277 DEB_I2C("error in address phase\n");
0278 return -EREMOTEIO;
0279 }
0280
0281 return -EIO;
0282 }
0283
0284
0285 *dword = cpu_to_le32(saa7146_read(dev, I2C_TRANSFER));
0286
0287 DEB_I2C("after: 0x%08x\n", *dword);
0288 return 0;
0289 }
0290
0291 static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries)
0292 {
0293 int i = 0, count = 0;
0294 __le32 *buffer = dev->d_i2c.cpu_addr;
0295 int err = 0;
0296 int short_delay = 0;
0297
0298 if (mutex_lock_interruptible(&dev->i2c_lock))
0299 return -ERESTARTSYS;
0300
0301 for(i=0;i<num;i++) {
0302 DEB_I2C("msg:%d/%d\n", i+1, num);
0303 }
0304
0305
0306 count = saa7146_i2c_msg_prepare(msgs, num, buffer);
0307 if ( 0 > count ) {
0308 err = -EIO;
0309 goto out;
0310 }
0311
0312 if ( count > 3 || 0 != (SAA7146_I2C_SHORT_DELAY & dev->ext->flags) )
0313 short_delay = 1;
0314
0315 do {
0316
0317 err = saa7146_i2c_reset(dev);
0318 if ( 0 > err ) {
0319 DEB_I2C("could not reset i2c-device\n");
0320 goto out;
0321 }
0322
0323
0324 for(i = 0; i < count; i++) {
0325 err = saa7146_i2c_writeout(dev, &buffer[i], short_delay);
0326 if ( 0 != err) {
0327
0328
0329
0330
0331
0332
0333
0334
0335
0336
0337 if (-EREMOTEIO == err && 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags))
0338 goto out;
0339 DEB_I2C("error while sending message(s). starting again\n");
0340 break;
0341 }
0342 }
0343 if( 0 == err ) {
0344 err = num;
0345 break;
0346 }
0347
0348
0349 msleep(10);
0350
0351 } while (err != num && retries--);
0352
0353
0354 if (err != num)
0355 goto out;
0356
0357
0358 if ( 0 != saa7146_i2c_msg_cleanup(msgs, num, buffer)) {
0359 DEB_I2C("could not cleanup i2c-message\n");
0360 err = -EIO;
0361 goto out;
0362 }
0363
0364
0365 DEB_I2C("transmission successful. (msg:%d)\n", err);
0366 out:
0367
0368
0369 if( 0 == dev->revision ) {
0370 __le32 zero = 0;
0371 saa7146_i2c_reset(dev);
0372 if( 0 != saa7146_i2c_writeout(dev, &zero, short_delay)) {
0373 pr_info("revision 0 error. this should never happen\n");
0374 }
0375 }
0376
0377 mutex_unlock(&dev->i2c_lock);
0378 return err;
0379 }
0380
0381
0382 static int saa7146_i2c_xfer(struct i2c_adapter* adapter, struct i2c_msg *msg, int num)
0383 {
0384 struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter);
0385 struct saa7146_dev *dev = to_saa7146_dev(v4l2_dev);
0386
0387
0388 return saa7146_i2c_transfer(dev, msg, num, adapter->retries);
0389 }
0390
0391
0392
0393
0394
0395
0396 static const struct i2c_algorithm saa7146_algo = {
0397 .master_xfer = saa7146_i2c_xfer,
0398 .functionality = saa7146_i2c_func,
0399 };
0400
0401 int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate)
0402 {
0403 DEB_EE("bitrate: 0x%08x\n", bitrate);
0404
0405
0406 saa7146_write(dev, MC1, (MASK_08 | MASK_24));
0407
0408 dev->i2c_bitrate = bitrate;
0409 saa7146_i2c_reset(dev);
0410
0411 if (i2c_adapter) {
0412 i2c_set_adapdata(i2c_adapter, &dev->v4l2_dev);
0413 i2c_adapter->dev.parent = &dev->pci->dev;
0414 i2c_adapter->algo = &saa7146_algo;
0415 i2c_adapter->algo_data = NULL;
0416 i2c_adapter->timeout = SAA7146_I2C_TIMEOUT;
0417 i2c_adapter->retries = SAA7146_I2C_RETRIES;
0418 }
0419
0420 return 0;
0421 }