common/b2c2/flexcop-sram.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
0004  * flexcop-sram.c - functions for controlling the SRAM
0005  * see flexcop.c for copyright information
0006  */
0007 #include "flexcop.h"
0008
0009 static void flexcop_sram_set_chip(struct flexcop_device *fc,
0010         flexcop_sram_type_t type)
0011 {
0012     flexcop_set_ibi_value(wan_ctrl_reg_71c, sram_chip, type);
0013 }
0014
0015 int flexcop_sram_init(struct flexcop_device *fc)
0016 {
0017     switch (fc->rev) {
0018     case FLEXCOP_II:
0019     case FLEXCOP_IIB:
0020         flexcop_sram_set_chip(fc, FC_SRAM_1_32KB);
0021         break;
0022     case FLEXCOP_III:
0023         flexcop_sram_set_chip(fc, FC_SRAM_1_48KB);
0024         break;
0025     default:
0026         return -EINVAL;
0027     }
0028     return 0;
0029 }
0030
0031 int flexcop_sram_set_dest(struct flexcop_device *fc, flexcop_sram_dest_t dest,
0032          flexcop_sram_dest_target_t target)
0033 {
0034     flexcop_ibi_value v;
0035     v = fc->read_ibi_reg(fc, sram_dest_reg_714);
0036
0037     if (fc->rev != FLEXCOP_III && target == FC_SRAM_DEST_TARGET_FC3_CA) {
0038         err("SRAM destination target to available on FlexCopII(b)\n");
0039         return -EINVAL;
0040     }
0041     deb_sram("sram dest: %x target: %x\n", dest, target);
0042
0043     if (dest & FC_SRAM_DEST_NET)
0044         v.sram_dest_reg_714.NET_Dest = target;
0045     if (dest & FC_SRAM_DEST_CAI)
0046         v.sram_dest_reg_714.CAI_Dest = target;
0047     if (dest & FC_SRAM_DEST_CAO)
0048         v.sram_dest_reg_714.CAO_Dest = target;
0049     if (dest & FC_SRAM_DEST_MEDIA)
0050         v.sram_dest_reg_714.MEDIA_Dest = target;
0051
0052     fc->write_ibi_reg(fc,sram_dest_reg_714,v);
0053     udelay(1000); /* TODO delay really necessary */
0054
0055     return 0;
0056 }
0057 EXPORT_SYMBOL(flexcop_sram_set_dest);
0058
0059 void flexcop_wan_set_speed(struct flexcop_device *fc, flexcop_wan_speed_t s)
0060 {
0061     flexcop_set_ibi_value(wan_ctrl_reg_71c,wan_speed_sig,s);
0062 }
0063 EXPORT_SYMBOL(flexcop_wan_set_speed);
0064
0065 void flexcop_sram_ctrl(struct flexcop_device *fc, int usb_wan, int sramdma, int maximumfill)
0066 {
0067     flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714);
0068     v.sram_dest_reg_714.ctrl_usb_wan = usb_wan;
0069     v.sram_dest_reg_714.ctrl_sramdma = sramdma;
0070     v.sram_dest_reg_714.ctrl_maximumfill = maximumfill;
0071     fc->write_ibi_reg(fc,sram_dest_reg_714,v);
0072 }
0073 EXPORT_SYMBOL(flexcop_sram_ctrl);
0074
0075 #if 0
0076 static void flexcop_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
0077 {
0078     int i, retries;
0079     u32 command;
0080
0081     for (i = 0; i < len; i++) {
0082         command = bank | addr | 0x04000000 | (*buf << 0x10);
0083
0084         retries = 2;
0085
0086         while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
0087             mdelay(1);
0088             retries--;
0089         }
0090
0091         if (retries == 0)
0092             printk("%s: SRAM timeout\n", __func__);
0093
0094         write_reg_dw(adapter, 0x700, command);
0095
0096         buf++;
0097         addr++;
0098     }
0099 }
0100
0101 static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
0102 {
0103     int i, retries;
0104     u32 command, value;
0105
0106     for (i = 0; i < len; i++) {
0107         command = bank | addr | 0x04008000;
0108
0109         retries = 10000;
0110
0111         while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
0112             mdelay(1);
0113             retries--;
0114         }
0115
0116         if (retries == 0)
0117             printk("%s: SRAM timeout\n", __func__);
0118
0119         write_reg_dw(adapter, 0x700, command);
0120
0121         retries = 10000;
0122
0123         while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
0124             mdelay(1);
0125             retries--;
0126         }
0127
0128         if (retries == 0)
0129             printk("%s: SRAM timeout\n", __func__);
0130
0131         value = read_reg_dw(adapter, 0x700) >> 0x10;
0132
0133         *buf = (value & 0xff);
0134
0135         addr++;
0136         buf++;
0137     }
0138 }
0139
0140 static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
0141 {
0142     u32 bank;
0143
0144     bank = 0;
0145
0146     if (adapter->dw_sram_type == 0x20000) {
0147         bank = (addr & 0x18000) << 0x0d;
0148     }
0149
0150     if (adapter->dw_sram_type == 0x00000) {
0151         if ((addr >> 0x0f) == 0)
0152             bank = 0x20000000;
0153         else
0154             bank = 0x10000000;
0155     }
0156     flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
0157 }
0158
0159 static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
0160 {
0161     u32 bank;
0162     bank = 0;
0163
0164     if (adapter->dw_sram_type == 0x20000) {
0165         bank = (addr & 0x18000) << 0x0d;
0166     }
0167
0168     if (adapter->dw_sram_type == 0x00000) {
0169         if ((addr >> 0x0f) == 0)
0170             bank = 0x20000000;
0171         else
0172             bank = 0x10000000;
0173     }
0174     flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
0175 }
0176
0177 static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
0178 {
0179     u32 length;
0180     while (len != 0) {
0181         length = len;
0182         /* check if the address range belongs to the same
0183          * 32K memory chip. If not, the data is read
0184          * from one chip at a time */
0185         if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
0186             length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
0187         }
0188
0189         sram_read_chunk(adapter, addr, buf, length);
0190         addr = addr + length;
0191         buf = buf + length;
0192         len = len - length;
0193     }
0194 }
0195
0196 static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
0197 {
0198     u32 length;
0199     while (len != 0) {
0200         length = len;
0201
0202         /* check if the address range belongs to the same
0203          * 32K memory chip. If not, the data is
0204          * written to one chip at a time */
0205         if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
0206             length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
0207         }
0208
0209         sram_write_chunk(adapter, addr, buf, length);
0210         addr = addr + length;
0211         buf = buf + length;
0212         len = len - length;
0213     }
0214 }
0215
0216 static void sram_set_size(struct adapter *adapter, u32 mask)
0217 {
0218     write_reg_dw(adapter, 0x71c,
0219             (mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
0220 }
0221
0222 static void sram_init(struct adapter *adapter)
0223 {
0224     u32 tmp;
0225     tmp = read_reg_dw(adapter, 0x71c);
0226     write_reg_dw(adapter, 0x71c, 1);
0227
0228     if (read_reg_dw(adapter, 0x71c) != 0) {
0229         write_reg_dw(adapter, 0x71c, tmp);
0230         adapter->dw_sram_type = tmp & 0x30000;
0231         ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
0232     } else {
0233         adapter->dw_sram_type = 0x10000;
0234         ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
0235     }
0236 }
0237
0238 static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
0239 {
0240     u8 tmp1, tmp2;
0241     dprintk("%s: mask = %x, addr = %x\n", __func__, mask, addr);
0242
0243     sram_set_size(adapter, mask);
0244     sram_init(adapter);
0245
0246     tmp2 = 0xa5;
0247     tmp1 = 0x4f;
0248
0249     sram_write(adapter, addr, &tmp2, 1);
0250     sram_write(adapter, addr + 4, &tmp1, 1);
0251
0252     tmp2 = 0;
0253     mdelay(20);
0254
0255     sram_read(adapter, addr, &tmp2, 1);
0256     sram_read(adapter, addr, &tmp2, 1);
0257
0258     dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
0259
0260     if (tmp2 != 0xa5)
0261         return 0;
0262
0263     tmp2 = 0x5a;
0264     tmp1 = 0xf4;
0265
0266     sram_write(adapter, addr, &tmp2, 1);
0267     sram_write(adapter, addr + 4, &tmp1, 1);
0268
0269     tmp2 = 0;
0270     mdelay(20);
0271
0272     sram_read(adapter, addr, &tmp2, 1);
0273     sram_read(adapter, addr, &tmp2, 1);
0274
0275     dprintk("%s: wrote 0x5a, read 0x%2x\n", __func__, tmp2);
0276
0277     if (tmp2 != 0x5a)
0278         return 0;
0279     return 1;
0280 }
0281
0282 static u32 sram_length(struct adapter *adapter)
0283 {
0284     if (adapter->dw_sram_type == 0x10000)
0285         return 32768; /* 32K */
0286     if (adapter->dw_sram_type == 0x00000)
0287         return 65536; /* 64K */
0288     if (adapter->dw_sram_type == 0x20000)
0289         return 131072; /* 128K */
0290     return 32768; /* 32K */
0291 }
0292
0293 /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
0294    - for 128K there are 4x32K chips at bank 0,1,2,3.
0295    - for  64K there are 2x32K chips at bank 1,2.
0296    - for  32K there is one 32K chip at bank 0.
0297
0298    FlexCop works only with one bank at a time. The bank is selected
0299    by bits 28-29 of the 0x700 register.
0300
0301    bank 0 covers addresses 0x00000-0x07fff
0302    bank 1 covers addresses 0x08000-0x0ffff
0303    bank 2 covers addresses 0x10000-0x17fff
0304    bank 3 covers addresses 0x18000-0x1ffff */
0305
0306 static int flexcop_sram_detect(struct flexcop_device *fc)
0307 {
0308     flexcop_ibi_value r208, r71c_0, vr71c_1;
0309     r208 = fc->read_ibi_reg(fc, ctrl_208);
0310     fc->write_ibi_reg(fc, ctrl_208, ibi_zero);
0311
0312     r71c_0 = fc->read_ibi_reg(fc, wan_ctrl_reg_71c);
0313     write_reg_dw(adapter, 0x71c, 1);
0314     tmp3 = read_reg_dw(adapter, 0x71c);
0315     dprintk("%s: tmp3 = %x\n", __func__, tmp3);
0316     write_reg_dw(adapter, 0x71c, tmp2);
0317
0318     // check for internal SRAM ???
0319     tmp3--;
0320     if (tmp3 != 0) {
0321         sram_set_size(adapter, 0x10000);
0322         sram_init(adapter);
0323         write_reg_dw(adapter, 0x208, tmp);
0324         dprintk("%s: sram size = 32K\n", __func__);
0325         return 32;
0326     }
0327
0328     if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
0329         sram_set_size(adapter, 0x20000);
0330         sram_init(adapter);
0331         write_reg_dw(adapter, 0x208, tmp);
0332         dprintk("%s: sram size = 128K\n", __func__);
0333         return 128;
0334     }
0335
0336     if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
0337         sram_set_size(adapter, 0x00000);
0338         sram_init(adapter);
0339         write_reg_dw(adapter, 0x208, tmp);
0340         dprintk("%s: sram size = 64K\n", __func__);
0341         return 64;
0342     }
0343
0344     if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
0345         sram_set_size(adapter, 0x10000);
0346         sram_init(adapter);
0347         write_reg_dw(adapter, 0x208, tmp);
0348         dprintk("%s: sram size = 32K\n", __func__);
0349         return 32;
0350     }
0351
0352     sram_set_size(adapter, 0x10000);
0353     sram_init(adapter);
0354     write_reg_dw(adapter, 0x208, tmp);
0355     dprintk("%s: SRAM detection failed. Set to 32K \n", __func__);
0356     return 0;
0357 }
0358
0359 static void sll_detect_sram_size(struct adapter *adapter)
0360 {
0361     sram_detect_for_flex2(adapter);
0362 }
0363
0364 #endif