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0007 #ifndef __FLEXCOP_REG_H__
0008 #define __FLEXCOP_REG_H__
0009
0010 typedef enum {
0011 FLEXCOP_UNK = 0,
0012 FLEXCOP_II,
0013 FLEXCOP_IIB,
0014 FLEXCOP_III,
0015 } flexcop_revision_t;
0016
0017 typedef enum {
0018 FC_UNK = 0,
0019 FC_CABLE,
0020 FC_AIR_DVBT,
0021 FC_AIR_ATSC1,
0022 FC_AIR_ATSC2,
0023 FC_AIR_ATSC3,
0024 FC_SKY_REV23,
0025 FC_SKY_REV26,
0026 FC_SKY_REV27,
0027 FC_SKY_REV28,
0028 FC_SKYS2_REV33,
0029 } flexcop_device_type_t;
0030
0031 typedef enum {
0032 FC_USB = 0,
0033 FC_PCI,
0034 } flexcop_bus_t;
0035
0036
0037 #if defined(__LITTLE_ENDIAN)
0038 #include "flexcop_ibi_value_le.h"
0039 #else
0040 #if defined(__BIG_ENDIAN)
0041 #include "flexcop_ibi_value_be.h"
0042 #else
0043 #error no endian defined
0044 #endif
0045 #endif
0046
0047 #define fc_data_Tag_ID_DVB 0x3e
0048 #define fc_data_Tag_ID_ATSC 0x3f
0049 #define fc_data_Tag_ID_IDSB 0x8b
0050
0051 #define fc_key_code_default 0x1
0052 #define fc_key_code_even 0x2
0053 #define fc_key_code_odd 0x3
0054
0055 extern flexcop_ibi_value ibi_zero;
0056
0057 typedef enum {
0058 FC_I2C_PORT_DEMOD = 1,
0059 FC_I2C_PORT_EEPROM = 2,
0060 FC_I2C_PORT_TUNER = 3,
0061 } flexcop_i2c_port_t;
0062
0063 typedef enum {
0064 FC_WRITE = 0,
0065 FC_READ = 1,
0066 } flexcop_access_op_t;
0067
0068 typedef enum {
0069 FC_SRAM_DEST_NET = 1,
0070 FC_SRAM_DEST_CAI = 2,
0071 FC_SRAM_DEST_CAO = 4,
0072 FC_SRAM_DEST_MEDIA = 8
0073 } flexcop_sram_dest_t;
0074
0075 typedef enum {
0076 FC_SRAM_DEST_TARGET_WAN_USB = 0,
0077 FC_SRAM_DEST_TARGET_DMA1 = 1,
0078 FC_SRAM_DEST_TARGET_DMA2 = 2,
0079 FC_SRAM_DEST_TARGET_FC3_CA = 3
0080 } flexcop_sram_dest_target_t;
0081
0082 typedef enum {
0083 FC_SRAM_2_32KB = 0,
0084 FC_SRAM_1_32KB = 1,
0085 FC_SRAM_1_128KB = 2,
0086 FC_SRAM_1_48KB = 3,
0087 } flexcop_sram_type_t;
0088
0089 typedef enum {
0090 FC_WAN_SPEED_4MBITS = 0,
0091 FC_WAN_SPEED_8MBITS = 1,
0092 FC_WAN_SPEED_12MBITS = 2,
0093 FC_WAN_SPEED_16MBITS = 3,
0094 } flexcop_wan_speed_t;
0095
0096 typedef enum {
0097 FC_DMA_1 = 1,
0098 FC_DMA_2 = 2,
0099 } flexcop_dma_index_t;
0100
0101 typedef enum {
0102 FC_DMA_SUBADDR_0 = 1,
0103 FC_DMA_SUBADDR_1 = 2,
0104 } flexcop_dma_addr_index_t;
0105
0106
0107 typedef enum {
0108 dma1_000 = 0x000,
0109 dma1_004 = 0x004,
0110 dma1_008 = 0x008,
0111 dma1_00c = 0x00c,
0112 dma2_010 = 0x010,
0113 dma2_014 = 0x014,
0114 dma2_018 = 0x018,
0115 dma2_01c = 0x01c,
0116
0117 tw_sm_c_100 = 0x100,
0118 tw_sm_c_104 = 0x104,
0119 tw_sm_c_108 = 0x108,
0120 tw_sm_c_10c = 0x10c,
0121 tw_sm_c_110 = 0x110,
0122
0123 lnb_switch_freq_200 = 0x200,
0124 misc_204 = 0x204,
0125 ctrl_208 = 0x208,
0126 irq_20c = 0x20c,
0127 sw_reset_210 = 0x210,
0128 misc_214 = 0x214,
0129 mbox_v8_to_host_218 = 0x218,
0130 mbox_host_to_v8_21c = 0x21c,
0131
0132 pid_filter_300 = 0x300,
0133 pid_filter_304 = 0x304,
0134 pid_filter_308 = 0x308,
0135 pid_filter_30c = 0x30c,
0136 index_reg_310 = 0x310,
0137 pid_n_reg_314 = 0x314,
0138 mac_low_reg_318 = 0x318,
0139 mac_high_reg_31c = 0x31c,
0140
0141 data_tag_400 = 0x400,
0142 card_id_408 = 0x408,
0143 card_id_40c = 0x40c,
0144 mac_address_418 = 0x418,
0145 mac_address_41c = 0x41c,
0146
0147 ci_600 = 0x600,
0148 pi_604 = 0x604,
0149 pi_608 = 0x608,
0150 dvb_reg_60c = 0x60c,
0151
0152 sram_ctrl_reg_700 = 0x700,
0153 net_buf_reg_704 = 0x704,
0154 cai_buf_reg_708 = 0x708,
0155 cao_buf_reg_70c = 0x70c,
0156 media_buf_reg_710 = 0x710,
0157 sram_dest_reg_714 = 0x714,
0158 net_buf_reg_718 = 0x718,
0159 wan_ctrl_reg_71c = 0x71c,
0160 } flexcop_ibi_register;
0161
0162 #define flexcop_set_ibi_value(reg,attr,val) { \
0163 flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \
0164 v.reg.attr = val; \
0165 fc->write_ibi_reg(fc,reg,v); \
0166 }
0167
0168 #endif