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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
0004  */
0005 
0006 #include <linux/delay.h>
0007 #include <linux/slab.h>
0008 #include <linux/sched/types.h>
0009 
0010 #include <media/cec-pin.h>
0011 #include "cec-pin-priv.h"
0012 
0013 /* All timings are in microseconds */
0014 
0015 /* start bit timings */
0016 #define CEC_TIM_START_BIT_LOW       3700
0017 #define CEC_TIM_START_BIT_LOW_MIN   3500
0018 #define CEC_TIM_START_BIT_LOW_MAX   3900
0019 #define CEC_TIM_START_BIT_TOTAL     4500
0020 #define CEC_TIM_START_BIT_TOTAL_MIN 4300
0021 #define CEC_TIM_START_BIT_TOTAL_MAX 4700
0022 
0023 /* data bit timings */
0024 #define CEC_TIM_DATA_BIT_0_LOW      1500
0025 #define CEC_TIM_DATA_BIT_0_LOW_MIN  1300
0026 #define CEC_TIM_DATA_BIT_0_LOW_MAX  1700
0027 #define CEC_TIM_DATA_BIT_1_LOW      600
0028 #define CEC_TIM_DATA_BIT_1_LOW_MIN  400
0029 #define CEC_TIM_DATA_BIT_1_LOW_MAX  800
0030 #define CEC_TIM_DATA_BIT_TOTAL      2400
0031 #define CEC_TIM_DATA_BIT_TOTAL_MIN  2050
0032 #define CEC_TIM_DATA_BIT_TOTAL_MAX  2750
0033 /* earliest safe time to sample the bit state */
0034 #define CEC_TIM_DATA_BIT_SAMPLE     850
0035 /* earliest time the bit is back to 1 (T7 + 50) */
0036 #define CEC_TIM_DATA_BIT_HIGH       1750
0037 
0038 /* when idle, sample once per millisecond */
0039 #define CEC_TIM_IDLE_SAMPLE     1000
0040 /* when processing the start bit, sample twice per millisecond */
0041 #define CEC_TIM_START_BIT_SAMPLE    500
0042 /* when polling for a state change, sample once every 50 microseconds */
0043 #define CEC_TIM_SAMPLE          50
0044 
0045 #define CEC_TIM_LOW_DRIVE_ERROR     (1.5 * CEC_TIM_DATA_BIT_TOTAL)
0046 
0047 /*
0048  * Total data bit time that is too short/long for a valid bit,
0049  * used for error injection.
0050  */
0051 #define CEC_TIM_DATA_BIT_TOTAL_SHORT    1800
0052 #define CEC_TIM_DATA_BIT_TOTAL_LONG 2900
0053 
0054 /*
0055  * Total start bit time that is too short/long for a valid bit,
0056  * used for error injection.
0057  */
0058 #define CEC_TIM_START_BIT_TOTAL_SHORT   4100
0059 #define CEC_TIM_START_BIT_TOTAL_LONG    5000
0060 
0061 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */
0062 #define EOM_BIT             8
0063 #define ACK_BIT             9
0064 
0065 struct cec_state {
0066     const char * const name;
0067     unsigned int usecs;
0068 };
0069 
0070 static const struct cec_state states[CEC_PIN_STATES] = {
0071     { "Off",           0 },
0072     { "Idle",          CEC_TIM_IDLE_SAMPLE },
0073     { "Tx Wait",           CEC_TIM_SAMPLE },
0074     { "Tx Wait for High",      CEC_TIM_IDLE_SAMPLE },
0075     { "Tx Start Bit Low",      CEC_TIM_START_BIT_LOW },
0076     { "Tx Start Bit High",     CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
0077     { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
0078     { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
0079     { "Tx Start Bit Low Custom", 0 },
0080     { "Tx Start Bit High Custom", 0 },
0081     { "Tx Data 0 Low",     CEC_TIM_DATA_BIT_0_LOW },
0082     { "Tx Data 0 High",    CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
0083     { "Tx Data 0 High Short",  CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_0_LOW },
0084     { "Tx Data 0 High Long",   CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_0_LOW },
0085     { "Tx Data 1 Low",     CEC_TIM_DATA_BIT_1_LOW },
0086     { "Tx Data 1 High",    CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
0087     { "Tx Data 1 High Short",  CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_1_LOW },
0088     { "Tx Data 1 High Long",   CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_1_LOW },
0089     { "Tx Data 1 High Pre Sample", CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
0090     { "Tx Data 1 High Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
0091     { "Tx Data 1 High Post Sample Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_SAMPLE },
0092     { "Tx Data 1 High Post Sample Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_SAMPLE },
0093     { "Tx Data Bit Low Custom", 0 },
0094     { "Tx Data Bit High Custom", 0 },
0095     { "Tx Pulse Low Custom",   0 },
0096     { "Tx Pulse High Custom",  0 },
0097     { "Tx Low Drive",      CEC_TIM_LOW_DRIVE_ERROR },
0098     { "Rx Start Bit Low",      CEC_TIM_SAMPLE },
0099     { "Rx Start Bit High",     CEC_TIM_SAMPLE },
0100     { "Rx Data Sample",    CEC_TIM_DATA_BIT_SAMPLE },
0101     { "Rx Data Post Sample",   CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
0102     { "Rx Data Wait for Low",  CEC_TIM_SAMPLE },
0103     { "Rx Ack Low",        CEC_TIM_DATA_BIT_0_LOW },
0104     { "Rx Ack Low Post",       CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
0105     { "Rx Ack High Post",      CEC_TIM_DATA_BIT_HIGH },
0106     { "Rx Ack Finish",     CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
0107     { "Rx Low Drive",      CEC_TIM_LOW_DRIVE_ERROR },
0108     { "Rx Irq",        0 },
0109 };
0110 
0111 static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
0112 {
0113     if (!force && v == pin->adap->cec_pin_is_high)
0114         return;
0115 
0116     pin->adap->cec_pin_is_high = v;
0117     if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) {
0118         u8 ev = v;
0119 
0120         if (pin->work_pin_events_dropped) {
0121             pin->work_pin_events_dropped = false;
0122             ev |= CEC_PIN_EVENT_FL_DROPPED;
0123         }
0124         pin->work_pin_events[pin->work_pin_events_wr] = ev;
0125         pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
0126         pin->work_pin_events_wr =
0127             (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
0128         atomic_inc(&pin->work_pin_num_events);
0129     } else {
0130         pin->work_pin_events_dropped = true;
0131         pin->work_pin_events_dropped_cnt++;
0132     }
0133     wake_up_interruptible(&pin->kthread_waitq);
0134 }
0135 
0136 static bool cec_pin_read(struct cec_pin *pin)
0137 {
0138     bool v = call_pin_op(pin, read);
0139 
0140     cec_pin_update(pin, v, false);
0141     return v;
0142 }
0143 
0144 static void cec_pin_low(struct cec_pin *pin)
0145 {
0146     call_void_pin_op(pin, low);
0147     cec_pin_update(pin, false, false);
0148 }
0149 
0150 static bool cec_pin_high(struct cec_pin *pin)
0151 {
0152     call_void_pin_op(pin, high);
0153     return cec_pin_read(pin);
0154 }
0155 
0156 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
0157              int arg_idx, u8 *arg)
0158 {
0159 #ifdef CONFIG_CEC_PIN_ERROR_INJ
0160     u16 cmd = cec_pin_rx_error_inj(pin);
0161     u64 e = pin->error_inj[cmd];
0162     unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
0163 
0164     if (arg_idx >= 0) {
0165         u8 pos = pin->error_inj_args[cmd][arg_idx];
0166 
0167         if (arg)
0168             *arg = pos;
0169         else if (pos != pin->rx_bit)
0170             return false;
0171     }
0172 
0173     switch (mode) {
0174     case CEC_ERROR_INJ_MODE_ONCE:
0175         pin->error_inj[cmd] &=
0176             ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
0177         return true;
0178     case CEC_ERROR_INJ_MODE_ALWAYS:
0179         return true;
0180     case CEC_ERROR_INJ_MODE_TOGGLE:
0181         return pin->rx_toggle;
0182     default:
0183         return false;
0184     }
0185 #else
0186     return false;
0187 #endif
0188 }
0189 
0190 static bool rx_nack(struct cec_pin *pin)
0191 {
0192     return rx_error_inj(pin, CEC_ERROR_INJ_RX_NACK_OFFSET, -1, NULL);
0193 }
0194 
0195 static bool rx_low_drive(struct cec_pin *pin)
0196 {
0197     return rx_error_inj(pin, CEC_ERROR_INJ_RX_LOW_DRIVE_OFFSET,
0198                 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, NULL);
0199 }
0200 
0201 static bool rx_add_byte(struct cec_pin *pin)
0202 {
0203     return rx_error_inj(pin, CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, NULL);
0204 }
0205 
0206 static bool rx_remove_byte(struct cec_pin *pin)
0207 {
0208     return rx_error_inj(pin, CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, NULL);
0209 }
0210 
0211 static bool rx_arb_lost(struct cec_pin *pin, u8 *poll)
0212 {
0213     return pin->tx_msg.len == 0 &&
0214         rx_error_inj(pin, CEC_ERROR_INJ_RX_ARB_LOST_OFFSET,
0215                  CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, poll);
0216 }
0217 
0218 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
0219              int arg_idx, u8 *arg)
0220 {
0221 #ifdef CONFIG_CEC_PIN_ERROR_INJ
0222     u16 cmd = cec_pin_tx_error_inj(pin);
0223     u64 e = pin->error_inj[cmd];
0224     unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
0225 
0226     if (arg_idx >= 0) {
0227         u8 pos = pin->error_inj_args[cmd][arg_idx];
0228 
0229         if (arg)
0230             *arg = pos;
0231         else if (pos != pin->tx_bit)
0232             return false;
0233     }
0234 
0235     switch (mode) {
0236     case CEC_ERROR_INJ_MODE_ONCE:
0237         pin->error_inj[cmd] &=
0238             ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
0239         return true;
0240     case CEC_ERROR_INJ_MODE_ALWAYS:
0241         return true;
0242     case CEC_ERROR_INJ_MODE_TOGGLE:
0243         return pin->tx_toggle;
0244     default:
0245         return false;
0246     }
0247 #else
0248     return false;
0249 #endif
0250 }
0251 
0252 static bool tx_no_eom(struct cec_pin *pin)
0253 {
0254     return tx_error_inj(pin, CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, NULL);
0255 }
0256 
0257 static bool tx_early_eom(struct cec_pin *pin)
0258 {
0259     return tx_error_inj(pin, CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, NULL);
0260 }
0261 
0262 static bool tx_short_bit(struct cec_pin *pin)
0263 {
0264     return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET,
0265                 CEC_ERROR_INJ_TX_SHORT_BIT_ARG_IDX, NULL);
0266 }
0267 
0268 static bool tx_long_bit(struct cec_pin *pin)
0269 {
0270     return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_BIT_OFFSET,
0271                 CEC_ERROR_INJ_TX_LONG_BIT_ARG_IDX, NULL);
0272 }
0273 
0274 static bool tx_custom_bit(struct cec_pin *pin)
0275 {
0276     return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET,
0277                 CEC_ERROR_INJ_TX_CUSTOM_BIT_ARG_IDX, NULL);
0278 }
0279 
0280 static bool tx_short_start(struct cec_pin *pin)
0281 {
0282     return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_START_OFFSET, -1, NULL);
0283 }
0284 
0285 static bool tx_long_start(struct cec_pin *pin)
0286 {
0287     return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_START_OFFSET, -1, NULL);
0288 }
0289 
0290 static bool tx_custom_start(struct cec_pin *pin)
0291 {
0292     return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_START_OFFSET,
0293                 -1, NULL);
0294 }
0295 
0296 static bool tx_last_bit(struct cec_pin *pin)
0297 {
0298     return tx_error_inj(pin, CEC_ERROR_INJ_TX_LAST_BIT_OFFSET,
0299                 CEC_ERROR_INJ_TX_LAST_BIT_ARG_IDX, NULL);
0300 }
0301 
0302 static u8 tx_add_bytes(struct cec_pin *pin)
0303 {
0304     u8 bytes;
0305 
0306     if (tx_error_inj(pin, CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET,
0307              CEC_ERROR_INJ_TX_ADD_BYTES_ARG_IDX, &bytes))
0308         return bytes;
0309     return 0;
0310 }
0311 
0312 static bool tx_remove_byte(struct cec_pin *pin)
0313 {
0314     return tx_error_inj(pin, CEC_ERROR_INJ_TX_REMOVE_BYTE_OFFSET, -1, NULL);
0315 }
0316 
0317 static bool tx_low_drive(struct cec_pin *pin)
0318 {
0319     return tx_error_inj(pin, CEC_ERROR_INJ_TX_LOW_DRIVE_OFFSET,
0320                 CEC_ERROR_INJ_TX_LOW_DRIVE_ARG_IDX, NULL);
0321 }
0322 
0323 static void cec_pin_to_idle(struct cec_pin *pin)
0324 {
0325     /*
0326      * Reset all status fields, release the bus and
0327      * go to idle state.
0328      */
0329     pin->rx_bit = pin->tx_bit = 0;
0330     pin->rx_msg.len = 0;
0331     memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
0332     pin->ts = ns_to_ktime(0);
0333     pin->tx_generated_poll = false;
0334     pin->tx_post_eom = false;
0335     if (pin->state >= CEC_ST_TX_WAIT &&
0336         pin->state <= CEC_ST_TX_LOW_DRIVE)
0337         pin->tx_toggle ^= 1;
0338     if (pin->state >= CEC_ST_RX_START_BIT_LOW &&
0339         pin->state <= CEC_ST_RX_LOW_DRIVE)
0340         pin->rx_toggle ^= 1;
0341     pin->state = CEC_ST_IDLE;
0342 }
0343 
0344 /*
0345  * Handle Transmit-related states
0346  *
0347  * Basic state changes when transmitting:
0348  *
0349  * Idle -> Tx Wait (waiting for the end of signal free time) ->
0350  *  Tx Start Bit Low -> Tx Start Bit High ->
0351  *
0352  *   Regular data bits + EOM:
0353  *  Tx Data 0 Low -> Tx Data 0 High ->
0354  *   or:
0355  *  Tx Data 1 Low -> Tx Data 1 High ->
0356  *
0357  *   First 4 data bits or Ack bit:
0358  *  Tx Data 0 Low -> Tx Data 0 High ->
0359  *   or:
0360  *  Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
0361  *      Tx Data 1 Post Sample ->
0362  *
0363  *   After the last Ack go to Idle.
0364  *
0365  * If it detects a Low Drive condition then:
0366  *  Tx Wait For High -> Idle
0367  *
0368  * If it loses arbitration, then it switches to state Rx Data Post Sample.
0369  */
0370 static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
0371 {
0372     bool v;
0373     bool is_ack_bit, ack;
0374 
0375     switch (pin->state) {
0376     case CEC_ST_TX_WAIT_FOR_HIGH:
0377         if (cec_pin_read(pin))
0378             cec_pin_to_idle(pin);
0379         break;
0380 
0381     case CEC_ST_TX_START_BIT_LOW:
0382         if (tx_short_start(pin)) {
0383             /*
0384              * Error Injection: send an invalid (too short)
0385              * start pulse.
0386              */
0387             pin->state = CEC_ST_TX_START_BIT_HIGH_SHORT;
0388         } else if (tx_long_start(pin)) {
0389             /*
0390              * Error Injection: send an invalid (too long)
0391              * start pulse.
0392              */
0393             pin->state = CEC_ST_TX_START_BIT_HIGH_LONG;
0394         } else {
0395             pin->state = CEC_ST_TX_START_BIT_HIGH;
0396         }
0397         /* Generate start bit */
0398         cec_pin_high(pin);
0399         break;
0400 
0401     case CEC_ST_TX_START_BIT_LOW_CUSTOM:
0402         pin->state = CEC_ST_TX_START_BIT_HIGH_CUSTOM;
0403         /* Generate start bit */
0404         cec_pin_high(pin);
0405         break;
0406 
0407     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
0408     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
0409     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
0410         if (pin->tx_nacked) {
0411             cec_pin_to_idle(pin);
0412             pin->tx_msg.len = 0;
0413             if (pin->tx_generated_poll)
0414                 break;
0415             pin->work_tx_ts = ts;
0416             pin->work_tx_status = CEC_TX_STATUS_NACK;
0417             wake_up_interruptible(&pin->kthread_waitq);
0418             break;
0419         }
0420         fallthrough;
0421     case CEC_ST_TX_DATA_BIT_0_HIGH:
0422     case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
0423     case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
0424     case CEC_ST_TX_DATA_BIT_1_HIGH:
0425     case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
0426     case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
0427         /*
0428          * If the read value is 1, then all is OK, otherwise we have a
0429          * low drive condition.
0430          *
0431          * Special case: when we generate a poll message due to an
0432          * Arbitration Lost error injection, then ignore this since
0433          * the pin can actually be low in that case.
0434          */
0435         if (!cec_pin_read(pin) && !pin->tx_generated_poll) {
0436             /*
0437              * It's 0, so someone detected an error and pulled the
0438              * line low for 1.5 times the nominal bit period.
0439              */
0440             pin->tx_msg.len = 0;
0441             pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
0442             pin->work_tx_ts = ts;
0443             pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
0444             pin->tx_low_drive_cnt++;
0445             wake_up_interruptible(&pin->kthread_waitq);
0446             break;
0447         }
0448         fallthrough;
0449     case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
0450         if (tx_last_bit(pin)) {
0451             /* Error Injection: just stop sending after this bit */
0452             cec_pin_to_idle(pin);
0453             pin->tx_msg.len = 0;
0454             if (pin->tx_generated_poll)
0455                 break;
0456             pin->work_tx_ts = ts;
0457             pin->work_tx_status = CEC_TX_STATUS_OK;
0458             wake_up_interruptible(&pin->kthread_waitq);
0459             break;
0460         }
0461         pin->tx_bit++;
0462         fallthrough;
0463     case CEC_ST_TX_START_BIT_HIGH:
0464     case CEC_ST_TX_START_BIT_HIGH_SHORT:
0465     case CEC_ST_TX_START_BIT_HIGH_LONG:
0466     case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
0467         if (tx_low_drive(pin)) {
0468             /* Error injection: go to low drive */
0469             cec_pin_low(pin);
0470             pin->state = CEC_ST_TX_LOW_DRIVE;
0471             pin->tx_msg.len = 0;
0472             if (pin->tx_generated_poll)
0473                 break;
0474             pin->work_tx_ts = ts;
0475             pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
0476             pin->tx_low_drive_cnt++;
0477             wake_up_interruptible(&pin->kthread_waitq);
0478             break;
0479         }
0480         if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) {
0481             cec_pin_to_idle(pin);
0482             pin->tx_msg.len = 0;
0483             if (pin->tx_generated_poll)
0484                 break;
0485             pin->work_tx_ts = ts;
0486             pin->work_tx_status = CEC_TX_STATUS_OK;
0487             wake_up_interruptible(&pin->kthread_waitq);
0488             break;
0489         }
0490 
0491         switch (pin->tx_bit % 10) {
0492         default: {
0493             /*
0494              * In the CEC_ERROR_INJ_TX_ADD_BYTES case we transmit
0495              * extra bytes, so pin->tx_bit / 10 can become >= 16.
0496              * Generate bit values for those extra bytes instead
0497              * of reading them from the transmit buffer.
0498              */
0499             unsigned int idx = (pin->tx_bit / 10);
0500             u8 val = idx;
0501 
0502             if (idx < pin->tx_msg.len)
0503                 val = pin->tx_msg.msg[idx];
0504             v = val & (1 << (7 - (pin->tx_bit % 10)));
0505 
0506             pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
0507                      CEC_ST_TX_DATA_BIT_0_LOW;
0508             break;
0509         }
0510         case EOM_BIT: {
0511             unsigned int tot_len = pin->tx_msg.len +
0512                            pin->tx_extra_bytes;
0513             unsigned int tx_byte_idx = pin->tx_bit / 10;
0514 
0515             v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1;
0516             if (tot_len > 1 && tx_byte_idx == tot_len - 2 &&
0517                 tx_early_eom(pin)) {
0518                 /* Error injection: set EOM one byte early */
0519                 v = true;
0520                 pin->tx_post_eom = true;
0521             } else if (v && tx_no_eom(pin)) {
0522                 /* Error injection: no EOM */
0523                 v = false;
0524             }
0525             pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
0526                      CEC_ST_TX_DATA_BIT_0_LOW;
0527             break;
0528         }
0529         case ACK_BIT:
0530             pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
0531             break;
0532         }
0533         if (tx_custom_bit(pin))
0534             pin->state = CEC_ST_TX_DATA_BIT_LOW_CUSTOM;
0535         cec_pin_low(pin);
0536         break;
0537 
0538     case CEC_ST_TX_DATA_BIT_0_LOW:
0539     case CEC_ST_TX_DATA_BIT_1_LOW:
0540         v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
0541         is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
0542         if (v && (pin->tx_bit < 4 || is_ack_bit)) {
0543             pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
0544         } else if (!is_ack_bit && tx_short_bit(pin)) {
0545             /* Error Injection: send an invalid (too short) bit */
0546             pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT :
0547                      CEC_ST_TX_DATA_BIT_0_HIGH_SHORT;
0548         } else if (!is_ack_bit && tx_long_bit(pin)) {
0549             /* Error Injection: send an invalid (too long) bit */
0550             pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG :
0551                      CEC_ST_TX_DATA_BIT_0_HIGH_LONG;
0552         } else {
0553             pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
0554                      CEC_ST_TX_DATA_BIT_0_HIGH;
0555         }
0556         cec_pin_high(pin);
0557         break;
0558 
0559     case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
0560         pin->state = CEC_ST_TX_DATA_BIT_HIGH_CUSTOM;
0561         cec_pin_high(pin);
0562         break;
0563 
0564     case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
0565         /* Read the CEC value at the sample time */
0566         v = cec_pin_read(pin);
0567         is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
0568         /*
0569          * If v == 0 and we're within the first 4 bits
0570          * of the initiator, then someone else started
0571          * transmitting and we lost the arbitration
0572          * (i.e. the logical address of the other
0573          * transmitter has more leading 0 bits in the
0574          * initiator).
0575          */
0576         if (!v && !is_ack_bit && !pin->tx_generated_poll) {
0577             pin->tx_msg.len = 0;
0578             pin->work_tx_ts = ts;
0579             pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
0580             wake_up_interruptible(&pin->kthread_waitq);
0581             pin->rx_bit = pin->tx_bit;
0582             pin->tx_bit = 0;
0583             memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
0584             pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
0585             pin->rx_msg.msg[0] &= (0xff << (8 - pin->rx_bit));
0586             pin->rx_msg.len = 0;
0587             pin->ts = ktime_sub_us(ts, CEC_TIM_DATA_BIT_SAMPLE);
0588             pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
0589             pin->rx_bit++;
0590             break;
0591         }
0592         pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
0593         if (!is_ack_bit && tx_short_bit(pin)) {
0594             /* Error Injection: send an invalid (too short) bit */
0595             pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT;
0596         } else if (!is_ack_bit && tx_long_bit(pin)) {
0597             /* Error Injection: send an invalid (too long) bit */
0598             pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG;
0599         }
0600         if (!is_ack_bit)
0601             break;
0602         /* Was the message ACKed? */
0603         ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
0604         if (!ack && (!pin->tx_ignore_nack_until_eom ||
0605             pin->tx_bit / 10 == pin->tx_msg.len - 1) &&
0606             !pin->tx_post_eom) {
0607             /*
0608              * Note: the CEC spec is ambiguous regarding
0609              * what action to take when a NACK appears
0610              * before the last byte of the payload was
0611              * transmitted: either stop transmitting
0612              * immediately, or wait until the last byte
0613              * was transmitted.
0614              *
0615              * Most CEC implementations appear to stop
0616              * immediately, and that's what we do here
0617              * as well.
0618              */
0619             pin->tx_nacked = true;
0620         }
0621         break;
0622 
0623     case CEC_ST_TX_PULSE_LOW_CUSTOM:
0624         cec_pin_high(pin);
0625         pin->state = CEC_ST_TX_PULSE_HIGH_CUSTOM;
0626         break;
0627 
0628     case CEC_ST_TX_PULSE_HIGH_CUSTOM:
0629         cec_pin_to_idle(pin);
0630         break;
0631 
0632     default:
0633         break;
0634     }
0635 }
0636 
0637 /*
0638  * Handle Receive-related states
0639  *
0640  * Basic state changes when receiving:
0641  *
0642  *  Rx Start Bit Low -> Rx Start Bit High ->
0643  *   Regular data bits + EOM:
0644  *  Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
0645  *   Ack bit 0:
0646  *  Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
0647  *   Ack bit 1:
0648  *  Rx Ack High Post -> Rx Data High ->
0649  *   Ack bit 0 && EOM:
0650  *  Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
0651  */
0652 static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
0653 {
0654     s32 delta;
0655     bool v;
0656     bool ack;
0657     bool bcast, for_us;
0658     u8 dest;
0659     u8 poll;
0660 
0661     switch (pin->state) {
0662     /* Receive states */
0663     case CEC_ST_RX_START_BIT_LOW:
0664         v = cec_pin_read(pin);
0665         if (!v)
0666             break;
0667         pin->state = CEC_ST_RX_START_BIT_HIGH;
0668         delta = ktime_us_delta(ts, pin->ts);
0669         /* Start bit low is too short, go back to idle */
0670         if (delta < CEC_TIM_START_BIT_LOW_MIN - CEC_TIM_IDLE_SAMPLE) {
0671             if (!pin->rx_start_bit_low_too_short_cnt++) {
0672                 pin->rx_start_bit_low_too_short_ts = ktime_to_ns(pin->ts);
0673                 pin->rx_start_bit_low_too_short_delta = delta;
0674             }
0675             cec_pin_to_idle(pin);
0676             break;
0677         }
0678         if (rx_arb_lost(pin, &poll)) {
0679             cec_msg_init(&pin->tx_msg, poll >> 4, poll & 0xf);
0680             pin->tx_generated_poll = true;
0681             pin->tx_extra_bytes = 0;
0682             pin->state = CEC_ST_TX_START_BIT_HIGH;
0683             pin->ts = ts;
0684         }
0685         break;
0686 
0687     case CEC_ST_RX_START_BIT_HIGH:
0688         v = cec_pin_read(pin);
0689         delta = ktime_us_delta(ts, pin->ts);
0690         /*
0691          * Unfortunately the spec does not specify when to give up
0692          * and go to idle. We just pick TOTAL_LONG.
0693          */
0694         if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) {
0695             pin->rx_start_bit_too_long_cnt++;
0696             cec_pin_to_idle(pin);
0697             break;
0698         }
0699         if (v)
0700             break;
0701         /* Start bit is too short, go back to idle */
0702         if (delta < CEC_TIM_START_BIT_TOTAL_MIN - CEC_TIM_IDLE_SAMPLE) {
0703             if (!pin->rx_start_bit_too_short_cnt++) {
0704                 pin->rx_start_bit_too_short_ts = ktime_to_ns(pin->ts);
0705                 pin->rx_start_bit_too_short_delta = delta;
0706             }
0707             cec_pin_to_idle(pin);
0708             break;
0709         }
0710         if (rx_low_drive(pin)) {
0711             /* Error injection: go to low drive */
0712             cec_pin_low(pin);
0713             pin->state = CEC_ST_RX_LOW_DRIVE;
0714             pin->rx_low_drive_cnt++;
0715             break;
0716         }
0717         pin->state = CEC_ST_RX_DATA_SAMPLE;
0718         pin->ts = ts;
0719         pin->rx_eom = false;
0720         break;
0721 
0722     case CEC_ST_RX_DATA_SAMPLE:
0723         v = cec_pin_read(pin);
0724         pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
0725         switch (pin->rx_bit % 10) {
0726         default:
0727             if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
0728                 pin->rx_msg.msg[pin->rx_bit / 10] |=
0729                     v << (7 - (pin->rx_bit % 10));
0730             break;
0731         case EOM_BIT:
0732             pin->rx_eom = v;
0733             pin->rx_msg.len = pin->rx_bit / 10 + 1;
0734             break;
0735         case ACK_BIT:
0736             break;
0737         }
0738         pin->rx_bit++;
0739         break;
0740 
0741     case CEC_ST_RX_DATA_POST_SAMPLE:
0742         pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
0743         break;
0744 
0745     case CEC_ST_RX_DATA_WAIT_FOR_LOW:
0746         v = cec_pin_read(pin);
0747         delta = ktime_us_delta(ts, pin->ts);
0748         /*
0749          * Unfortunately the spec does not specify when to give up
0750          * and go to idle. We just pick TOTAL_LONG.
0751          */
0752         if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) {
0753             pin->rx_data_bit_too_long_cnt++;
0754             cec_pin_to_idle(pin);
0755             break;
0756         }
0757         if (v)
0758             break;
0759 
0760         if (rx_low_drive(pin)) {
0761             /* Error injection: go to low drive */
0762             cec_pin_low(pin);
0763             pin->state = CEC_ST_RX_LOW_DRIVE;
0764             pin->rx_low_drive_cnt++;
0765             break;
0766         }
0767 
0768         /*
0769          * Go to low drive state when the total bit time is
0770          * too short.
0771          */
0772         if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
0773             if (!pin->rx_data_bit_too_short_cnt++) {
0774                 pin->rx_data_bit_too_short_ts = ktime_to_ns(pin->ts);
0775                 pin->rx_data_bit_too_short_delta = delta;
0776             }
0777             cec_pin_low(pin);
0778             pin->state = CEC_ST_RX_LOW_DRIVE;
0779             pin->rx_low_drive_cnt++;
0780             break;
0781         }
0782         pin->ts = ts;
0783         if (pin->rx_bit % 10 != 9) {
0784             pin->state = CEC_ST_RX_DATA_SAMPLE;
0785             break;
0786         }
0787 
0788         dest = cec_msg_destination(&pin->rx_msg);
0789         bcast = dest == CEC_LOG_ADDR_BROADCAST;
0790         /* for_us == broadcast or directed to us */
0791         for_us = bcast || (pin->la_mask & (1 << dest));
0792         /* ACK bit value */
0793         ack = bcast ? 1 : !for_us;
0794 
0795         if (for_us && rx_nack(pin)) {
0796             /* Error injection: toggle the ACK bit */
0797             ack = !ack;
0798         }
0799 
0800         if (ack) {
0801             /* No need to write to the bus, just wait */
0802             pin->state = CEC_ST_RX_ACK_HIGH_POST;
0803             break;
0804         }
0805         cec_pin_low(pin);
0806         pin->state = CEC_ST_RX_ACK_LOW;
0807         break;
0808 
0809     case CEC_ST_RX_ACK_LOW:
0810         cec_pin_high(pin);
0811         pin->state = CEC_ST_RX_ACK_LOW_POST;
0812         break;
0813 
0814     case CEC_ST_RX_ACK_LOW_POST:
0815     case CEC_ST_RX_ACK_HIGH_POST:
0816         v = cec_pin_read(pin);
0817         if (v && pin->rx_eom) {
0818             pin->work_rx_msg = pin->rx_msg;
0819             pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
0820             wake_up_interruptible(&pin->kthread_waitq);
0821             pin->ts = ts;
0822             pin->state = CEC_ST_RX_ACK_FINISH;
0823             break;
0824         }
0825         pin->rx_bit++;
0826         pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
0827         break;
0828 
0829     case CEC_ST_RX_ACK_FINISH:
0830         cec_pin_to_idle(pin);
0831         break;
0832 
0833     default:
0834         break;
0835     }
0836 }
0837 
0838 /*
0839  * Main timer function
0840  *
0841  */
0842 static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
0843 {
0844     struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
0845     struct cec_adapter *adap = pin->adap;
0846     ktime_t ts;
0847     s32 delta;
0848     u32 usecs;
0849 
0850     ts = ktime_get();
0851     if (ktime_to_ns(pin->timer_ts)) {
0852         delta = ktime_us_delta(ts, pin->timer_ts);
0853         pin->timer_cnt++;
0854         if (delta > 100 && pin->state != CEC_ST_IDLE) {
0855             /* Keep track of timer overruns */
0856             pin->timer_sum_overrun += delta;
0857             pin->timer_100us_overruns++;
0858             if (delta > 300)
0859                 pin->timer_300us_overruns++;
0860             if (delta > pin->timer_max_overrun)
0861                 pin->timer_max_overrun = delta;
0862         }
0863     }
0864     if (adap->monitor_pin_cnt)
0865         cec_pin_read(pin);
0866 
0867     if (pin->wait_usecs) {
0868         /*
0869          * If we are monitoring the pin, then we have to
0870          * sample at regular intervals.
0871          */
0872         if (pin->wait_usecs > 150) {
0873             pin->wait_usecs -= 100;
0874             pin->timer_ts = ktime_add_us(ts, 100);
0875             hrtimer_forward_now(timer, ns_to_ktime(100000));
0876             return HRTIMER_RESTART;
0877         }
0878         if (pin->wait_usecs > 100) {
0879             pin->wait_usecs /= 2;
0880             pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
0881             hrtimer_forward_now(timer,
0882                     ns_to_ktime(pin->wait_usecs * 1000));
0883             return HRTIMER_RESTART;
0884         }
0885         pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
0886         hrtimer_forward_now(timer,
0887                     ns_to_ktime(pin->wait_usecs * 1000));
0888         pin->wait_usecs = 0;
0889         return HRTIMER_RESTART;
0890     }
0891 
0892     switch (pin->state) {
0893     /* Transmit states */
0894     case CEC_ST_TX_WAIT_FOR_HIGH:
0895     case CEC_ST_TX_START_BIT_LOW:
0896     case CEC_ST_TX_START_BIT_HIGH:
0897     case CEC_ST_TX_START_BIT_HIGH_SHORT:
0898     case CEC_ST_TX_START_BIT_HIGH_LONG:
0899     case CEC_ST_TX_START_BIT_LOW_CUSTOM:
0900     case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
0901     case CEC_ST_TX_DATA_BIT_0_LOW:
0902     case CEC_ST_TX_DATA_BIT_0_HIGH:
0903     case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
0904     case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
0905     case CEC_ST_TX_DATA_BIT_1_LOW:
0906     case CEC_ST_TX_DATA_BIT_1_HIGH:
0907     case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
0908     case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
0909     case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
0910     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
0911     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
0912     case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
0913     case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
0914     case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
0915     case CEC_ST_TX_PULSE_LOW_CUSTOM:
0916     case CEC_ST_TX_PULSE_HIGH_CUSTOM:
0917         cec_pin_tx_states(pin, ts);
0918         break;
0919 
0920     /* Receive states */
0921     case CEC_ST_RX_START_BIT_LOW:
0922     case CEC_ST_RX_START_BIT_HIGH:
0923     case CEC_ST_RX_DATA_SAMPLE:
0924     case CEC_ST_RX_DATA_POST_SAMPLE:
0925     case CEC_ST_RX_DATA_WAIT_FOR_LOW:
0926     case CEC_ST_RX_ACK_LOW:
0927     case CEC_ST_RX_ACK_LOW_POST:
0928     case CEC_ST_RX_ACK_HIGH_POST:
0929     case CEC_ST_RX_ACK_FINISH:
0930         cec_pin_rx_states(pin, ts);
0931         break;
0932 
0933     case CEC_ST_IDLE:
0934     case CEC_ST_TX_WAIT:
0935         if (!cec_pin_high(pin)) {
0936             /* Start bit, switch to receive state */
0937             pin->ts = ts;
0938             pin->state = CEC_ST_RX_START_BIT_LOW;
0939             /*
0940              * If a transmit is pending, then that transmit should
0941              * use a signal free time of no more than
0942              * CEC_SIGNAL_FREE_TIME_NEW_INITIATOR since it will
0943              * have a new initiator due to the receive that is now
0944              * starting.
0945              */
0946             if (pin->tx_msg.len && pin->tx_signal_free_time >
0947                 CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
0948                 pin->tx_signal_free_time =
0949                     CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
0950             break;
0951         }
0952         if (ktime_to_ns(pin->ts) == 0)
0953             pin->ts = ts;
0954         if (pin->tx_msg.len) {
0955             /*
0956              * Check if the bus has been free for long enough
0957              * so we can kick off the pending transmit.
0958              */
0959             delta = ktime_us_delta(ts, pin->ts);
0960             if (delta / CEC_TIM_DATA_BIT_TOTAL >=
0961                 pin->tx_signal_free_time) {
0962                 pin->tx_nacked = false;
0963                 if (tx_custom_start(pin))
0964                     pin->state = CEC_ST_TX_START_BIT_LOW_CUSTOM;
0965                 else
0966                     pin->state = CEC_ST_TX_START_BIT_LOW;
0967                 /* Generate start bit */
0968                 cec_pin_low(pin);
0969                 break;
0970             }
0971             if (delta / CEC_TIM_DATA_BIT_TOTAL >=
0972                 pin->tx_signal_free_time - 1)
0973                 pin->state = CEC_ST_TX_WAIT;
0974             break;
0975         }
0976         if (pin->tx_custom_pulse && pin->state == CEC_ST_IDLE) {
0977             pin->tx_custom_pulse = false;
0978             /* Generate custom pulse */
0979             cec_pin_low(pin);
0980             pin->state = CEC_ST_TX_PULSE_LOW_CUSTOM;
0981             break;
0982         }
0983         if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
0984             pin->enable_irq_failed || adap->is_configuring ||
0985             adap->is_configured || adap->monitor_all_cnt)
0986             break;
0987         /* Switch to interrupt mode */
0988         atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
0989         pin->state = CEC_ST_RX_IRQ;
0990         wake_up_interruptible(&pin->kthread_waitq);
0991         return HRTIMER_NORESTART;
0992 
0993     case CEC_ST_TX_LOW_DRIVE:
0994     case CEC_ST_RX_LOW_DRIVE:
0995         cec_pin_high(pin);
0996         cec_pin_to_idle(pin);
0997         break;
0998 
0999     default:
1000         break;
1001     }
1002 
1003     switch (pin->state) {
1004     case CEC_ST_TX_START_BIT_LOW_CUSTOM:
1005     case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
1006     case CEC_ST_TX_PULSE_LOW_CUSTOM:
1007         usecs = pin->tx_custom_low_usecs;
1008         break;
1009     case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
1010     case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
1011     case CEC_ST_TX_PULSE_HIGH_CUSTOM:
1012         usecs = pin->tx_custom_high_usecs;
1013         break;
1014     default:
1015         usecs = states[pin->state].usecs;
1016         break;
1017     }
1018 
1019     if (!adap->monitor_pin_cnt || usecs <= 150) {
1020         pin->wait_usecs = 0;
1021         pin->timer_ts = ktime_add_us(ts, usecs);
1022         hrtimer_forward_now(timer,
1023                 ns_to_ktime(usecs * 1000));
1024         return HRTIMER_RESTART;
1025     }
1026     pin->wait_usecs = usecs - 100;
1027     pin->timer_ts = ktime_add_us(ts, 100);
1028     hrtimer_forward_now(timer, ns_to_ktime(100000));
1029     return HRTIMER_RESTART;
1030 }
1031 
1032 static int cec_pin_thread_func(void *_adap)
1033 {
1034     struct cec_adapter *adap = _adap;
1035     struct cec_pin *pin = adap->pin;
1036     bool irq_enabled = false;
1037 
1038     for (;;) {
1039         wait_event_interruptible(pin->kthread_waitq,
1040                      kthread_should_stop() ||
1041                      pin->work_rx_msg.len ||
1042                      pin->work_tx_status ||
1043                      atomic_read(&pin->work_irq_change) ||
1044                      atomic_read(&pin->work_pin_num_events));
1045 
1046         if (kthread_should_stop())
1047             break;
1048 
1049         if (pin->work_rx_msg.len) {
1050             struct cec_msg *msg = &pin->work_rx_msg;
1051 
1052             if (msg->len > 1 && msg->len < CEC_MAX_MSG_SIZE &&
1053                 rx_add_byte(pin)) {
1054                 /* Error injection: add byte to the message */
1055                 msg->msg[msg->len++] = 0x55;
1056             }
1057             if (msg->len > 2 && rx_remove_byte(pin)) {
1058                 /* Error injection: remove byte from message */
1059                 msg->len--;
1060             }
1061             if (msg->len > CEC_MAX_MSG_SIZE)
1062                 msg->len = CEC_MAX_MSG_SIZE;
1063             cec_received_msg_ts(adap, msg,
1064                 ns_to_ktime(pin->work_rx_msg.rx_ts));
1065             msg->len = 0;
1066         }
1067 
1068         if (pin->work_tx_status) {
1069             unsigned int tx_status = pin->work_tx_status;
1070 
1071             pin->work_tx_status = 0;
1072             cec_transmit_attempt_done_ts(adap, tx_status,
1073                              pin->work_tx_ts);
1074         }
1075 
1076         while (atomic_read(&pin->work_pin_num_events)) {
1077             unsigned int idx = pin->work_pin_events_rd;
1078             u8 v = pin->work_pin_events[idx];
1079 
1080             cec_queue_pin_cec_event(adap,
1081                         v & CEC_PIN_EVENT_FL_IS_HIGH,
1082                         v & CEC_PIN_EVENT_FL_DROPPED,
1083                         pin->work_pin_ts[idx]);
1084             pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
1085             atomic_dec(&pin->work_pin_num_events);
1086         }
1087 
1088         switch (atomic_xchg(&pin->work_irq_change,
1089                     CEC_PIN_IRQ_UNCHANGED)) {
1090         case CEC_PIN_IRQ_DISABLE:
1091             if (irq_enabled) {
1092                 call_void_pin_op(pin, disable_irq);
1093                 irq_enabled = false;
1094             }
1095             cec_pin_high(pin);
1096             if (pin->state == CEC_ST_OFF)
1097                 break;
1098             cec_pin_to_idle(pin);
1099             hrtimer_start(&pin->timer, ns_to_ktime(0),
1100                       HRTIMER_MODE_REL);
1101             break;
1102         case CEC_PIN_IRQ_ENABLE:
1103             if (irq_enabled)
1104                 break;
1105             pin->enable_irq_failed = !call_pin_op(pin, enable_irq);
1106             if (pin->enable_irq_failed) {
1107                 cec_pin_to_idle(pin);
1108                 hrtimer_start(&pin->timer, ns_to_ktime(0),
1109                           HRTIMER_MODE_REL);
1110             } else {
1111                 irq_enabled = true;
1112             }
1113             break;
1114         default:
1115             break;
1116         }
1117     }
1118     return 0;
1119 }
1120 
1121 static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
1122 {
1123     struct cec_pin *pin = adap->pin;
1124 
1125     if (enable) {
1126         cec_pin_read(pin);
1127         cec_pin_to_idle(pin);
1128         pin->tx_msg.len = 0;
1129         pin->timer_ts = ns_to_ktime(0);
1130         atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
1131         if (!pin->kthread) {
1132             pin->kthread = kthread_run(cec_pin_thread_func, adap,
1133                            "cec-pin");
1134             if (IS_ERR(pin->kthread)) {
1135                 int err = PTR_ERR(pin->kthread);
1136 
1137                 pr_err("cec-pin: kernel_thread() failed\n");
1138                 pin->kthread = NULL;
1139                 return err;
1140             }
1141         }
1142         hrtimer_start(&pin->timer, ns_to_ktime(0),
1143                   HRTIMER_MODE_REL);
1144     } else if (pin->kthread) {
1145         hrtimer_cancel(&pin->timer);
1146         cec_pin_high(pin);
1147         cec_pin_to_idle(pin);
1148         pin->state = CEC_ST_OFF;
1149         pin->work_tx_status = 0;
1150         atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1151         wake_up_interruptible(&pin->kthread_waitq);
1152     }
1153     return 0;
1154 }
1155 
1156 static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
1157 {
1158     struct cec_pin *pin = adap->pin;
1159 
1160     if (log_addr == CEC_LOG_ADDR_INVALID)
1161         pin->la_mask = 0;
1162     else
1163         pin->la_mask |= (1 << log_addr);
1164     return 0;
1165 }
1166 
1167 void cec_pin_start_timer(struct cec_pin *pin)
1168 {
1169     if (pin->state != CEC_ST_RX_IRQ)
1170         return;
1171 
1172     atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1173     wake_up_interruptible(&pin->kthread_waitq);
1174 }
1175 
1176 static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
1177                       u32 signal_free_time, struct cec_msg *msg)
1178 {
1179     struct cec_pin *pin = adap->pin;
1180 
1181     /*
1182      * If a receive is in progress, then this transmit should use
1183      * a signal free time of max CEC_SIGNAL_FREE_TIME_NEW_INITIATOR
1184      * since when it starts transmitting it will have a new initiator.
1185      */
1186     if (pin->state != CEC_ST_IDLE &&
1187         signal_free_time > CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
1188         signal_free_time = CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
1189 
1190     pin->tx_signal_free_time = signal_free_time;
1191     pin->tx_extra_bytes = 0;
1192     pin->tx_msg = *msg;
1193     if (msg->len > 1) {
1194         /* Error injection: add byte to the message */
1195         pin->tx_extra_bytes = tx_add_bytes(pin);
1196     }
1197     if (msg->len > 2 && tx_remove_byte(pin)) {
1198         /* Error injection: remove byte from the message */
1199         pin->tx_msg.len--;
1200     }
1201     pin->work_tx_status = 0;
1202     pin->tx_bit = 0;
1203     cec_pin_start_timer(pin);
1204     return 0;
1205 }
1206 
1207 static void cec_pin_adap_status(struct cec_adapter *adap,
1208                        struct seq_file *file)
1209 {
1210     struct cec_pin *pin = adap->pin;
1211 
1212     seq_printf(file, "state: %s\n", states[pin->state].name);
1213     seq_printf(file, "tx_bit: %d\n", pin->tx_bit);
1214     seq_printf(file, "rx_bit: %d\n", pin->rx_bit);
1215     seq_printf(file, "cec pin: %d\n", call_pin_op(pin, read));
1216     seq_printf(file, "cec pin events dropped: %u\n",
1217            pin->work_pin_events_dropped_cnt);
1218     seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
1219     if (pin->timer_100us_overruns) {
1220         seq_printf(file, "timer overruns > 100us: %u of %u\n",
1221                pin->timer_100us_overruns, pin->timer_cnt);
1222         seq_printf(file, "timer overruns > 300us: %u of %u\n",
1223                pin->timer_300us_overruns, pin->timer_cnt);
1224         seq_printf(file, "max timer overrun: %u usecs\n",
1225                pin->timer_max_overrun);
1226         seq_printf(file, "avg timer overrun: %u usecs\n",
1227                pin->timer_sum_overrun / pin->timer_100us_overruns);
1228     }
1229     if (pin->rx_start_bit_low_too_short_cnt)
1230         seq_printf(file,
1231                "rx start bit low too short: %u (delta %u, ts %llu)\n",
1232                pin->rx_start_bit_low_too_short_cnt,
1233                pin->rx_start_bit_low_too_short_delta,
1234                pin->rx_start_bit_low_too_short_ts);
1235     if (pin->rx_start_bit_too_short_cnt)
1236         seq_printf(file,
1237                "rx start bit too short: %u (delta %u, ts %llu)\n",
1238                pin->rx_start_bit_too_short_cnt,
1239                pin->rx_start_bit_too_short_delta,
1240                pin->rx_start_bit_too_short_ts);
1241     if (pin->rx_start_bit_too_long_cnt)
1242         seq_printf(file, "rx start bit too long: %u\n",
1243                pin->rx_start_bit_too_long_cnt);
1244     if (pin->rx_data_bit_too_short_cnt)
1245         seq_printf(file,
1246                "rx data bit too short: %u (delta %u, ts %llu)\n",
1247                pin->rx_data_bit_too_short_cnt,
1248                pin->rx_data_bit_too_short_delta,
1249                pin->rx_data_bit_too_short_ts);
1250     if (pin->rx_data_bit_too_long_cnt)
1251         seq_printf(file, "rx data bit too long: %u\n",
1252                pin->rx_data_bit_too_long_cnt);
1253     seq_printf(file, "rx initiated low drive: %u\n", pin->rx_low_drive_cnt);
1254     seq_printf(file, "tx detected low drive: %u\n", pin->tx_low_drive_cnt);
1255     pin->work_pin_events_dropped_cnt = 0;
1256     pin->timer_cnt = 0;
1257     pin->timer_100us_overruns = 0;
1258     pin->timer_300us_overruns = 0;
1259     pin->timer_max_overrun = 0;
1260     pin->timer_sum_overrun = 0;
1261     pin->rx_start_bit_low_too_short_cnt = 0;
1262     pin->rx_start_bit_too_short_cnt = 0;
1263     pin->rx_start_bit_too_long_cnt = 0;
1264     pin->rx_data_bit_too_short_cnt = 0;
1265     pin->rx_data_bit_too_long_cnt = 0;
1266     pin->rx_low_drive_cnt = 0;
1267     pin->tx_low_drive_cnt = 0;
1268     call_void_pin_op(pin, status, file);
1269 }
1270 
1271 static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
1272                           bool enable)
1273 {
1274     struct cec_pin *pin = adap->pin;
1275 
1276     pin->monitor_all = enable;
1277     return 0;
1278 }
1279 
1280 static void cec_pin_adap_free(struct cec_adapter *adap)
1281 {
1282     struct cec_pin *pin = adap->pin;
1283 
1284     if (pin->kthread)
1285         kthread_stop(pin->kthread);
1286     pin->kthread = NULL;
1287     if (pin->ops->free)
1288         pin->ops->free(adap);
1289     adap->pin = NULL;
1290     kfree(pin);
1291 }
1292 
1293 static int cec_pin_received(struct cec_adapter *adap, struct cec_msg *msg)
1294 {
1295     struct cec_pin *pin = adap->pin;
1296 
1297     if (pin->ops->received && !adap->devnode.unregistered)
1298         return pin->ops->received(adap, msg);
1299     return -ENOMSG;
1300 }
1301 
1302 void cec_pin_changed(struct cec_adapter *adap, bool value)
1303 {
1304     struct cec_pin *pin = adap->pin;
1305 
1306     cec_pin_update(pin, value, false);
1307     if (!value && (adap->is_configuring || adap->is_configured ||
1308                adap->monitor_all_cnt))
1309         atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1310 }
1311 EXPORT_SYMBOL_GPL(cec_pin_changed);
1312 
1313 static const struct cec_adap_ops cec_pin_adap_ops = {
1314     .adap_enable = cec_pin_adap_enable,
1315     .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
1316     .adap_log_addr = cec_pin_adap_log_addr,
1317     .adap_transmit = cec_pin_adap_transmit,
1318     .adap_status = cec_pin_adap_status,
1319     .adap_free = cec_pin_adap_free,
1320 #ifdef CONFIG_CEC_PIN_ERROR_INJ
1321     .error_inj_parse_line = cec_pin_error_inj_parse_line,
1322     .error_inj_show = cec_pin_error_inj_show,
1323 #endif
1324     .received = cec_pin_received,
1325 };
1326 
1327 struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
1328                     void *priv, const char *name, u32 caps)
1329 {
1330     struct cec_adapter *adap;
1331     struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
1332 
1333     if (pin == NULL)
1334         return ERR_PTR(-ENOMEM);
1335     pin->ops = pin_ops;
1336     hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1337     atomic_set(&pin->work_pin_num_events, 0);
1338     pin->timer.function = cec_pin_timer;
1339     init_waitqueue_head(&pin->kthread_waitq);
1340     pin->tx_custom_low_usecs = CEC_TIM_CUSTOM_DEFAULT;
1341     pin->tx_custom_high_usecs = CEC_TIM_CUSTOM_DEFAULT;
1342 
1343     adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
1344                 caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
1345                 CEC_MAX_LOG_ADDRS);
1346 
1347     if (IS_ERR(adap)) {
1348         kfree(pin);
1349         return adap;
1350     }
1351 
1352     adap->pin = pin;
1353     pin->adap = adap;
1354     cec_pin_update(pin, cec_pin_high(pin), true);
1355     return adap;
1356 }
1357 EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);
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