drivers/mailbox/mtk-adsp-mailbox.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2022 MediaTek Corporation. All rights reserved.
0004  * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
0005  */
0006
0007 #include <linux/interrupt.h>
0008 #include <linux/io.h>
0009 #include <linux/iopoll.h>
0010 #include <linux/kernel.h>
0011 #include <linux/mailbox_controller.h>
0012 #include <linux/module.h>
0013 #include <linux/of_device.h>
0014 #include <linux/slab.h>
0015
0016 struct mtk_adsp_mbox_priv {
0017     struct device *dev;
0018     struct mbox_controller mbox;
0019     void __iomem *va_mboxreg;
0020     const struct mtk_adsp_mbox_cfg *cfg;
0021 };
0022
0023 struct mtk_adsp_mbox_cfg {
0024     u32 set_in;
0025     u32 set_out;
0026     u32 clr_in;
0027     u32 clr_out;
0028 };
0029
0030 static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox)
0031 {
0032     return container_of(mbox, struct mtk_adsp_mbox_priv, mbox);
0033 }
0034
0035 static irqreturn_t mtk_adsp_mbox_irq(int irq, void *data)
0036 {
0037     struct mbox_chan *chan = data;
0038     struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
0039     u32 op = readl(priv->va_mboxreg + priv->cfg->set_out);
0040
0041     writel(op, priv->va_mboxreg + priv->cfg->clr_out);
0042
0043     return IRQ_WAKE_THREAD;
0044 }
0045
0046 static irqreturn_t mtk_adsp_mbox_isr(int irq, void *data)
0047 {
0048     struct mbox_chan *chan = data;
0049
0050     mbox_chan_received_data(chan, NULL);
0051
0052     return IRQ_HANDLED;
0053 }
0054
0055 static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox,
0056                          const struct of_phandle_args *sp)
0057 {
0058     return mbox->chans;
0059 }
0060
0061 static int mtk_adsp_mbox_startup(struct mbox_chan *chan)
0062 {
0063     struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
0064
0065     /* Clear ADSP mbox command */
0066     writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
0067     writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
0068
0069     return 0;
0070 }
0071
0072 static void mtk_adsp_mbox_shutdown(struct mbox_chan *chan)
0073 {
0074     struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
0075
0076     /* Clear ADSP mbox command */
0077     writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
0078     writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
0079 }
0080
0081 static int mtk_adsp_mbox_send_data(struct mbox_chan *chan, void *data)
0082 {
0083     struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
0084     u32 *msg = data;
0085
0086     writel(*msg, priv->va_mboxreg + priv->cfg->set_in);
0087
0088     return 0;
0089 }
0090
0091 static bool mtk_adsp_mbox_last_tx_done(struct mbox_chan *chan)
0092 {
0093     struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
0094
0095     return readl(priv->va_mboxreg + priv->cfg->set_in) == 0;
0096 }
0097
0098 static const struct mbox_chan_ops mtk_adsp_mbox_chan_ops = {
0099     .send_data  = mtk_adsp_mbox_send_data,
0100     .startup    = mtk_adsp_mbox_startup,
0101     .shutdown   = mtk_adsp_mbox_shutdown,
0102     .last_tx_done   = mtk_adsp_mbox_last_tx_done,
0103 };
0104
0105 static int mtk_adsp_mbox_probe(struct platform_device *pdev)
0106 {
0107     struct device *dev = &pdev->dev;
0108     struct mtk_adsp_mbox_priv *priv;
0109     const struct mtk_adsp_mbox_cfg *cfg;
0110     struct mbox_controller *mbox;
0111     int ret, irq;
0112
0113     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0114     if (!priv)
0115         return -ENOMEM;
0116
0117     mbox = &priv->mbox;
0118     mbox->dev = dev;
0119     mbox->ops = &mtk_adsp_mbox_chan_ops;
0120     mbox->txdone_irq = false;
0121     mbox->txdone_poll = true;
0122     mbox->of_xlate = mtk_adsp_mbox_xlate;
0123     mbox->num_chans = 1;
0124     mbox->chans = devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL);
0125     if (!mbox->chans)
0126         return -ENOMEM;
0127
0128     priv->va_mboxreg = devm_platform_ioremap_resource(pdev, 0);
0129     if (IS_ERR(priv->va_mboxreg))
0130         return PTR_ERR(priv->va_mboxreg);
0131
0132     cfg = of_device_get_match_data(dev);
0133     if (!cfg)
0134         return -EINVAL;
0135     priv->cfg = cfg;
0136
0137     irq = platform_get_irq(pdev, 0);
0138     if (irq < 0)
0139         return irq;
0140
0141     ret = devm_request_threaded_irq(dev, irq, mtk_adsp_mbox_irq,
0142                     mtk_adsp_mbox_isr, IRQF_TRIGGER_NONE,
0143                     dev_name(dev), mbox->chans);
0144     if (ret < 0)
0145         return ret;
0146
0147     platform_set_drvdata(pdev, priv);
0148
0149     return devm_mbox_controller_register(dev, &priv->mbox);
0150 }
0151
0152 static const struct mtk_adsp_mbox_cfg mt8186_adsp_mbox_cfg = {
0153     .set_in     = 0x00,
0154     .set_out    = 0x04,
0155     .clr_in     = 0x08,
0156     .clr_out    = 0x0C,
0157 };
0158
0159 static const struct mtk_adsp_mbox_cfg mt8195_adsp_mbox_cfg = {
0160     .set_in     = 0x00,
0161     .set_out    = 0x1c,
0162     .clr_in     = 0x04,
0163     .clr_out    = 0x20,
0164 };
0165
0166 static const struct of_device_id mtk_adsp_mbox_of_match[] = {
0167     { .compatible = "mediatek,mt8186-adsp-mbox", .data = &mt8186_adsp_mbox_cfg },
0168     { .compatible = "mediatek,mt8195-adsp-mbox", .data = &mt8195_adsp_mbox_cfg },
0169     {},
0170 };
0171 MODULE_DEVICE_TABLE(of, mtk_adsp_mbox_of_match);
0172
0173 static struct platform_driver mtk_adsp_mbox_driver = {
0174     .probe      = mtk_adsp_mbox_probe,
0175     .driver = {
0176         .name   = "mtk_adsp_mbox",
0177         .of_match_table = mtk_adsp_mbox_of_match,
0178     },
0179 };
0180 module_platform_driver(mtk_adsp_mbox_driver);
0181
0182 MODULE_AUTHOR("Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>");
0183 MODULE_DESCRIPTION("MTK ADSP Mailbox Controller");
0184 MODULE_LICENSE("GPL v2");