drivers/macintosh/via-macii.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device driver for the via ADB on (many) Mac II-class machines
0004  *
0005  * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
0006  * Also derived from code Copyright (C) 1996 Paul Mackerras.
0007  *
0008  * With various updates provided over the years by Michael Schmitz,
0009  * Guideo Koerber and others.
0010  *
0011  * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
0012  *
0013  * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
0014  * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
0015  *            - Big overhaul, should actually work now.
0016  * 2006-12-31 Finn Thain - Another overhaul.
0017  *
0018  * Suggested reading:
0019  *   Inside Macintosh, ch. 5 ADB Manager
0020  *   Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
0021  *   Rockwell R6522 VIA datasheet
0022  *
0023  * Apple's "ADB Analyzer" bus sniffer is invaluable:
0024  *   ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
0025  */
0026 #include <linux/types.h>
0027 #include <linux/errno.h>
0028 #include <linux/kernel.h>
0029 #include <linux/delay.h>
0030 #include <linux/adb.h>
0031 #include <linux/interrupt.h>
0032 #include <linux/init.h>
0033 #include <asm/macintosh.h>
0034 #include <asm/macints.h>
0035 #include <asm/mac_via.h>
0036
0037 static volatile unsigned char *via;
0038
0039 /* VIA registers - spaced 0x200 bytes apart */
0040 #define RS      0x200       /* skip between registers */
0041 #define B       0       /* B-side data */
0042 #define A       RS      /* A-side data */
0043 #define DIRB        (2*RS)      /* B-side direction (1=output) */
0044 #define DIRA        (3*RS)      /* A-side direction (1=output) */
0045 #define T1CL        (4*RS)      /* Timer 1 ctr/latch (low 8 bits) */
0046 #define T1CH        (5*RS)      /* Timer 1 counter (high 8 bits) */
0047 #define T1LL        (6*RS)      /* Timer 1 latch (low 8 bits) */
0048 #define T1LH        (7*RS)      /* Timer 1 latch (high 8 bits) */
0049 #define T2CL        (8*RS)      /* Timer 2 ctr/latch (low 8 bits) */
0050 #define T2CH        (9*RS)      /* Timer 2 counter (high 8 bits) */
0051 #define SR      (10*RS)     /* Shift register */
0052 #define ACR     (11*RS)     /* Auxiliary control register */
0053 #define PCR     (12*RS)     /* Peripheral control register */
0054 #define IFR     (13*RS)     /* Interrupt flag register */
0055 #define IER     (14*RS)     /* Interrupt enable register */
0056 #define ANH     (15*RS)     /* A-side data, no handshake */
0057
0058 /* Bits in B data register: all active low */
0059 #define CTLR_IRQ    0x08        /* Controller rcv status (input) */
0060 #define ST_MASK     0x30        /* mask for selecting ADB state bits */
0061
0062 /* Bits in ACR */
0063 #define SR_CTRL     0x1c        /* Shift register control bits */
0064 #define SR_EXT      0x0c        /* Shift on external clock */
0065 #define SR_OUT      0x10        /* Shift out if 1 */
0066
0067 /* Bits in IFR and IER */
0068 #define IER_SET     0x80        /* set bits in IER */
0069 #define IER_CLR     0       /* clear bits in IER */
0070 #define SR_INT      0x04        /* Shift register full/empty */
0071
0072 /* ADB transaction states according to GMHW */
0073 #define ST_CMD      0x00        /* ADB state: command byte */
0074 #define ST_EVEN     0x10        /* ADB state: even data byte */
0075 #define ST_ODD      0x20        /* ADB state: odd data byte */
0076 #define ST_IDLE     0x30        /* ADB state: idle, nothing to send */
0077
0078 /* ADB command byte structure */
0079 #define ADDR_MASK   0xF0
0080 #define CMD_MASK    0x0F
0081 #define OP_MASK     0x0C
0082 #define TALK        0x0C
0083
0084 static int macii_init_via(void);
0085 static void macii_start(void);
0086 static irqreturn_t macii_interrupt(int irq, void *arg);
0087 static void macii_queue_poll(void);
0088
0089 static int macii_probe(void);
0090 static int macii_init(void);
0091 static int macii_send_request(struct adb_request *req, int sync);
0092 static int macii_write(struct adb_request *req);
0093 static int macii_autopoll(int devs);
0094 static void macii_poll(void);
0095 static int macii_reset_bus(void);
0096
0097 struct adb_driver via_macii_driver = {
0098     .name         = "Mac II",
0099     .probe        = macii_probe,
0100     .init         = macii_init,
0101     .send_request = macii_send_request,
0102     .autopoll     = macii_autopoll,
0103     .poll         = macii_poll,
0104     .reset_bus    = macii_reset_bus,
0105 };
0106
0107 static enum macii_state {
0108     idle,
0109     sending,
0110     reading,
0111 } macii_state;
0112
0113 static struct adb_request *current_req; /* first request struct in the queue */
0114 static struct adb_request *last_req;     /* last request struct in the queue */
0115 static unsigned char reply_buf[16];        /* storage for autopolled replies */
0116 static unsigned char *reply_ptr;     /* next byte in reply_buf or req->reply */
0117 static bool reading_reply;       /* store reply in reply_buf else req->reply */
0118 static int data_index;      /* index of the next byte to send from req->data */
0119 static int reply_len; /* number of bytes received in reply_buf or req->reply */
0120 static int status;          /* VIA's ADB status bits captured upon interrupt */
0121 static bool bus_timeout;                   /* no data was sent by the device */
0122 static bool srq_asserted;    /* have to poll for the device that asserted it */
0123 static u8 last_cmd;              /* the most recent command byte transmitted */
0124 static u8 last_talk_cmd;    /* the most recent Talk command byte transmitted */
0125 static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */
0126 static unsigned int autopoll_devs;  /* bits set are device addresses to poll */
0127
0128 /* Check for MacII style ADB */
0129 static int macii_probe(void)
0130 {
0131     if (macintosh_config->adb_type != MAC_ADB_II)
0132         return -ENODEV;
0133
0134     via = via1;
0135
0136     pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
0137     return 0;
0138 }
0139
0140 /* Initialize the driver */
0141 static int macii_init(void)
0142 {
0143     unsigned long flags;
0144     int err;
0145
0146     local_irq_save(flags);
0147
0148     err = macii_init_via();
0149     if (err)
0150         goto out;
0151
0152     err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
0153               macii_interrupt);
0154     if (err)
0155         goto out;
0156
0157     macii_state = idle;
0158 out:
0159     local_irq_restore(flags);
0160     return err;
0161 }
0162
0163 /* initialize the hardware */
0164 static int macii_init_via(void)
0165 {
0166     unsigned char x;
0167
0168     /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
0169     via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
0170
0171     /* Set up state: idle */
0172     via[B] |= ST_IDLE;
0173
0174     /* Shift register on input */
0175     via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
0176
0177     /* Wipe any pending data and int */
0178     x = via[SR];
0179
0180     return 0;
0181 }
0182
0183 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
0184 static void macii_queue_poll(void)
0185 {
0186     static struct adb_request req;
0187     unsigned char poll_command;
0188     unsigned int poll_addr;
0189
0190     /* This only polls devices in the autopoll list, which assumes that
0191      * unprobed devices never assert SRQ. That could happen if a device was
0192      * plugged in after the adb bus scan. Unplugging it again will resolve
0193      * the problem. This behaviour is similar to MacOS.
0194      */
0195     if (!autopoll_devs)
0196         return;
0197
0198     /* The device most recently polled may not be the best device to poll
0199      * right now. Some other device(s) may have signalled SRQ (the active
0200      * device won't do that). Or the autopoll list may have been changed.
0201      * Try polling the next higher address.
0202      */
0203     poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;
0204     if ((srq_asserted && last_cmd == last_poll_cmd) ||
0205         !(autopoll_devs & (1 << poll_addr))) {
0206         unsigned int higher_devs;
0207
0208         higher_devs = autopoll_devs & -(1 << (poll_addr + 1));
0209         poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;
0210     }
0211
0212     /* Send a Talk Register 0 command */
0213     poll_command = ADB_READREG(poll_addr, 0);
0214
0215     /* No need to repeat this Talk command. The transceiver will do that
0216      * as long as it is idle.
0217      */
0218     if (poll_command == last_cmd)
0219         return;
0220
0221     adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);
0222
0223     req.sent = 0;
0224     req.complete = 0;
0225     req.reply_len = 0;
0226     req.next = current_req;
0227
0228     if (WARN_ON(current_req)) {
0229         current_req = &req;
0230     } else {
0231         current_req = &req;
0232         last_req = &req;
0233     }
0234 }
0235
0236 /* Send an ADB request; if sync, poll out the reply 'till it's done */
0237 static int macii_send_request(struct adb_request *req, int sync)
0238 {
0239     int err;
0240
0241     err = macii_write(req);
0242     if (err)
0243         return err;
0244
0245     if (sync)
0246         while (!req->complete)
0247             macii_poll();
0248
0249     return 0;
0250 }
0251
0252 /* Send an ADB request (append to request queue) */
0253 static int macii_write(struct adb_request *req)
0254 {
0255     unsigned long flags;
0256
0257     if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
0258         req->complete = 1;
0259         return -EINVAL;
0260     }
0261
0262     req->next = NULL;
0263     req->sent = 0;
0264     req->complete = 0;
0265     req->reply_len = 0;
0266
0267     local_irq_save(flags);
0268
0269     if (current_req != NULL) {
0270         last_req->next = req;
0271         last_req = req;
0272     } else {
0273         current_req = req;
0274         last_req = req;
0275         if (macii_state == idle)
0276             macii_start();
0277     }
0278
0279     local_irq_restore(flags);
0280
0281     return 0;
0282 }
0283
0284 /* Start auto-polling */
0285 static int macii_autopoll(int devs)
0286 {
0287     unsigned long flags;
0288
0289     local_irq_save(flags);
0290
0291     /* bit 1 == device 1, and so on. */
0292     autopoll_devs = (unsigned int)devs & 0xFFFE;
0293
0294     if (!current_req) {
0295         macii_queue_poll();
0296         if (current_req && macii_state == idle)
0297             macii_start();
0298     }
0299
0300     local_irq_restore(flags);
0301
0302     return 0;
0303 }
0304
0305 /* Prod the chip without interrupts */
0306 static void macii_poll(void)
0307 {
0308     macii_interrupt(0, NULL);
0309 }
0310
0311 /* Reset the bus */
0312 static int macii_reset_bus(void)
0313 {
0314     struct adb_request req;
0315
0316     /* Command = 0, Address = ignored */
0317     adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
0318     macii_send_request(&req, 1);
0319
0320     /* Don't want any more requests during the Global Reset low time. */
0321     udelay(3000);
0322
0323     return 0;
0324 }
0325
0326 /* Start sending ADB packet */
0327 static void macii_start(void)
0328 {
0329     struct adb_request *req;
0330
0331     req = current_req;
0332
0333     /* Now send it. Be careful though, that first byte of the request
0334      * is actually ADB_PACKET; the real data begins at index 1!
0335      * And req->nbytes is the number of bytes of real data plus one.
0336      */
0337
0338     /* Output mode */
0339     via[ACR] |= SR_OUT;
0340     /* Load data */
0341     via[SR] = req->data[1];
0342     /* set ADB state to 'command' */
0343     via[B] = (via[B] & ~ST_MASK) | ST_CMD;
0344
0345     macii_state = sending;
0346     data_index = 2;
0347
0348     bus_timeout = false;
0349     srq_asserted = false;
0350 }
0351
0352 /*
0353  * The notorious ADB interrupt handler - does all of the protocol handling.
0354  * Relies on the ADB controller sending and receiving data, thereby
0355  * generating shift register interrupts (SR_INT) for us. This means there has
0356  * to be activity on the ADB bus. The chip will poll to achieve this.
0357  *
0358  * The VIA Port B output signalling works as follows. After the ADB transceiver
0359  * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift
0360  * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs
0361  * are toggled with each byte as the ADB transaction progresses.
0362  *
0363  * Request with no reply expected (and empty transceiver buffer):
0364  *     CMD -> IDLE
0365  * Request with expected reply packet (or with buffered autopoll packet):
0366  *     CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE
0367  * Unsolicited packet:
0368  *     IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE
0369  */
0370 static irqreturn_t macii_interrupt(int irq, void *arg)
0371 {
0372     int x;
0373     struct adb_request *req;
0374     unsigned long flags;
0375
0376     local_irq_save(flags);
0377
0378     if (!arg) {
0379         /* Clear the SR IRQ flag when polling. */
0380         if (via[IFR] & SR_INT)
0381             via[IFR] = SR_INT;
0382         else {
0383             local_irq_restore(flags);
0384             return IRQ_NONE;
0385         }
0386     }
0387
0388     status = via[B] & (ST_MASK | CTLR_IRQ);
0389
0390     switch (macii_state) {
0391     case idle:
0392         WARN_ON((status & ST_MASK) != ST_IDLE);
0393
0394         reply_ptr = reply_buf;
0395         reading_reply = false;
0396
0397         bus_timeout = false;
0398         srq_asserted = false;
0399
0400         x = via[SR];
0401
0402         if (!(status & CTLR_IRQ)) {
0403             /* /CTLR_IRQ asserted in idle state means we must
0404              * read an autopoll reply from the transceiver buffer.
0405              */
0406             macii_state = reading;
0407             *reply_ptr = x;
0408             reply_len = 1;
0409         } else {
0410             /* bus timeout */
0411             reply_len = 0;
0412             break;
0413         }
0414
0415         /* set ADB state = even for first data byte */
0416         via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
0417         break;
0418
0419     case sending:
0420         req = current_req;
0421
0422         if (status == (ST_CMD | CTLR_IRQ)) {
0423             /* /CTLR_IRQ de-asserted after the command byte means
0424              * the host can continue with the transaction.
0425              */
0426
0427             /* Store command byte */
0428             last_cmd = req->data[1];
0429             if ((last_cmd & OP_MASK) == TALK) {
0430                 last_talk_cmd = last_cmd;
0431                 if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))
0432                     last_poll_cmd = last_cmd;
0433             }
0434         }
0435
0436         if (status == ST_CMD) {
0437             /* /CTLR_IRQ asserted after the command byte means we
0438              * must read an autopoll reply. The first byte was
0439              * lost because the shift register was an output.
0440              */
0441             macii_state = reading;
0442
0443             reading_reply = false;
0444             reply_ptr = reply_buf;
0445             *reply_ptr = last_talk_cmd;
0446             reply_len = 1;
0447
0448             /* reset to shift in */
0449             via[ACR] &= ~SR_OUT;
0450             x = via[SR];
0451         } else if (data_index >= req->nbytes) {
0452             req->sent = 1;
0453
0454             if (req->reply_expected) {
0455                 macii_state = reading;
0456
0457                 reading_reply = true;
0458                 reply_ptr = req->reply;
0459                 *reply_ptr = req->data[1];
0460                 reply_len = 1;
0461
0462                 via[ACR] &= ~SR_OUT;
0463                 x = via[SR];
0464             } else if ((req->data[1] & OP_MASK) == TALK) {
0465                 macii_state = reading;
0466
0467                 reading_reply = false;
0468                 reply_ptr = reply_buf;
0469                 *reply_ptr = req->data[1];
0470                 reply_len = 1;
0471
0472                 via[ACR] &= ~SR_OUT;
0473                 x = via[SR];
0474
0475                 req->complete = 1;
0476                 current_req = req->next;
0477                 if (req->done)
0478                     (*req->done)(req);
0479             } else {
0480                 macii_state = idle;
0481
0482                 req->complete = 1;
0483                 current_req = req->next;
0484                 if (req->done)
0485                     (*req->done)(req);
0486                 break;
0487             }
0488         } else {
0489             via[SR] = req->data[data_index++];
0490         }
0491
0492         if ((via[B] & ST_MASK) == ST_CMD) {
0493             /* just sent the command byte, set to EVEN */
0494             via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
0495         } else {
0496             /* invert state bits, toggle ODD/EVEN */
0497             via[B] ^= ST_MASK;
0498         }
0499         break;
0500
0501     case reading:
0502         x = via[SR];
0503         WARN_ON((status & ST_MASK) == ST_CMD ||
0504             (status & ST_MASK) == ST_IDLE);
0505
0506         if (!(status & CTLR_IRQ)) {
0507             if (status == ST_EVEN && reply_len == 1) {
0508                 bus_timeout = true;
0509             } else if (status == ST_ODD && reply_len == 2) {
0510                 srq_asserted = true;
0511             } else {
0512                 macii_state = idle;
0513
0514                 if (bus_timeout)
0515                     reply_len = 0;
0516
0517                 if (reading_reply) {
0518                     struct adb_request *req = current_req;
0519
0520                     req->reply_len = reply_len;
0521
0522                     req->complete = 1;
0523                     current_req = req->next;
0524                     if (req->done)
0525                         (*req->done)(req);
0526                 } else if (reply_len && autopoll_devs &&
0527                        reply_buf[0] == last_poll_cmd) {
0528                     adb_input(reply_buf, reply_len, 1);
0529                 }
0530                 break;
0531             }
0532         }
0533
0534         if (reply_len < ARRAY_SIZE(reply_buf)) {
0535             reply_ptr++;
0536             *reply_ptr = x;
0537             reply_len++;
0538         }
0539
0540         /* invert state bits, toggle ODD/EVEN */
0541         via[B] ^= ST_MASK;
0542         break;
0543
0544     default:
0545         break;
0546     }
0547
0548     if (macii_state == idle) {
0549         if (!current_req)
0550             macii_queue_poll();
0551
0552         if (current_req)
0553             macii_start();
0554
0555         if (macii_state == idle) {
0556             via[ACR] &= ~SR_OUT;
0557             x = via[SR];
0558             via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
0559         }
0560     }
0561
0562     local_irq_restore(flags);
0563     return IRQ_HANDLED;
0564 }