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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2017-2022 Linaro Ltd
0004  * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
0005  */
0006 #include <linux/bits.h>
0007 #include <linux/bitfield.h>
0008 #include <linux/led-class-multicolor.h>
0009 #include <linux/module.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/pwm.h>
0014 #include <linux/regmap.h>
0015 #include <linux/slab.h>
0016 
0017 #define LPG_SUBTYPE_REG     0x05
0018 #define  LPG_SUBTYPE_LPG    0x2
0019 #define  LPG_SUBTYPE_PWM    0xb
0020 #define  LPG_SUBTYPE_LPG_LITE   0x11
0021 #define LPG_PATTERN_CONFIG_REG  0x40
0022 #define LPG_SIZE_CLK_REG    0x41
0023 #define  PWM_CLK_SELECT_MASK    GENMASK(1, 0)
0024 #define LPG_PREDIV_CLK_REG  0x42
0025 #define  PWM_FREQ_PRE_DIV_MASK  GENMASK(6, 5)
0026 #define  PWM_FREQ_EXP_MASK  GENMASK(2, 0)
0027 #define PWM_TYPE_CONFIG_REG 0x43
0028 #define PWM_VALUE_REG       0x44
0029 #define PWM_ENABLE_CONTROL_REG  0x46
0030 #define PWM_SYNC_REG        0x47
0031 #define LPG_RAMP_DURATION_REG   0x50
0032 #define LPG_HI_PAUSE_REG    0x52
0033 #define LPG_LO_PAUSE_REG    0x54
0034 #define LPG_HI_IDX_REG      0x56
0035 #define LPG_LO_IDX_REG      0x57
0036 #define PWM_SEC_ACCESS_REG  0xd0
0037 #define PWM_DTEST_REG(x)    (0xe2 + (x) - 1)
0038 
0039 #define TRI_LED_SRC_SEL     0x45
0040 #define TRI_LED_EN_CTL      0x46
0041 #define TRI_LED_ATC_CTL     0x47
0042 
0043 #define LPG_LUT_REG(x)      (0x40 + (x) * 2)
0044 #define RAMP_CONTROL_REG    0xc8
0045 
0046 #define LPG_RESOLUTION      512
0047 #define LPG_MAX_M       7
0048 
0049 struct lpg_channel;
0050 struct lpg_data;
0051 
0052 /**
0053  * struct lpg - LPG device context
0054  * @dev:    pointer to LPG device
0055  * @map:    regmap for register access
0056  * @lock:   used to synchronize LED and pwm callback requests
0057  * @pwm:    PWM-chip object, if operating in PWM mode
0058  * @data:   reference to version specific data
0059  * @lut_base:   base address of the LUT block (optional)
0060  * @lut_size:   number of entries in the LUT block
0061  * @lut_bitmap: allocation bitmap for LUT entries
0062  * @triled_base: base address of the TRILED block (optional)
0063  * @triled_src: power-source for the TRILED
0064  * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
0065  * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
0066  * @channels:   list of PWM channels
0067  * @num_channels: number of @channels
0068  */
0069 struct lpg {
0070     struct device *dev;
0071     struct regmap *map;
0072 
0073     struct mutex lock;
0074 
0075     struct pwm_chip pwm;
0076 
0077     const struct lpg_data *data;
0078 
0079     u32 lut_base;
0080     u32 lut_size;
0081     unsigned long *lut_bitmap;
0082 
0083     u32 triled_base;
0084     u32 triled_src;
0085     bool triled_has_atc_ctl;
0086     bool triled_has_src_sel;
0087 
0088     struct lpg_channel *channels;
0089     unsigned int num_channels;
0090 };
0091 
0092 /**
0093  * struct lpg_channel - per channel data
0094  * @lpg:    reference to parent lpg
0095  * @base:   base address of the PWM channel
0096  * @triled_mask: mask in TRILED to enable this channel
0097  * @lut_mask:   mask in LUT to start pattern generator for this channel
0098  * @subtype:    PMIC hardware block subtype
0099  * @in_use: channel is exposed to LED framework
0100  * @color:  color of the LED attached to this channel
0101  * @dtest_line: DTEST line for output, or 0 if disabled
0102  * @dtest_value: DTEST line configuration
0103  * @pwm_value:  duty (in microseconds) of the generated pulses, overridden by LUT
0104  * @enabled:    output enabled?
0105  * @period: period (in nanoseconds) of the generated pulses
0106  * @clk_sel:    reference clock frequency selector
0107  * @pre_div_sel: divider selector of the reference clock
0108  * @pre_div_exp: exponential divider of the reference clock
0109  * @ramp_enabled: duty cycle is driven by iterating over lookup table
0110  * @ramp_ping_pong: reverse through pattern, rather than wrapping to start
0111  * @ramp_oneshot: perform only a single pass over the pattern
0112  * @ramp_reverse: iterate over pattern backwards
0113  * @ramp_tick_ms: length (in milliseconds) of one step in the pattern
0114  * @ramp_lo_pause_ms: pause (in milliseconds) before iterating over pattern
0115  * @ramp_hi_pause_ms: pause (in milliseconds) after iterating over pattern
0116  * @pattern_lo_idx: start index of associated pattern
0117  * @pattern_hi_idx: last index of associated pattern
0118  */
0119 struct lpg_channel {
0120     struct lpg *lpg;
0121 
0122     u32 base;
0123     unsigned int triled_mask;
0124     unsigned int lut_mask;
0125     unsigned int subtype;
0126 
0127     bool in_use;
0128 
0129     int color;
0130 
0131     u32 dtest_line;
0132     u32 dtest_value;
0133 
0134     u16 pwm_value;
0135     bool enabled;
0136 
0137     u64 period;
0138     unsigned int clk_sel;
0139     unsigned int pre_div_sel;
0140     unsigned int pre_div_exp;
0141 
0142     bool ramp_enabled;
0143     bool ramp_ping_pong;
0144     bool ramp_oneshot;
0145     bool ramp_reverse;
0146     unsigned short ramp_tick_ms;
0147     unsigned long ramp_lo_pause_ms;
0148     unsigned long ramp_hi_pause_ms;
0149 
0150     unsigned int pattern_lo_idx;
0151     unsigned int pattern_hi_idx;
0152 };
0153 
0154 /**
0155  * struct lpg_led - logical LED object
0156  * @lpg:        lpg context reference
0157  * @cdev:       LED class device
0158  * @mcdev:      Multicolor LED class device
0159  * @num_channels:   number of @channels
0160  * @channels:       list of channels associated with the LED
0161  */
0162 struct lpg_led {
0163     struct lpg *lpg;
0164 
0165     struct led_classdev cdev;
0166     struct led_classdev_mc mcdev;
0167 
0168     unsigned int num_channels;
0169     struct lpg_channel *channels[];
0170 };
0171 
0172 /**
0173  * struct lpg_channel_data - per channel initialization data
0174  * @base:       base address for PWM channel registers
0175  * @triled_mask:    bitmask for controlling this channel in TRILED
0176  */
0177 struct lpg_channel_data {
0178     unsigned int base;
0179     u8 triled_mask;
0180 };
0181 
0182 /**
0183  * struct lpg_data - initialization data
0184  * @lut_base:       base address of LUT block
0185  * @lut_size:       number of entries in LUT
0186  * @triled_base:    base address of TRILED
0187  * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
0188  * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
0189  * @num_channels:   number of channels in LPG
0190  * @channels:       list of channel initialization data
0191  */
0192 struct lpg_data {
0193     unsigned int lut_base;
0194     unsigned int lut_size;
0195     unsigned int triled_base;
0196     bool triled_has_atc_ctl;
0197     bool triled_has_src_sel;
0198     int num_channels;
0199     const struct lpg_channel_data *channels;
0200 };
0201 
0202 static int triled_set(struct lpg *lpg, unsigned int mask, unsigned int enable)
0203 {
0204     /* Skip if we don't have a triled block */
0205     if (!lpg->triled_base)
0206         return 0;
0207 
0208     return regmap_update_bits(lpg->map, lpg->triled_base + TRI_LED_EN_CTL,
0209                   mask, enable);
0210 }
0211 
0212 static int lpg_lut_store(struct lpg *lpg, struct led_pattern *pattern,
0213              size_t len, unsigned int *lo_idx, unsigned int *hi_idx)
0214 {
0215     unsigned int idx;
0216     u16 val;
0217     int i;
0218 
0219     idx = bitmap_find_next_zero_area(lpg->lut_bitmap, lpg->lut_size,
0220                      0, len, 0);
0221     if (idx >= lpg->lut_size)
0222         return -ENOMEM;
0223 
0224     for (i = 0; i < len; i++) {
0225         val = pattern[i].brightness;
0226 
0227         regmap_bulk_write(lpg->map, lpg->lut_base + LPG_LUT_REG(idx + i),
0228                   &val, sizeof(val));
0229     }
0230 
0231     bitmap_set(lpg->lut_bitmap, idx, len);
0232 
0233     *lo_idx = idx;
0234     *hi_idx = idx + len - 1;
0235 
0236     return 0;
0237 }
0238 
0239 static void lpg_lut_free(struct lpg *lpg, unsigned int lo_idx, unsigned int hi_idx)
0240 {
0241     int len;
0242 
0243     len = hi_idx - lo_idx + 1;
0244     if (len == 1)
0245         return;
0246 
0247     bitmap_clear(lpg->lut_bitmap, lo_idx, len);
0248 }
0249 
0250 static int lpg_lut_sync(struct lpg *lpg, unsigned int mask)
0251 {
0252     return regmap_write(lpg->map, lpg->lut_base + RAMP_CONTROL_REG, mask);
0253 }
0254 
0255 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000};
0256 static const unsigned int lpg_pre_divs[] = {1, 3, 5, 6};
0257 
0258 static int lpg_calc_freq(struct lpg_channel *chan, uint64_t period)
0259 {
0260     unsigned int clk_sel, best_clk = 0;
0261     unsigned int div, best_div = 0;
0262     unsigned int m, best_m = 0;
0263     unsigned int error;
0264     unsigned int best_err = UINT_MAX;
0265     u64 best_period = 0;
0266     u64 max_period;
0267 
0268     /*
0269      * The PWM period is determined by:
0270      *
0271      *          resolution * pre_div * 2^M
0272      * period = --------------------------
0273      *                   refclk
0274      *
0275      * With resolution fixed at 2^9 bits, pre_div = {1, 3, 5, 6} and
0276      * M = [0..7].
0277      *
0278      * This allows for periods between 27uS and 384s, as the PWM framework
0279      * wants a period of equal or lower length than requested, reject
0280      * anything below 27uS.
0281      */
0282     if (period <= (u64)NSEC_PER_SEC * LPG_RESOLUTION / 19200000)
0283         return -EINVAL;
0284 
0285     /* Limit period to largest possible value, to avoid overflows */
0286     max_period = (u64)NSEC_PER_SEC * LPG_RESOLUTION * 6 * (1 << LPG_MAX_M) / 1024;
0287     if (period > max_period)
0288         period = max_period;
0289 
0290     /*
0291      * Search for the pre_div, refclk and M by solving the rewritten formula
0292      * for each refclk and pre_div value:
0293      *
0294      *                     period * refclk
0295      * M = log2 -------------------------------------
0296      *           NSEC_PER_SEC * pre_div * resolution
0297      */
0298     for (clk_sel = 1; clk_sel < ARRAY_SIZE(lpg_clk_rates); clk_sel++) {
0299         u64 numerator = period * lpg_clk_rates[clk_sel];
0300 
0301         for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) {
0302             u64 denominator = (u64)NSEC_PER_SEC * lpg_pre_divs[div] * LPG_RESOLUTION;
0303             u64 actual;
0304             u64 ratio;
0305 
0306             if (numerator < denominator)
0307                 continue;
0308 
0309             ratio = div64_u64(numerator, denominator);
0310             m = ilog2(ratio);
0311             if (m > LPG_MAX_M)
0312                 m = LPG_MAX_M;
0313 
0314             actual = DIV_ROUND_UP_ULL(denominator * (1 << m), lpg_clk_rates[clk_sel]);
0315 
0316             error = period - actual;
0317             if (error < best_err) {
0318                 best_err = error;
0319 
0320                 best_div = div;
0321                 best_m = m;
0322                 best_clk = clk_sel;
0323                 best_period = actual;
0324             }
0325         }
0326     }
0327 
0328     chan->clk_sel = best_clk;
0329     chan->pre_div_sel = best_div;
0330     chan->pre_div_exp = best_m;
0331     chan->period = best_period;
0332 
0333     return 0;
0334 }
0335 
0336 static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty)
0337 {
0338     unsigned int max = LPG_RESOLUTION - 1;
0339     unsigned int val;
0340 
0341     val = div64_u64(duty * lpg_clk_rates[chan->clk_sel],
0342             (u64)NSEC_PER_SEC * lpg_pre_divs[chan->pre_div_sel] * (1 << chan->pre_div_exp));
0343 
0344     chan->pwm_value = min(val, max);
0345 }
0346 
0347 static void lpg_apply_freq(struct lpg_channel *chan)
0348 {
0349     unsigned long val;
0350     struct lpg *lpg = chan->lpg;
0351 
0352     if (!chan->enabled)
0353         return;
0354 
0355     val = chan->clk_sel;
0356 
0357     /* Specify 9bit resolution, based on the subtype of the channel */
0358     switch (chan->subtype) {
0359     case LPG_SUBTYPE_LPG:
0360         val |= GENMASK(5, 4);
0361         break;
0362     case LPG_SUBTYPE_PWM:
0363         val |= BIT(2);
0364         break;
0365     case LPG_SUBTYPE_LPG_LITE:
0366     default:
0367         val |= BIT(4);
0368         break;
0369     }
0370 
0371     regmap_write(lpg->map, chan->base + LPG_SIZE_CLK_REG, val);
0372 
0373     val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) |
0374           FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp);
0375     regmap_write(lpg->map, chan->base + LPG_PREDIV_CLK_REG, val);
0376 }
0377 
0378 #define LPG_ENABLE_GLITCH_REMOVAL   BIT(5)
0379 
0380 static void lpg_enable_glitch(struct lpg_channel *chan)
0381 {
0382     struct lpg *lpg = chan->lpg;
0383 
0384     regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
0385                LPG_ENABLE_GLITCH_REMOVAL, 0);
0386 }
0387 
0388 static void lpg_disable_glitch(struct lpg_channel *chan)
0389 {
0390     struct lpg *lpg = chan->lpg;
0391 
0392     regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
0393                LPG_ENABLE_GLITCH_REMOVAL,
0394                LPG_ENABLE_GLITCH_REMOVAL);
0395 }
0396 
0397 static void lpg_apply_pwm_value(struct lpg_channel *chan)
0398 {
0399     struct lpg *lpg = chan->lpg;
0400     u16 val = chan->pwm_value;
0401 
0402     if (!chan->enabled)
0403         return;
0404 
0405     regmap_bulk_write(lpg->map, chan->base + PWM_VALUE_REG, &val, sizeof(val));
0406 }
0407 
0408 #define LPG_PATTERN_CONFIG_LO_TO_HI BIT(4)
0409 #define LPG_PATTERN_CONFIG_REPEAT   BIT(3)
0410 #define LPG_PATTERN_CONFIG_TOGGLE   BIT(2)
0411 #define LPG_PATTERN_CONFIG_PAUSE_HI BIT(1)
0412 #define LPG_PATTERN_CONFIG_PAUSE_LO BIT(0)
0413 
0414 static void lpg_apply_lut_control(struct lpg_channel *chan)
0415 {
0416     struct lpg *lpg = chan->lpg;
0417     unsigned int hi_pause;
0418     unsigned int lo_pause;
0419     unsigned int conf = 0;
0420     unsigned int lo_idx = chan->pattern_lo_idx;
0421     unsigned int hi_idx = chan->pattern_hi_idx;
0422     u16 step = chan->ramp_tick_ms;
0423 
0424     if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx)
0425         return;
0426 
0427     hi_pause = DIV_ROUND_UP(chan->ramp_hi_pause_ms, step);
0428     lo_pause = DIV_ROUND_UP(chan->ramp_lo_pause_ms, step);
0429 
0430     if (!chan->ramp_reverse)
0431         conf |= LPG_PATTERN_CONFIG_LO_TO_HI;
0432     if (!chan->ramp_oneshot)
0433         conf |= LPG_PATTERN_CONFIG_REPEAT;
0434     if (chan->ramp_ping_pong)
0435         conf |= LPG_PATTERN_CONFIG_TOGGLE;
0436     if (chan->ramp_hi_pause_ms)
0437         conf |= LPG_PATTERN_CONFIG_PAUSE_HI;
0438     if (chan->ramp_lo_pause_ms)
0439         conf |= LPG_PATTERN_CONFIG_PAUSE_LO;
0440 
0441     regmap_write(lpg->map, chan->base + LPG_PATTERN_CONFIG_REG, conf);
0442     regmap_write(lpg->map, chan->base + LPG_HI_IDX_REG, hi_idx);
0443     regmap_write(lpg->map, chan->base + LPG_LO_IDX_REG, lo_idx);
0444 
0445     regmap_bulk_write(lpg->map, chan->base + LPG_RAMP_DURATION_REG, &step, sizeof(step));
0446     regmap_write(lpg->map, chan->base + LPG_HI_PAUSE_REG, hi_pause);
0447     regmap_write(lpg->map, chan->base + LPG_LO_PAUSE_REG, lo_pause);
0448 }
0449 
0450 #define LPG_ENABLE_CONTROL_OUTPUT       BIT(7)
0451 #define LPG_ENABLE_CONTROL_BUFFER_TRISTATE  BIT(5)
0452 #define LPG_ENABLE_CONTROL_SRC_PWM      BIT(2)
0453 #define LPG_ENABLE_CONTROL_RAMP_GEN     BIT(1)
0454 
0455 static void lpg_apply_control(struct lpg_channel *chan)
0456 {
0457     unsigned int ctrl;
0458     struct lpg *lpg = chan->lpg;
0459 
0460     ctrl = LPG_ENABLE_CONTROL_BUFFER_TRISTATE;
0461 
0462     if (chan->enabled)
0463         ctrl |= LPG_ENABLE_CONTROL_OUTPUT;
0464 
0465     if (chan->pattern_lo_idx != chan->pattern_hi_idx)
0466         ctrl |= LPG_ENABLE_CONTROL_RAMP_GEN;
0467     else
0468         ctrl |= LPG_ENABLE_CONTROL_SRC_PWM;
0469 
0470     regmap_write(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, ctrl);
0471 
0472     /*
0473      * Due to LPG hardware bug, in the PWM mode, having enabled PWM,
0474      * We have to write PWM values one more time.
0475      */
0476     if (chan->enabled)
0477         lpg_apply_pwm_value(chan);
0478 }
0479 
0480 #define LPG_SYNC_PWM    BIT(0)
0481 
0482 static void lpg_apply_sync(struct lpg_channel *chan)
0483 {
0484     struct lpg *lpg = chan->lpg;
0485 
0486     regmap_write(lpg->map, chan->base + PWM_SYNC_REG, LPG_SYNC_PWM);
0487 }
0488 
0489 static int lpg_parse_dtest(struct lpg *lpg)
0490 {
0491     struct lpg_channel *chan;
0492     struct device_node *np = lpg->dev->of_node;
0493     int count;
0494     int ret;
0495     int i;
0496 
0497     count = of_property_count_u32_elems(np, "qcom,dtest");
0498     if (count == -EINVAL) {
0499         return 0;
0500     } else if (count < 0) {
0501         ret = count;
0502         goto err_malformed;
0503     } else if (count != lpg->data->num_channels * 2) {
0504         dev_err(lpg->dev, "qcom,dtest needs to be %d items\n",
0505             lpg->data->num_channels * 2);
0506         return -EINVAL;
0507     }
0508 
0509     for (i = 0; i < lpg->data->num_channels; i++) {
0510         chan = &lpg->channels[i];
0511 
0512         ret = of_property_read_u32_index(np, "qcom,dtest", i * 2,
0513                          &chan->dtest_line);
0514         if (ret)
0515             goto err_malformed;
0516 
0517         ret = of_property_read_u32_index(np, "qcom,dtest", i * 2 + 1,
0518                          &chan->dtest_value);
0519         if (ret)
0520             goto err_malformed;
0521     }
0522 
0523     return 0;
0524 
0525 err_malformed:
0526     dev_err(lpg->dev, "malformed qcom,dtest\n");
0527     return ret;
0528 }
0529 
0530 static void lpg_apply_dtest(struct lpg_channel *chan)
0531 {
0532     struct lpg *lpg = chan->lpg;
0533 
0534     if (!chan->dtest_line)
0535         return;
0536 
0537     regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5);
0538     regmap_write(lpg->map, chan->base + PWM_DTEST_REG(chan->dtest_line),
0539              chan->dtest_value);
0540 }
0541 
0542 static void lpg_apply(struct lpg_channel *chan)
0543 {
0544     lpg_disable_glitch(chan);
0545     lpg_apply_freq(chan);
0546     lpg_apply_pwm_value(chan);
0547     lpg_apply_control(chan);
0548     lpg_apply_sync(chan);
0549     lpg_apply_lut_control(chan);
0550     lpg_enable_glitch(chan);
0551 }
0552 
0553 static void lpg_brightness_set(struct lpg_led *led, struct led_classdev *cdev,
0554                    struct mc_subled *subleds)
0555 {
0556     enum led_brightness brightness;
0557     struct lpg_channel *chan;
0558     unsigned int triled_enabled = 0;
0559     unsigned int triled_mask = 0;
0560     unsigned int lut_mask = 0;
0561     unsigned int duty;
0562     struct lpg *lpg = led->lpg;
0563     int i;
0564 
0565     for (i = 0; i < led->num_channels; i++) {
0566         chan = led->channels[i];
0567         brightness = subleds[i].brightness;
0568 
0569         if (brightness == LED_OFF) {
0570             chan->enabled = false;
0571             chan->ramp_enabled = false;
0572         } else if (chan->pattern_lo_idx != chan->pattern_hi_idx) {
0573             lpg_calc_freq(chan, NSEC_PER_MSEC);
0574 
0575             chan->enabled = true;
0576             chan->ramp_enabled = true;
0577 
0578             lut_mask |= chan->lut_mask;
0579             triled_enabled |= chan->triled_mask;
0580         } else {
0581             lpg_calc_freq(chan, NSEC_PER_MSEC);
0582 
0583             duty = div_u64(brightness * chan->period, cdev->max_brightness);
0584             lpg_calc_duty(chan, duty);
0585             chan->enabled = true;
0586             chan->ramp_enabled = false;
0587 
0588             triled_enabled |= chan->triled_mask;
0589         }
0590 
0591         triled_mask |= chan->triled_mask;
0592 
0593         lpg_apply(chan);
0594     }
0595 
0596     /* Toggle triled lines */
0597     if (triled_mask)
0598         triled_set(lpg, triled_mask, triled_enabled);
0599 
0600     /* Trigger start of ramp generator(s) */
0601     if (lut_mask)
0602         lpg_lut_sync(lpg, lut_mask);
0603 }
0604 
0605 static void lpg_brightness_single_set(struct led_classdev *cdev,
0606                       enum led_brightness value)
0607 {
0608     struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
0609     struct mc_subled info;
0610 
0611     mutex_lock(&led->lpg->lock);
0612 
0613     info.brightness = value;
0614     lpg_brightness_set(led, cdev, &info);
0615 
0616     mutex_unlock(&led->lpg->lock);
0617 }
0618 
0619 static void lpg_brightness_mc_set(struct led_classdev *cdev,
0620                   enum led_brightness value)
0621 {
0622     struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
0623     struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
0624 
0625     mutex_lock(&led->lpg->lock);
0626 
0627     led_mc_calc_color_components(mc, value);
0628     lpg_brightness_set(led, cdev, mc->subled_info);
0629 
0630     mutex_unlock(&led->lpg->lock);
0631 }
0632 
0633 static int lpg_blink_set(struct lpg_led *led,
0634              unsigned long *delay_on, unsigned long *delay_off)
0635 {
0636     struct lpg_channel *chan;
0637     unsigned int period;
0638     unsigned int triled_mask = 0;
0639     struct lpg *lpg = led->lpg;
0640     u64 duty;
0641     int i;
0642 
0643     if (!*delay_on && !*delay_off) {
0644         *delay_on = 500;
0645         *delay_off = 500;
0646     }
0647 
0648     duty = *delay_on * NSEC_PER_MSEC;
0649     period = (*delay_on + *delay_off) * NSEC_PER_MSEC;
0650 
0651     for (i = 0; i < led->num_channels; i++) {
0652         chan = led->channels[i];
0653 
0654         lpg_calc_freq(chan, period);
0655         lpg_calc_duty(chan, duty);
0656 
0657         chan->enabled = true;
0658         chan->ramp_enabled = false;
0659 
0660         triled_mask |= chan->triled_mask;
0661 
0662         lpg_apply(chan);
0663     }
0664 
0665     /* Enable triled lines */
0666     triled_set(lpg, triled_mask, triled_mask);
0667 
0668     chan = led->channels[0];
0669     duty = div_u64(chan->pwm_value * chan->period, LPG_RESOLUTION);
0670     *delay_on = div_u64(duty, NSEC_PER_MSEC);
0671     *delay_off = div_u64(chan->period - duty, NSEC_PER_MSEC);
0672 
0673     return 0;
0674 }
0675 
0676 static int lpg_blink_single_set(struct led_classdev *cdev,
0677                 unsigned long *delay_on, unsigned long *delay_off)
0678 {
0679     struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
0680     int ret;
0681 
0682     mutex_lock(&led->lpg->lock);
0683 
0684     ret = lpg_blink_set(led, delay_on, delay_off);
0685 
0686     mutex_unlock(&led->lpg->lock);
0687 
0688     return ret;
0689 }
0690 
0691 static int lpg_blink_mc_set(struct led_classdev *cdev,
0692                 unsigned long *delay_on, unsigned long *delay_off)
0693 {
0694     struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
0695     struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
0696     int ret;
0697 
0698     mutex_lock(&led->lpg->lock);
0699 
0700     ret = lpg_blink_set(led, delay_on, delay_off);
0701 
0702     mutex_unlock(&led->lpg->lock);
0703 
0704     return ret;
0705 }
0706 
0707 static int lpg_pattern_set(struct lpg_led *led, struct led_pattern *led_pattern,
0708                u32 len, int repeat)
0709 {
0710     struct lpg_channel *chan;
0711     struct lpg *lpg = led->lpg;
0712     struct led_pattern *pattern;
0713     unsigned int brightness_a;
0714     unsigned int brightness_b;
0715     unsigned int actual_len;
0716     unsigned int hi_pause;
0717     unsigned int lo_pause;
0718     unsigned int delta_t;
0719     unsigned int lo_idx;
0720     unsigned int hi_idx;
0721     unsigned int i;
0722     bool ping_pong = true;
0723     int ret = -EINVAL;
0724 
0725     /* Hardware only support oneshot or indefinite loops */
0726     if (repeat != -1 && repeat != 1)
0727         return -EINVAL;
0728 
0729     /*
0730      * The standardized leds-trigger-pattern format defines that the
0731      * brightness of the LED follows a linear transition from one entry
0732      * in the pattern to the next, over the given delta_t time. It
0733      * describes that the way to perform instant transitions a zero-length
0734      * entry should be added following a pattern entry.
0735      *
0736      * The LPG hardware is only able to perform the latter (no linear
0737      * transitions), so require each entry in the pattern to be followed by
0738      * a zero-length transition.
0739      */
0740     if (len % 2)
0741         return -EINVAL;
0742 
0743     pattern = kcalloc(len / 2, sizeof(*pattern), GFP_KERNEL);
0744     if (!pattern)
0745         return -ENOMEM;
0746 
0747     for (i = 0; i < len; i += 2) {
0748         if (led_pattern[i].brightness != led_pattern[i + 1].brightness)
0749             goto out_free_pattern;
0750         if (led_pattern[i + 1].delta_t != 0)
0751             goto out_free_pattern;
0752 
0753         pattern[i / 2].brightness = led_pattern[i].brightness;
0754         pattern[i / 2].delta_t = led_pattern[i].delta_t;
0755     }
0756 
0757     len /= 2;
0758 
0759     /*
0760      * Specifying a pattern of length 1 causes the hardware to iterate
0761      * through the entire LUT, so prohibit this.
0762      */
0763     if (len < 2)
0764         goto out_free_pattern;
0765 
0766     /*
0767      * The LPG plays patterns with at a fixed pace, a "low pause" can be
0768      * used to stretch the first delay of the pattern and a "high pause"
0769      * the last one.
0770      *
0771      * In order to save space the pattern can be played in "ping pong"
0772      * mode, in which the pattern is first played forward, then "high
0773      * pause" is applied, then the pattern is played backwards and finally
0774      * the "low pause" is applied.
0775      *
0776      * The middle elements of the pattern are used to determine delta_t and
0777      * the "low pause" and "high pause" multipliers are derrived from this.
0778      *
0779      * The first element in the pattern is used to determine "low pause".
0780      *
0781      * If the specified pattern is a palindrome the ping pong mode is
0782      * enabled. In this scenario the delta_t of the middle entry (i.e. the
0783      * last in the programmed pattern) determines the "high pause".
0784      */
0785 
0786     /* Detect palindromes and use "ping pong" to reduce LUT usage */
0787     for (i = 0; i < len / 2; i++) {
0788         brightness_a = pattern[i].brightness;
0789         brightness_b = pattern[len - i - 1].brightness;
0790 
0791         if (brightness_a != brightness_b) {
0792             ping_pong = false;
0793             break;
0794         }
0795     }
0796 
0797     /* The pattern length to be written to the LUT */
0798     if (ping_pong)
0799         actual_len = (len + 1) / 2;
0800     else
0801         actual_len = len;
0802 
0803     /*
0804      * Validate that all delta_t in the pattern are the same, with the
0805      * exception of the middle element in case of ping_pong.
0806      */
0807     delta_t = pattern[1].delta_t;
0808     for (i = 2; i < len; i++) {
0809         if (pattern[i].delta_t != delta_t) {
0810             /*
0811              * Allow last entry in the full or shortened pattern to
0812              * specify hi pause. Reject other variations.
0813              */
0814             if (i != actual_len - 1)
0815                 goto out_free_pattern;
0816         }
0817     }
0818 
0819     /* LPG_RAMP_DURATION_REG is a 9bit */
0820     if (delta_t >= BIT(9))
0821         goto out_free_pattern;
0822 
0823     /* Find "low pause" and "high pause" in the pattern */
0824     lo_pause = pattern[0].delta_t;
0825     hi_pause = pattern[actual_len - 1].delta_t;
0826 
0827     mutex_lock(&lpg->lock);
0828     ret = lpg_lut_store(lpg, pattern, actual_len, &lo_idx, &hi_idx);
0829     if (ret < 0)
0830         goto out_unlock;
0831 
0832     for (i = 0; i < led->num_channels; i++) {
0833         chan = led->channels[i];
0834 
0835         chan->ramp_tick_ms = delta_t;
0836         chan->ramp_ping_pong = ping_pong;
0837         chan->ramp_oneshot = repeat != -1;
0838 
0839         chan->ramp_lo_pause_ms = lo_pause;
0840         chan->ramp_hi_pause_ms = hi_pause;
0841 
0842         chan->pattern_lo_idx = lo_idx;
0843         chan->pattern_hi_idx = hi_idx;
0844     }
0845 
0846 out_unlock:
0847     mutex_unlock(&lpg->lock);
0848 out_free_pattern:
0849     kfree(pattern);
0850 
0851     return ret;
0852 }
0853 
0854 static int lpg_pattern_single_set(struct led_classdev *cdev,
0855                   struct led_pattern *pattern, u32 len,
0856                   int repeat)
0857 {
0858     struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
0859     int ret;
0860 
0861     ret = lpg_pattern_set(led, pattern, len, repeat);
0862     if (ret < 0)
0863         return ret;
0864 
0865     lpg_brightness_single_set(cdev, LED_FULL);
0866 
0867     return 0;
0868 }
0869 
0870 static int lpg_pattern_mc_set(struct led_classdev *cdev,
0871                   struct led_pattern *pattern, u32 len,
0872                   int repeat)
0873 {
0874     struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
0875     struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
0876     int ret;
0877 
0878     ret = lpg_pattern_set(led, pattern, len, repeat);
0879     if (ret < 0)
0880         return ret;
0881 
0882     led_mc_calc_color_components(mc, LED_FULL);
0883     lpg_brightness_set(led, cdev, mc->subled_info);
0884 
0885     return 0;
0886 }
0887 
0888 static int lpg_pattern_clear(struct lpg_led *led)
0889 {
0890     struct lpg_channel *chan;
0891     struct lpg *lpg = led->lpg;
0892     int i;
0893 
0894     mutex_lock(&lpg->lock);
0895 
0896     chan = led->channels[0];
0897     lpg_lut_free(lpg, chan->pattern_lo_idx, chan->pattern_hi_idx);
0898 
0899     for (i = 0; i < led->num_channels; i++) {
0900         chan = led->channels[i];
0901         chan->pattern_lo_idx = 0;
0902         chan->pattern_hi_idx = 0;
0903     }
0904 
0905     mutex_unlock(&lpg->lock);
0906 
0907     return 0;
0908 }
0909 
0910 static int lpg_pattern_single_clear(struct led_classdev *cdev)
0911 {
0912     struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
0913 
0914     return lpg_pattern_clear(led);
0915 }
0916 
0917 static int lpg_pattern_mc_clear(struct led_classdev *cdev)
0918 {
0919     struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
0920     struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
0921 
0922     return lpg_pattern_clear(led);
0923 }
0924 
0925 static int lpg_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
0926 {
0927     struct lpg *lpg = container_of(chip, struct lpg, pwm);
0928     struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
0929 
0930     return chan->in_use ? -EBUSY : 0;
0931 }
0932 
0933 /*
0934  * Limitations:
0935  * - Updating both duty and period is not done atomically, so the output signal
0936  *   will momentarily be a mix of the settings.
0937  * - Changed parameters takes effect immediately.
0938  * - A disabled channel outputs a logical 0.
0939  */
0940 static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
0941              const struct pwm_state *state)
0942 {
0943     struct lpg *lpg = container_of(chip, struct lpg, pwm);
0944     struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
0945     int ret = 0;
0946 
0947     if (state->polarity != PWM_POLARITY_NORMAL)
0948         return -EINVAL;
0949 
0950     mutex_lock(&lpg->lock);
0951 
0952     if (state->enabled) {
0953         ret = lpg_calc_freq(chan, state->period);
0954         if (ret < 0)
0955             goto out_unlock;
0956 
0957         lpg_calc_duty(chan, state->duty_cycle);
0958     }
0959     chan->enabled = state->enabled;
0960 
0961     lpg_apply(chan);
0962 
0963     triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0);
0964 
0965 out_unlock:
0966     mutex_unlock(&lpg->lock);
0967 
0968     return ret;
0969 }
0970 
0971 static void lpg_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
0972                   struct pwm_state *state)
0973 {
0974     struct lpg *lpg = container_of(chip, struct lpg, pwm);
0975     struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
0976     unsigned int pre_div;
0977     unsigned int refclk;
0978     unsigned int val;
0979     unsigned int m;
0980     u16 pwm_value;
0981     int ret;
0982 
0983     ret = regmap_read(lpg->map, chan->base + LPG_SIZE_CLK_REG, &val);
0984     if (ret)
0985         return;
0986 
0987     refclk = lpg_clk_rates[val & PWM_CLK_SELECT_MASK];
0988     if (refclk) {
0989         ret = regmap_read(lpg->map, chan->base + LPG_PREDIV_CLK_REG, &val);
0990         if (ret)
0991             return;
0992 
0993         pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)];
0994         m = FIELD_GET(PWM_FREQ_EXP_MASK, val);
0995 
0996         ret = regmap_bulk_read(lpg->map, chan->base + PWM_VALUE_REG, &pwm_value, sizeof(pwm_value));
0997         if (ret)
0998             return;
0999 
1000         state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * LPG_RESOLUTION * pre_div * (1 << m), refclk);
1001         state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk);
1002     } else {
1003         state->period = 0;
1004         state->duty_cycle = 0;
1005     }
1006 
1007     ret = regmap_read(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, &val);
1008     if (ret)
1009         return;
1010 
1011     state->enabled = FIELD_GET(LPG_ENABLE_CONTROL_OUTPUT, val);
1012     state->polarity = PWM_POLARITY_NORMAL;
1013 
1014     if (state->duty_cycle > state->period)
1015         state->duty_cycle = state->period;
1016 }
1017 
1018 static const struct pwm_ops lpg_pwm_ops = {
1019     .request = lpg_pwm_request,
1020     .apply = lpg_pwm_apply,
1021     .get_state = lpg_pwm_get_state,
1022     .owner = THIS_MODULE,
1023 };
1024 
1025 static int lpg_add_pwm(struct lpg *lpg)
1026 {
1027     int ret;
1028 
1029     lpg->pwm.base = -1;
1030     lpg->pwm.dev = lpg->dev;
1031     lpg->pwm.npwm = lpg->num_channels;
1032     lpg->pwm.ops = &lpg_pwm_ops;
1033 
1034     ret = pwmchip_add(&lpg->pwm);
1035     if (ret)
1036         dev_err(lpg->dev, "failed to add PWM chip: ret %d\n", ret);
1037 
1038     return ret;
1039 }
1040 
1041 static int lpg_parse_channel(struct lpg *lpg, struct device_node *np,
1042                  struct lpg_channel **channel)
1043 {
1044     struct lpg_channel *chan;
1045     u32 color = LED_COLOR_ID_GREEN;
1046     u32 reg;
1047     int ret;
1048 
1049     ret = of_property_read_u32(np, "reg", &reg);
1050     if (ret || !reg || reg > lpg->num_channels) {
1051         dev_err(lpg->dev, "invalid \"reg\" of %pOFn\n", np);
1052         return -EINVAL;
1053     }
1054 
1055     chan = &lpg->channels[reg - 1];
1056     chan->in_use = true;
1057 
1058     ret = of_property_read_u32(np, "color", &color);
1059     if (ret < 0 && ret != -EINVAL) {
1060         dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1061         return ret;
1062     }
1063 
1064     chan->color = color;
1065 
1066     *channel = chan;
1067 
1068     return 0;
1069 }
1070 
1071 static int lpg_add_led(struct lpg *lpg, struct device_node *np)
1072 {
1073     struct led_init_data init_data = {};
1074     struct led_classdev *cdev;
1075     struct device_node *child;
1076     struct mc_subled *info;
1077     struct lpg_led *led;
1078     const char *state;
1079     int num_channels;
1080     u32 color = 0;
1081     int ret;
1082     int i;
1083 
1084     ret = of_property_read_u32(np, "color", &color);
1085     if (ret < 0 && ret != -EINVAL) {
1086         dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1087         return ret;
1088     }
1089 
1090     if (color == LED_COLOR_ID_RGB)
1091         num_channels = of_get_available_child_count(np);
1092     else
1093         num_channels = 1;
1094 
1095     led = devm_kzalloc(lpg->dev, struct_size(led, channels, num_channels), GFP_KERNEL);
1096     if (!led)
1097         return -ENOMEM;
1098 
1099     led->lpg = lpg;
1100     led->num_channels = num_channels;
1101 
1102     if (color == LED_COLOR_ID_RGB) {
1103         info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL);
1104         if (!info)
1105             return -ENOMEM;
1106         i = 0;
1107         for_each_available_child_of_node(np, child) {
1108             ret = lpg_parse_channel(lpg, child, &led->channels[i]);
1109             if (ret < 0)
1110                 return ret;
1111 
1112             info[i].color_index = led->channels[i]->color;
1113             info[i].intensity = 0;
1114             i++;
1115         }
1116 
1117         led->mcdev.subled_info = info;
1118         led->mcdev.num_colors = num_channels;
1119 
1120         cdev = &led->mcdev.led_cdev;
1121         cdev->brightness_set = lpg_brightness_mc_set;
1122         cdev->blink_set = lpg_blink_mc_set;
1123 
1124         /* Register pattern accessors only if we have a LUT block */
1125         if (lpg->lut_base) {
1126             cdev->pattern_set = lpg_pattern_mc_set;
1127             cdev->pattern_clear = lpg_pattern_mc_clear;
1128         }
1129     } else {
1130         ret = lpg_parse_channel(lpg, np, &led->channels[0]);
1131         if (ret < 0)
1132             return ret;
1133 
1134         cdev = &led->cdev;
1135         cdev->brightness_set = lpg_brightness_single_set;
1136         cdev->blink_set = lpg_blink_single_set;
1137 
1138         /* Register pattern accessors only if we have a LUT block */
1139         if (lpg->lut_base) {
1140             cdev->pattern_set = lpg_pattern_single_set;
1141             cdev->pattern_clear = lpg_pattern_single_clear;
1142         }
1143     }
1144 
1145     cdev->default_trigger = of_get_property(np, "linux,default-trigger", NULL);
1146     cdev->max_brightness = LPG_RESOLUTION - 1;
1147 
1148     if (!of_property_read_string(np, "default-state", &state) &&
1149         !strcmp(state, "on"))
1150         cdev->brightness = cdev->max_brightness;
1151     else
1152         cdev->brightness = LED_OFF;
1153 
1154     cdev->brightness_set(cdev, cdev->brightness);
1155 
1156     init_data.fwnode = of_fwnode_handle(np);
1157 
1158     if (color == LED_COLOR_ID_RGB)
1159         ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data);
1160     else
1161         ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data);
1162     if (ret)
1163         dev_err(lpg->dev, "unable to register %s\n", cdev->name);
1164 
1165     return ret;
1166 }
1167 
1168 static int lpg_init_channels(struct lpg *lpg)
1169 {
1170     const struct lpg_data *data = lpg->data;
1171     struct lpg_channel *chan;
1172     int i;
1173 
1174     lpg->num_channels = data->num_channels;
1175     lpg->channels = devm_kcalloc(lpg->dev, data->num_channels,
1176                      sizeof(struct lpg_channel), GFP_KERNEL);
1177     if (!lpg->channels)
1178         return -ENOMEM;
1179 
1180     for (i = 0; i < data->num_channels; i++) {
1181         chan = &lpg->channels[i];
1182 
1183         chan->lpg = lpg;
1184         chan->base = data->channels[i].base;
1185         chan->triled_mask = data->channels[i].triled_mask;
1186         chan->lut_mask = BIT(i);
1187 
1188         regmap_read(lpg->map, chan->base + LPG_SUBTYPE_REG, &chan->subtype);
1189     }
1190 
1191     return 0;
1192 }
1193 
1194 static int lpg_init_triled(struct lpg *lpg)
1195 {
1196     struct device_node *np = lpg->dev->of_node;
1197     int ret;
1198 
1199     /* Skip initialization if we don't have a triled block */
1200     if (!lpg->data->triled_base)
1201         return 0;
1202 
1203     lpg->triled_base = lpg->data->triled_base;
1204     lpg->triled_has_atc_ctl = lpg->data->triled_has_atc_ctl;
1205     lpg->triled_has_src_sel = lpg->data->triled_has_src_sel;
1206 
1207     if (lpg->triled_has_src_sel) {
1208         ret = of_property_read_u32(np, "qcom,power-source", &lpg->triled_src);
1209         if (ret || lpg->triled_src == 2 || lpg->triled_src > 3) {
1210             dev_err(lpg->dev, "invalid power source\n");
1211             return -EINVAL;
1212         }
1213     }
1214 
1215     /* Disable automatic trickle charge LED */
1216     if (lpg->triled_has_atc_ctl)
1217         regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0);
1218 
1219     /* Configure power source */
1220     if (lpg->triled_has_src_sel)
1221         regmap_write(lpg->map, lpg->triled_base + TRI_LED_SRC_SEL, lpg->triled_src);
1222 
1223     /* Default all outputs to off */
1224     regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0);
1225 
1226     return 0;
1227 }
1228 
1229 static int lpg_init_lut(struct lpg *lpg)
1230 {
1231     const struct lpg_data *data = lpg->data;
1232 
1233     if (!data->lut_base)
1234         return 0;
1235 
1236     lpg->lut_base = data->lut_base;
1237     lpg->lut_size = data->lut_size;
1238 
1239     lpg->lut_bitmap = devm_bitmap_zalloc(lpg->dev, lpg->lut_size, GFP_KERNEL);
1240     if (!lpg->lut_bitmap)
1241         return -ENOMEM;
1242 
1243     return 0;
1244 }
1245 
1246 static int lpg_probe(struct platform_device *pdev)
1247 {
1248     struct device_node *np;
1249     struct lpg *lpg;
1250     int ret;
1251     int i;
1252 
1253     lpg = devm_kzalloc(&pdev->dev, sizeof(*lpg), GFP_KERNEL);
1254     if (!lpg)
1255         return -ENOMEM;
1256 
1257     lpg->data = of_device_get_match_data(&pdev->dev);
1258     if (!lpg->data)
1259         return -EINVAL;
1260 
1261     platform_set_drvdata(pdev, lpg);
1262 
1263     lpg->dev = &pdev->dev;
1264     mutex_init(&lpg->lock);
1265 
1266     lpg->map = dev_get_regmap(pdev->dev.parent, NULL);
1267     if (!lpg->map)
1268         return dev_err_probe(&pdev->dev, -ENXIO, "parent regmap unavailable\n");
1269 
1270     ret = lpg_init_channels(lpg);
1271     if (ret < 0)
1272         return ret;
1273 
1274     ret = lpg_parse_dtest(lpg);
1275     if (ret < 0)
1276         return ret;
1277 
1278     ret = lpg_init_triled(lpg);
1279     if (ret < 0)
1280         return ret;
1281 
1282     ret = lpg_init_lut(lpg);
1283     if (ret < 0)
1284         return ret;
1285 
1286     for_each_available_child_of_node(pdev->dev.of_node, np) {
1287         ret = lpg_add_led(lpg, np);
1288         if (ret)
1289             return ret;
1290     }
1291 
1292     for (i = 0; i < lpg->num_channels; i++)
1293         lpg_apply_dtest(&lpg->channels[i]);
1294 
1295     return lpg_add_pwm(lpg);
1296 }
1297 
1298 static int lpg_remove(struct platform_device *pdev)
1299 {
1300     struct lpg *lpg = platform_get_drvdata(pdev);
1301 
1302     pwmchip_remove(&lpg->pwm);
1303 
1304     return 0;
1305 }
1306 
1307 static const struct lpg_data pm8916_pwm_data = {
1308     .num_channels = 1,
1309     .channels = (const struct lpg_channel_data[]) {
1310         { .base = 0xbc00 },
1311     },
1312 };
1313 
1314 static const struct lpg_data pm8941_lpg_data = {
1315     .lut_base = 0xb000,
1316     .lut_size = 64,
1317 
1318     .triled_base = 0xd000,
1319     .triled_has_atc_ctl = true,
1320     .triled_has_src_sel = true,
1321 
1322     .num_channels = 8,
1323     .channels = (const struct lpg_channel_data[]) {
1324         { .base = 0xb100 },
1325         { .base = 0xb200 },
1326         { .base = 0xb300 },
1327         { .base = 0xb400 },
1328         { .base = 0xb500, .triled_mask = BIT(5) },
1329         { .base = 0xb600, .triled_mask = BIT(6) },
1330         { .base = 0xb700, .triled_mask = BIT(7) },
1331         { .base = 0xb800 },
1332     },
1333 };
1334 
1335 static const struct lpg_data pm8994_lpg_data = {
1336     .lut_base = 0xb000,
1337     .lut_size = 64,
1338 
1339     .num_channels = 6,
1340     .channels = (const struct lpg_channel_data[]) {
1341         { .base = 0xb100 },
1342         { .base = 0xb200 },
1343         { .base = 0xb300 },
1344         { .base = 0xb400 },
1345         { .base = 0xb500 },
1346         { .base = 0xb600 },
1347     },
1348 };
1349 
1350 static const struct lpg_data pmi8994_lpg_data = {
1351     .lut_base = 0xb000,
1352     .lut_size = 24,
1353 
1354     .triled_base = 0xd000,
1355     .triled_has_atc_ctl = true,
1356     .triled_has_src_sel = true,
1357 
1358     .num_channels = 4,
1359     .channels = (const struct lpg_channel_data[]) {
1360         { .base = 0xb100, .triled_mask = BIT(5) },
1361         { .base = 0xb200, .triled_mask = BIT(6) },
1362         { .base = 0xb300, .triled_mask = BIT(7) },
1363         { .base = 0xb400 },
1364     },
1365 };
1366 
1367 static const struct lpg_data pmi8998_lpg_data = {
1368     .lut_base = 0xb000,
1369     .lut_size = 49,
1370 
1371     .triled_base = 0xd000,
1372 
1373     .num_channels = 6,
1374     .channels = (const struct lpg_channel_data[]) {
1375         { .base = 0xb100 },
1376         { .base = 0xb200 },
1377         { .base = 0xb300, .triled_mask = BIT(5) },
1378         { .base = 0xb400, .triled_mask = BIT(6) },
1379         { .base = 0xb500, .triled_mask = BIT(7) },
1380         { .base = 0xb600 },
1381     },
1382 };
1383 
1384 static const struct lpg_data pm8150b_lpg_data = {
1385     .lut_base = 0xb000,
1386     .lut_size = 24,
1387 
1388     .triled_base = 0xd000,
1389 
1390     .num_channels = 2,
1391     .channels = (const struct lpg_channel_data[]) {
1392         { .base = 0xb100, .triled_mask = BIT(7) },
1393         { .base = 0xb200, .triled_mask = BIT(6) },
1394     },
1395 };
1396 
1397 static const struct lpg_data pm8150l_lpg_data = {
1398     .lut_base = 0xb000,
1399     .lut_size = 48,
1400 
1401     .triled_base = 0xd000,
1402 
1403     .num_channels = 5,
1404     .channels = (const struct lpg_channel_data[]) {
1405         { .base = 0xb100, .triled_mask = BIT(7) },
1406         { .base = 0xb200, .triled_mask = BIT(6) },
1407         { .base = 0xb300, .triled_mask = BIT(5) },
1408         { .base = 0xbc00 },
1409         { .base = 0xbd00 },
1410 
1411     },
1412 };
1413 
1414 static const struct lpg_data pm8350c_pwm_data = {
1415     .triled_base = 0xef00,
1416 
1417     .num_channels = 4,
1418     .channels = (const struct lpg_channel_data[]) {
1419         { .base = 0xe800, .triled_mask = BIT(7) },
1420         { .base = 0xe900, .triled_mask = BIT(6) },
1421         { .base = 0xea00, .triled_mask = BIT(5) },
1422         { .base = 0xeb00 },
1423     },
1424 };
1425 
1426 static const struct of_device_id lpg_of_table[] = {
1427     { .compatible = "qcom,pm8150b-lpg", .data = &pm8150b_lpg_data },
1428     { .compatible = "qcom,pm8150l-lpg", .data = &pm8150l_lpg_data },
1429     { .compatible = "qcom,pm8350c-pwm", .data = &pm8350c_pwm_data },
1430     { .compatible = "qcom,pm8916-pwm", .data = &pm8916_pwm_data },
1431     { .compatible = "qcom,pm8941-lpg", .data = &pm8941_lpg_data },
1432     { .compatible = "qcom,pm8994-lpg", .data = &pm8994_lpg_data },
1433     { .compatible = "qcom,pmi8994-lpg", .data = &pmi8994_lpg_data },
1434     { .compatible = "qcom,pmi8998-lpg", .data = &pmi8998_lpg_data },
1435     { .compatible = "qcom,pmc8180c-lpg", .data = &pm8150l_lpg_data },
1436     {}
1437 };
1438 MODULE_DEVICE_TABLE(of, lpg_of_table);
1439 
1440 static struct platform_driver lpg_driver = {
1441     .probe = lpg_probe,
1442     .remove = lpg_remove,
1443     .driver = {
1444         .name = "qcom-spmi-lpg",
1445         .of_match_table = lpg_of_table,
1446     },
1447 };
1448 module_platform_driver(lpg_driver);
1449 
1450 MODULE_DESCRIPTION("Qualcomm LPG LED driver");
1451 MODULE_LICENSE("GPL v2");
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