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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * LP5521 LED chip driver.
0004  *
0005  * Copyright (C) 2010 Nokia Corporation
0006  * Copyright (C) 2012 Texas Instruments
0007  *
0008  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
0009  *          Milo(Woogyom) Kim <milo.kim@ti.com>
0010  */
0011 
0012 #include <linux/delay.h>
0013 #include <linux/firmware.h>
0014 #include <linux/i2c.h>
0015 #include <linux/leds.h>
0016 #include <linux/module.h>
0017 #include <linux/mutex.h>
0018 #include <linux/platform_data/leds-lp55xx.h>
0019 #include <linux/slab.h>
0020 #include <linux/of.h>
0021 
0022 #include "leds-lp55xx-common.h"
0023 
0024 #define LP5521_PROGRAM_LENGTH       32
0025 #define LP5521_MAX_LEDS         3
0026 #define LP5521_CMD_DIRECT       0x3F
0027 
0028 /* Registers */
0029 #define LP5521_REG_ENABLE       0x00
0030 #define LP5521_REG_OP_MODE      0x01
0031 #define LP5521_REG_R_PWM        0x02
0032 #define LP5521_REG_G_PWM        0x03
0033 #define LP5521_REG_B_PWM        0x04
0034 #define LP5521_REG_R_CURRENT        0x05
0035 #define LP5521_REG_G_CURRENT        0x06
0036 #define LP5521_REG_B_CURRENT        0x07
0037 #define LP5521_REG_CONFIG       0x08
0038 #define LP5521_REG_STATUS       0x0C
0039 #define LP5521_REG_RESET        0x0D
0040 #define LP5521_REG_R_PROG_MEM       0x10
0041 #define LP5521_REG_G_PROG_MEM       0x30
0042 #define LP5521_REG_B_PROG_MEM       0x50
0043 
0044 /* Base register to set LED current */
0045 #define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
0046 /* Base register to set the brightness */
0047 #define LP5521_REG_LED_PWM_BASE     LP5521_REG_R_PWM
0048 
0049 /* Bits in ENABLE register */
0050 #define LP5521_MASTER_ENABLE        0x40    /* Chip master enable */
0051 #define LP5521_LOGARITHMIC_PWM      0x80    /* Logarithmic PWM adjustment */
0052 #define LP5521_EXEC_RUN         0x2A
0053 #define LP5521_ENABLE_DEFAULT   \
0054     (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
0055 #define LP5521_ENABLE_RUN_PROGRAM   \
0056     (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
0057 
0058 /* CONFIG register */
0059 #define LP5521_PWM_HF           0x40    /* PWM: 0 = 256Hz, 1 = 558Hz */
0060 #define LP5521_PWRSAVE_EN       0x20    /* 1 = Power save mode */
0061 #define LP5521_CP_MODE_OFF      0   /* Charge pump (CP) off */
0062 #define LP5521_CP_MODE_BYPASS       8   /* CP forced to bypass mode */
0063 #define LP5521_CP_MODE_1X5      0x10    /* CP forced to 1.5x mode */
0064 #define LP5521_CP_MODE_AUTO     0x18    /* Automatic mode selection */
0065 #define LP5521_R_TO_BATT        0x04    /* R out: 0 = CP, 1 = Vbat */
0066 #define LP5521_CLK_INT          0x01    /* Internal clock */
0067 #define LP5521_DEFAULT_CFG      \
0068     (LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)
0069 
0070 /* Status */
0071 #define LP5521_EXT_CLK_USED     0x08
0072 
0073 /* default R channel current register value */
0074 #define LP5521_REG_R_CURR_DEFAULT   0xAF
0075 
0076 /* Reset register value */
0077 #define LP5521_RESET            0xFF
0078 
0079 /* Program Memory Operations */
0080 #define LP5521_MODE_R_M         0x30    /* Operation Mode Register */
0081 #define LP5521_MODE_G_M         0x0C
0082 #define LP5521_MODE_B_M         0x03
0083 #define LP5521_LOAD_R           0x10
0084 #define LP5521_LOAD_G           0x04
0085 #define LP5521_LOAD_B           0x01
0086 
0087 #define LP5521_R_IS_LOADING(mode)   \
0088     ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
0089 #define LP5521_G_IS_LOADING(mode)   \
0090     ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
0091 #define LP5521_B_IS_LOADING(mode)   \
0092     ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
0093 
0094 #define LP5521_EXEC_R_M         0x30    /* Enable Register */
0095 #define LP5521_EXEC_G_M         0x0C
0096 #define LP5521_EXEC_B_M         0x03
0097 #define LP5521_EXEC_M           0x3F
0098 #define LP5521_RUN_R            0x20
0099 #define LP5521_RUN_G            0x08
0100 #define LP5521_RUN_B            0x02
0101 
0102 static inline void lp5521_wait_opmode_done(void)
0103 {
0104     /* operation mode change needs to be longer than 153 us */
0105     usleep_range(200, 300);
0106 }
0107 
0108 static inline void lp5521_wait_enable_done(void)
0109 {
0110     /* it takes more 488 us to update ENABLE register */
0111     usleep_range(500, 600);
0112 }
0113 
0114 static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
0115 {
0116     led->led_current = led_current;
0117     lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
0118         led_current);
0119 }
0120 
0121 static void lp5521_load_engine(struct lp55xx_chip *chip)
0122 {
0123     enum lp55xx_engine_index idx = chip->engine_idx;
0124     static const u8 mask[] = {
0125         [LP55XX_ENGINE_1] = LP5521_MODE_R_M,
0126         [LP55XX_ENGINE_2] = LP5521_MODE_G_M,
0127         [LP55XX_ENGINE_3] = LP5521_MODE_B_M,
0128     };
0129 
0130     static const u8 val[] = {
0131         [LP55XX_ENGINE_1] = LP5521_LOAD_R,
0132         [LP55XX_ENGINE_2] = LP5521_LOAD_G,
0133         [LP55XX_ENGINE_3] = LP5521_LOAD_B,
0134     };
0135 
0136     lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
0137 
0138     lp5521_wait_opmode_done();
0139 }
0140 
0141 static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
0142 {
0143     lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
0144     lp5521_wait_opmode_done();
0145 }
0146 
0147 static void lp5521_stop_engine(struct lp55xx_chip *chip)
0148 {
0149     enum lp55xx_engine_index idx = chip->engine_idx;
0150     static const u8 mask[] = {
0151         [LP55XX_ENGINE_1] = LP5521_MODE_R_M,
0152         [LP55XX_ENGINE_2] = LP5521_MODE_G_M,
0153         [LP55XX_ENGINE_3] = LP5521_MODE_B_M,
0154     };
0155 
0156     lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
0157 
0158     lp5521_wait_opmode_done();
0159 }
0160 
0161 static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
0162 {
0163     int ret;
0164     u8 mode;
0165     u8 exec;
0166 
0167     /* stop engine */
0168     if (!start) {
0169         lp5521_stop_engine(chip);
0170         lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
0171         lp5521_wait_opmode_done();
0172         return;
0173     }
0174 
0175     /*
0176      * To run the engine,
0177      * operation mode and enable register should updated at the same time
0178      */
0179 
0180     ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
0181     if (ret)
0182         return;
0183 
0184     ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
0185     if (ret)
0186         return;
0187 
0188     /* change operation mode to RUN only when each engine is loading */
0189     if (LP5521_R_IS_LOADING(mode)) {
0190         mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
0191         exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
0192     }
0193 
0194     if (LP5521_G_IS_LOADING(mode)) {
0195         mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
0196         exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
0197     }
0198 
0199     if (LP5521_B_IS_LOADING(mode)) {
0200         mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
0201         exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
0202     }
0203 
0204     lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
0205     lp5521_wait_opmode_done();
0206 
0207     lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
0208     lp5521_wait_enable_done();
0209 }
0210 
0211 static int lp5521_update_program_memory(struct lp55xx_chip *chip,
0212                     const u8 *data, size_t size)
0213 {
0214     enum lp55xx_engine_index idx = chip->engine_idx;
0215     u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
0216     static const u8 addr[] = {
0217         [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
0218         [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
0219         [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
0220     };
0221     unsigned cmd;
0222     char c[3];
0223     int nrchars;
0224     int ret;
0225     int offset = 0;
0226     int i = 0;
0227 
0228     while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
0229         /* separate sscanfs because length is working only for %s */
0230         ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
0231         if (ret != 1)
0232             goto err;
0233 
0234         ret = sscanf(c, "%2x", &cmd);
0235         if (ret != 1)
0236             goto err;
0237 
0238         pattern[i] = (u8)cmd;
0239         offset += nrchars;
0240         i++;
0241     }
0242 
0243     /* Each instruction is 16bit long. Check that length is even */
0244     if (i % 2)
0245         goto err;
0246 
0247     for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
0248         ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
0249         if (ret)
0250             return -EINVAL;
0251     }
0252 
0253     return size;
0254 
0255 err:
0256     dev_err(&chip->cl->dev, "wrong pattern format\n");
0257     return -EINVAL;
0258 }
0259 
0260 static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
0261 {
0262     const struct firmware *fw = chip->fw;
0263 
0264     if (fw->size > LP5521_PROGRAM_LENGTH) {
0265         dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
0266             fw->size);
0267         return;
0268     }
0269 
0270     /*
0271      * Program memory sequence
0272      *  1) set engine mode to "LOAD"
0273      *  2) write firmware data into program memory
0274      */
0275 
0276     lp5521_load_engine(chip);
0277     lp5521_update_program_memory(chip, fw->data, fw->size);
0278 }
0279 
0280 static int lp5521_post_init_device(struct lp55xx_chip *chip)
0281 {
0282     int ret;
0283     u8 val;
0284 
0285     /*
0286      * Make sure that the chip is reset by reading back the r channel
0287      * current reg. This is dummy read is required on some platforms -
0288      * otherwise further access to the R G B channels in the
0289      * LP5521_REG_ENABLE register will not have any effect - strange!
0290      */
0291     ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
0292     if (ret) {
0293         dev_err(&chip->cl->dev, "error in resetting chip\n");
0294         return ret;
0295     }
0296     if (val != LP5521_REG_R_CURR_DEFAULT) {
0297         dev_err(&chip->cl->dev,
0298             "unexpected data in register (expected 0x%x got 0x%x)\n",
0299             LP5521_REG_R_CURR_DEFAULT, val);
0300         ret = -EINVAL;
0301         return ret;
0302     }
0303     usleep_range(10000, 20000);
0304 
0305     /* Set all PWMs to direct control mode */
0306     ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
0307 
0308     /* Update configuration for the clock setting */
0309     val = LP5521_DEFAULT_CFG;
0310     if (!lp55xx_is_extclk_used(chip))
0311         val |= LP5521_CLK_INT;
0312 
0313     ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
0314     if (ret)
0315         return ret;
0316 
0317     /* Initialize all channels PWM to zero -> leds off */
0318     lp55xx_write(chip, LP5521_REG_R_PWM, 0);
0319     lp55xx_write(chip, LP5521_REG_G_PWM, 0);
0320     lp55xx_write(chip, LP5521_REG_B_PWM, 0);
0321 
0322     /* Set engines are set to run state when OP_MODE enables engines */
0323     ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
0324     if (ret)
0325         return ret;
0326 
0327     lp5521_wait_enable_done();
0328 
0329     return 0;
0330 }
0331 
0332 static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
0333 {
0334     struct lp55xx_platform_data *pdata = chip->pdata;
0335     int ret;
0336     u8 status;
0337 
0338     ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
0339     if (ret < 0)
0340         return ret;
0341 
0342     if (pdata->clock_mode != LP55XX_CLOCK_EXT)
0343         return 0;
0344 
0345     /* Check that ext clock is really in use if requested */
0346     if  ((status & LP5521_EXT_CLK_USED) == 0)
0347         return -EIO;
0348 
0349     return 0;
0350 }
0351 
0352 static int lp5521_multicolor_brightness(struct lp55xx_led *led)
0353 {
0354     struct lp55xx_chip *chip = led->chip;
0355     int ret;
0356     int i;
0357 
0358     mutex_lock(&chip->lock);
0359     for (i = 0; i < led->mc_cdev.num_colors; i++) {
0360         ret = lp55xx_write(chip,
0361                    LP5521_REG_LED_PWM_BASE +
0362                    led->mc_cdev.subled_info[i].channel,
0363                    led->mc_cdev.subled_info[i].brightness);
0364         if (ret)
0365             break;
0366     }
0367     mutex_unlock(&chip->lock);
0368     return ret;
0369 }
0370 
0371 static int lp5521_led_brightness(struct lp55xx_led *led)
0372 {
0373     struct lp55xx_chip *chip = led->chip;
0374     int ret;
0375 
0376     mutex_lock(&chip->lock);
0377     ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
0378         led->brightness);
0379     mutex_unlock(&chip->lock);
0380 
0381     return ret;
0382 }
0383 
0384 static ssize_t show_engine_mode(struct device *dev,
0385                 struct device_attribute *attr,
0386                 char *buf, int nr)
0387 {
0388     struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
0389     struct lp55xx_chip *chip = led->chip;
0390     enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
0391 
0392     switch (mode) {
0393     case LP55XX_ENGINE_RUN:
0394         return sprintf(buf, "run\n");
0395     case LP55XX_ENGINE_LOAD:
0396         return sprintf(buf, "load\n");
0397     case LP55XX_ENGINE_DISABLED:
0398     default:
0399         return sprintf(buf, "disabled\n");
0400     }
0401 }
0402 show_mode(1)
0403 show_mode(2)
0404 show_mode(3)
0405 
0406 static ssize_t store_engine_mode(struct device *dev,
0407                  struct device_attribute *attr,
0408                  const char *buf, size_t len, int nr)
0409 {
0410     struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
0411     struct lp55xx_chip *chip = led->chip;
0412     struct lp55xx_engine *engine = &chip->engines[nr - 1];
0413 
0414     mutex_lock(&chip->lock);
0415 
0416     chip->engine_idx = nr;
0417 
0418     if (!strncmp(buf, "run", 3)) {
0419         lp5521_run_engine(chip, true);
0420         engine->mode = LP55XX_ENGINE_RUN;
0421     } else if (!strncmp(buf, "load", 4)) {
0422         lp5521_stop_engine(chip);
0423         lp5521_load_engine(chip);
0424         engine->mode = LP55XX_ENGINE_LOAD;
0425     } else if (!strncmp(buf, "disabled", 8)) {
0426         lp5521_stop_engine(chip);
0427         engine->mode = LP55XX_ENGINE_DISABLED;
0428     }
0429 
0430     mutex_unlock(&chip->lock);
0431 
0432     return len;
0433 }
0434 store_mode(1)
0435 store_mode(2)
0436 store_mode(3)
0437 
0438 static ssize_t store_engine_load(struct device *dev,
0439                  struct device_attribute *attr,
0440                  const char *buf, size_t len, int nr)
0441 {
0442     struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
0443     struct lp55xx_chip *chip = led->chip;
0444     int ret;
0445 
0446     mutex_lock(&chip->lock);
0447 
0448     chip->engine_idx = nr;
0449     lp5521_load_engine(chip);
0450     ret = lp5521_update_program_memory(chip, buf, len);
0451 
0452     mutex_unlock(&chip->lock);
0453 
0454     return ret;
0455 }
0456 store_load(1)
0457 store_load(2)
0458 store_load(3)
0459 
0460 static ssize_t lp5521_selftest(struct device *dev,
0461                    struct device_attribute *attr,
0462                    char *buf)
0463 {
0464     struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
0465     struct lp55xx_chip *chip = led->chip;
0466     int ret;
0467 
0468     mutex_lock(&chip->lock);
0469     ret = lp5521_run_selftest(chip, buf);
0470     mutex_unlock(&chip->lock);
0471 
0472     return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
0473 }
0474 
0475 /* device attributes */
0476 static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
0477 static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
0478 static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
0479 static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
0480 static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
0481 static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
0482 static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
0483 
0484 static struct attribute *lp5521_attributes[] = {
0485     &dev_attr_engine1_mode.attr,
0486     &dev_attr_engine2_mode.attr,
0487     &dev_attr_engine3_mode.attr,
0488     &dev_attr_engine1_load.attr,
0489     &dev_attr_engine2_load.attr,
0490     &dev_attr_engine3_load.attr,
0491     &dev_attr_selftest.attr,
0492     NULL
0493 };
0494 
0495 static const struct attribute_group lp5521_group = {
0496     .attrs = lp5521_attributes,
0497 };
0498 
0499 /* Chip specific configurations */
0500 static struct lp55xx_device_config lp5521_cfg = {
0501     .reset = {
0502         .addr = LP5521_REG_RESET,
0503         .val  = LP5521_RESET,
0504     },
0505     .enable = {
0506         .addr = LP5521_REG_ENABLE,
0507         .val  = LP5521_ENABLE_DEFAULT,
0508     },
0509     .max_channel  = LP5521_MAX_LEDS,
0510     .post_init_device   = lp5521_post_init_device,
0511     .brightness_fn      = lp5521_led_brightness,
0512     .multicolor_brightness_fn = lp5521_multicolor_brightness,
0513     .set_led_current    = lp5521_set_led_current,
0514     .firmware_cb        = lp5521_firmware_loaded,
0515     .run_engine         = lp5521_run_engine,
0516     .dev_attr_group     = &lp5521_group,
0517 };
0518 
0519 static int lp5521_probe(struct i2c_client *client,
0520             const struct i2c_device_id *id)
0521 {
0522     int ret;
0523     struct lp55xx_chip *chip;
0524     struct lp55xx_led *led;
0525     struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
0526     struct device_node *np = dev_of_node(&client->dev);
0527 
0528     chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
0529     if (!chip)
0530         return -ENOMEM;
0531 
0532     chip->cfg = &lp5521_cfg;
0533 
0534     if (!pdata) {
0535         if (np) {
0536             pdata = lp55xx_of_populate_pdata(&client->dev, np,
0537                              chip);
0538             if (IS_ERR(pdata))
0539                 return PTR_ERR(pdata);
0540         } else {
0541             dev_err(&client->dev, "no platform data\n");
0542             return -EINVAL;
0543         }
0544     }
0545 
0546     led = devm_kcalloc(&client->dev,
0547             pdata->num_channels, sizeof(*led), GFP_KERNEL);
0548     if (!led)
0549         return -ENOMEM;
0550 
0551     chip->cl = client;
0552     chip->pdata = pdata;
0553 
0554     mutex_init(&chip->lock);
0555 
0556     i2c_set_clientdata(client, led);
0557 
0558     ret = lp55xx_init_device(chip);
0559     if (ret)
0560         goto err_init;
0561 
0562     dev_info(&client->dev, "%s programmable led chip found\n", id->name);
0563 
0564     ret = lp55xx_register_leds(led, chip);
0565     if (ret)
0566         goto err_out;
0567 
0568     ret = lp55xx_register_sysfs(chip);
0569     if (ret) {
0570         dev_err(&client->dev, "registering sysfs failed\n");
0571         goto err_out;
0572     }
0573 
0574     return 0;
0575 
0576 err_out:
0577     lp55xx_deinit_device(chip);
0578 err_init:
0579     return ret;
0580 }
0581 
0582 static int lp5521_remove(struct i2c_client *client)
0583 {
0584     struct lp55xx_led *led = i2c_get_clientdata(client);
0585     struct lp55xx_chip *chip = led->chip;
0586 
0587     lp5521_stop_all_engines(chip);
0588     lp55xx_unregister_sysfs(chip);
0589     lp55xx_deinit_device(chip);
0590 
0591     return 0;
0592 }
0593 
0594 static const struct i2c_device_id lp5521_id[] = {
0595     { "lp5521", 0 }, /* Three channel chip */
0596     { }
0597 };
0598 MODULE_DEVICE_TABLE(i2c, lp5521_id);
0599 
0600 #ifdef CONFIG_OF
0601 static const struct of_device_id of_lp5521_leds_match[] = {
0602     { .compatible = "national,lp5521", },
0603     {},
0604 };
0605 
0606 MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
0607 #endif
0608 static struct i2c_driver lp5521_driver = {
0609     .driver = {
0610         .name   = "lp5521",
0611         .of_match_table = of_match_ptr(of_lp5521_leds_match),
0612     },
0613     .probe      = lp5521_probe,
0614     .remove     = lp5521_remove,
0615     .id_table   = lp5521_id,
0616 };
0617 
0618 module_i2c_driver(lp5521_driver);
0619 
0620 MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
0621 MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
0622 MODULE_DESCRIPTION("LP5521 LED engine");
0623 MODULE_LICENSE("GPL v2");
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