Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright 2015-16 Golden Delicious Computers
0004  *
0005  * Author: Nikolaus Schaller <hns@goldelico.com>
0006  *
0007  * LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
0008  * effect LEDs.
0009  */
0010 
0011 #include <linux/err.h>
0012 #include <linux/i2c.h>
0013 #include <linux/leds.h>
0014 #include <linux/mod_devicetable.h>
0015 #include <linux/module.h>
0016 #include <linux/property.h>
0017 #include <linux/regmap.h>
0018 #include <linux/slab.h>
0019 #include <linux/delay.h>
0020 #include <linux/gpio/consumer.h>
0021 
0022 /* register numbers */
0023 #define IS31FL319X_SHUTDOWN     0x00
0024 
0025 /* registers for 3190, 3191 and 3193 */
0026 #define IS31FL3190_BREATHING        0x01
0027 #define IS31FL3190_LEDMODE      0x02
0028 #define IS31FL3190_CURRENT      0x03
0029 #define IS31FL3190_PWM(channel)     (0x04 + channel)
0030 #define IS31FL3190_DATA_UPDATE      0x07
0031 #define IS31FL3190_T0(channel)      (0x0a + channel)
0032 #define IS31FL3190_T1T2(channel)    (0x10 + channel)
0033 #define IS31FL3190_T3T4(channel)    (0x16 + channel)
0034 #define IS31FL3190_TIME_UPDATE      0x1c
0035 #define IS31FL3190_LEDCONTROL       0x1d
0036 #define IS31FL3190_RESET        0x2f
0037 
0038 #define IS31FL3190_CURRENT_uA_MIN   5000
0039 #define IS31FL3190_CURRENT_uA_DEFAULT   42000
0040 #define IS31FL3190_CURRENT_uA_MAX   42000
0041 #define IS31FL3190_CURRENT_MASK     GENMASK(4, 2)
0042 #define IS31FL3190_CURRENT_5_mA     0x02
0043 #define IS31FL3190_CURRENT_10_mA    0x01
0044 #define IS31FL3190_CURRENT_17dot5_mA    0x04
0045 #define IS31FL3190_CURRENT_30_mA    0x03
0046 #define IS31FL3190_CURRENT_42_mA    0x00
0047 
0048 /* registers for 3196 and 3199 */
0049 #define IS31FL3196_CTRL1        0x01
0050 #define IS31FL3196_CTRL2        0x02
0051 #define IS31FL3196_CONFIG1      0x03
0052 #define IS31FL3196_CONFIG2      0x04
0053 #define IS31FL3196_RAMP_MODE        0x05
0054 #define IS31FL3196_BREATH_MARK      0x06
0055 #define IS31FL3196_PWM(channel)     (0x07 + channel)
0056 #define IS31FL3196_DATA_UPDATE      0x10
0057 #define IS31FL3196_T0(channel)      (0x11 + channel)
0058 #define IS31FL3196_T123_1       0x1a
0059 #define IS31FL3196_T123_2       0x1b
0060 #define IS31FL3196_T123_3       0x1c
0061 #define IS31FL3196_T4(channel)      (0x1d + channel)
0062 #define IS31FL3196_TIME_UPDATE      0x26
0063 #define IS31FL3196_RESET        0xff
0064 
0065 #define IS31FL3196_REG_CNT      (IS31FL3196_RESET + 1)
0066 
0067 #define IS31FL319X_MAX_LEDS     9
0068 
0069 /* CS (Current Setting) in CONFIG2 register */
0070 #define IS31FL3196_CONFIG2_CS_SHIFT 4
0071 #define IS31FL3196_CONFIG2_CS_MASK  GENMASK(2, 0)
0072 #define IS31FL3196_CONFIG2_CS_STEP_REF  12
0073 
0074 #define IS31FL3196_CURRENT_uA_MIN   5000
0075 #define IS31FL3196_CURRENT_uA_MAX   40000
0076 #define IS31FL3196_CURRENT_uA_STEP  5000
0077 #define IS31FL3196_CURRENT_uA_DEFAULT   20000
0078 
0079 /* Audio gain in CONFIG2 register */
0080 #define IS31FL3196_AUDIO_GAIN_DB_MAX    ((u32)21)
0081 #define IS31FL3196_AUDIO_GAIN_DB_STEP   3
0082 
0083 /*
0084  * regmap is used as a cache of chip's register space,
0085  * to avoid reading back brightness values from chip,
0086  * which is known to hang.
0087  */
0088 struct is31fl319x_chip {
0089     const struct is31fl319x_chipdef *cdef;
0090     struct i2c_client               *client;
0091     struct gpio_desc        *shutdown_gpio;
0092     struct regmap                   *regmap;
0093     struct mutex                    lock;
0094     u32                             audio_gain_db;
0095 
0096     struct is31fl319x_led {
0097         struct is31fl319x_chip  *chip;
0098         struct led_classdev     cdev;
0099         u32                     max_microamp;
0100         bool                    configured;
0101     } leds[IS31FL319X_MAX_LEDS];
0102 };
0103 
0104 struct is31fl319x_chipdef {
0105     int num_leds;
0106     u8 reset_reg;
0107     const struct regmap_config *is31fl319x_regmap_config;
0108     int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brightness);
0109     u32 current_default;
0110     u32 current_min;
0111     u32 current_max;
0112     bool is_3196or3199;
0113 };
0114 
0115 static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
0116 {
0117     /* we have no readable registers */
0118     return false;
0119 }
0120 
0121 static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg)
0122 {
0123     /* volatile registers are not cached */
0124     switch (reg) {
0125     case IS31FL3190_DATA_UPDATE:
0126     case IS31FL3190_TIME_UPDATE:
0127     case IS31FL3190_RESET:
0128         return true; /* always write-through */
0129     default:
0130         return false;
0131     }
0132 }
0133 
0134 static const struct reg_default is31fl3190_reg_defaults[] = {
0135     { IS31FL3190_LEDMODE, 0x00 },
0136     { IS31FL3190_CURRENT, 0x00 },
0137     { IS31FL3190_PWM(0), 0x00 },
0138     { IS31FL3190_PWM(1), 0x00 },
0139     { IS31FL3190_PWM(2), 0x00 },
0140 };
0141 
0142 static struct regmap_config is31fl3190_regmap_config = {
0143     .reg_bits = 8,
0144     .val_bits = 8,
0145     .max_register = IS31FL3190_RESET,
0146     .cache_type = REGCACHE_FLAT,
0147     .readable_reg = is31fl319x_readable_reg,
0148     .volatile_reg = is31fl3190_volatile_reg,
0149     .reg_defaults = is31fl3190_reg_defaults,
0150     .num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults),
0151 };
0152 
0153 static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg)
0154 {
0155     /* volatile registers are not cached */
0156     switch (reg) {
0157     case IS31FL3196_DATA_UPDATE:
0158     case IS31FL3196_TIME_UPDATE:
0159     case IS31FL3196_RESET:
0160         return true; /* always write-through */
0161     default:
0162         return false;
0163     }
0164 }
0165 
0166 static const struct reg_default is31fl3196_reg_defaults[] = {
0167     { IS31FL3196_CONFIG1, 0x00 },
0168     { IS31FL3196_CONFIG2, 0x00 },
0169     { IS31FL3196_PWM(0), 0x00 },
0170     { IS31FL3196_PWM(1), 0x00 },
0171     { IS31FL3196_PWM(2), 0x00 },
0172     { IS31FL3196_PWM(3), 0x00 },
0173     { IS31FL3196_PWM(4), 0x00 },
0174     { IS31FL3196_PWM(5), 0x00 },
0175     { IS31FL3196_PWM(6), 0x00 },
0176     { IS31FL3196_PWM(7), 0x00 },
0177     { IS31FL3196_PWM(8), 0x00 },
0178 };
0179 
0180 static struct regmap_config is31fl3196_regmap_config = {
0181     .reg_bits = 8,
0182     .val_bits = 8,
0183     .max_register = IS31FL3196_REG_CNT,
0184     .cache_type = REGCACHE_FLAT,
0185     .readable_reg = is31fl319x_readable_reg,
0186     .volatile_reg = is31fl3196_volatile_reg,
0187     .reg_defaults = is31fl3196_reg_defaults,
0188     .num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults),
0189 };
0190 
0191 static int is31fl3190_brightness_set(struct led_classdev *cdev,
0192                      enum led_brightness brightness)
0193 {
0194     struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
0195     struct is31fl319x_chip *is31 = led->chip;
0196     int chan = led - is31->leds;
0197     int ret;
0198     int i;
0199     u8 ctrl = 0;
0200 
0201     dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
0202 
0203     mutex_lock(&is31->lock);
0204 
0205     /* update PWM register */
0206     ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness);
0207     if (ret < 0)
0208         goto out;
0209 
0210     /* read current brightness of all PWM channels */
0211     for (i = 0; i < is31->cdef->num_leds; i++) {
0212         unsigned int pwm_value;
0213         bool on;
0214 
0215         /*
0216          * since neither cdev nor the chip can provide
0217          * the current setting, we read from the regmap cache
0218          */
0219 
0220         ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value);
0221         on = ret >= 0 && pwm_value > LED_OFF;
0222 
0223         ctrl |= on << i;
0224     }
0225 
0226     if (ctrl > 0) {
0227         dev_dbg(&is31->client->dev, "power up %02x\n", ctrl);
0228         regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl);
0229         /* update PWMs */
0230         regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00);
0231         /* enable chip from shut down and enable all channels */
0232         ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20);
0233     } else {
0234         dev_dbg(&is31->client->dev, "power down\n");
0235         /* shut down (no need to clear LEDCONTROL) */
0236         ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
0237     }
0238 
0239 out:
0240     mutex_unlock(&is31->lock);
0241 
0242     return ret;
0243 }
0244 
0245 static int is31fl3196_brightness_set(struct led_classdev *cdev,
0246                      enum led_brightness brightness)
0247 {
0248     struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
0249     struct is31fl319x_chip *is31 = led->chip;
0250     int chan = led - is31->leds;
0251     int ret;
0252     int i;
0253     u8 ctrl1 = 0, ctrl2 = 0;
0254 
0255     dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
0256 
0257     mutex_lock(&is31->lock);
0258 
0259     /* update PWM register */
0260     ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness);
0261     if (ret < 0)
0262         goto out;
0263 
0264     /* read current brightness of all PWM channels */
0265     for (i = 0; i < is31->cdef->num_leds; i++) {
0266         unsigned int pwm_value;
0267         bool on;
0268 
0269         /*
0270          * since neither cdev nor the chip can provide
0271          * the current setting, we read from the regmap cache
0272          */
0273 
0274         ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value);
0275         on = ret >= 0 && pwm_value > LED_OFF;
0276 
0277         if (i < 3)
0278             ctrl1 |= on << i;       /* 0..2 => bit 0..2 */
0279         else if (i < 6)
0280             ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */
0281         else
0282             ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
0283     }
0284 
0285     if (ctrl1 > 0 || ctrl2 > 0) {
0286         dev_dbg(&is31->client->dev, "power up %02x %02x\n",
0287             ctrl1, ctrl2);
0288         regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1);
0289         regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2);
0290         /* update PWMs */
0291         regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00);
0292         /* enable chip from shut down */
0293         ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
0294     } else {
0295         dev_dbg(&is31->client->dev, "power down\n");
0296         /* shut down (no need to clear CTRL1/2) */
0297         ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
0298     }
0299 
0300 out:
0301     mutex_unlock(&is31->lock);
0302 
0303     return ret;
0304 }
0305 
0306 static const struct is31fl319x_chipdef is31fl3190_cdef = {
0307     .num_leds = 1,
0308     .reset_reg = IS31FL3190_RESET,
0309     .is31fl319x_regmap_config = &is31fl3190_regmap_config,
0310     .brightness_set = is31fl3190_brightness_set,
0311     .current_default = IS31FL3190_CURRENT_uA_DEFAULT,
0312     .current_min = IS31FL3190_CURRENT_uA_MIN,
0313     .current_max = IS31FL3190_CURRENT_uA_MAX,
0314     .is_3196or3199 = false,
0315 };
0316 
0317 static const struct is31fl319x_chipdef is31fl3193_cdef = {
0318     .num_leds = 3,
0319     .reset_reg = IS31FL3190_RESET,
0320     .is31fl319x_regmap_config = &is31fl3190_regmap_config,
0321     .brightness_set = is31fl3190_brightness_set,
0322     .current_default = IS31FL3190_CURRENT_uA_DEFAULT,
0323     .current_min = IS31FL3190_CURRENT_uA_MIN,
0324     .current_max = IS31FL3190_CURRENT_uA_MAX,
0325     .is_3196or3199 = false,
0326 };
0327 
0328 static const struct is31fl319x_chipdef is31fl3196_cdef = {
0329     .num_leds = 6,
0330     .reset_reg = IS31FL3196_RESET,
0331     .is31fl319x_regmap_config = &is31fl3196_regmap_config,
0332     .brightness_set = is31fl3196_brightness_set,
0333     .current_default = IS31FL3196_CURRENT_uA_DEFAULT,
0334     .current_min = IS31FL3196_CURRENT_uA_MIN,
0335     .current_max = IS31FL3196_CURRENT_uA_MAX,
0336     .is_3196or3199 = true,
0337 };
0338 
0339 static const struct is31fl319x_chipdef is31fl3199_cdef = {
0340     .num_leds = 9,
0341     .reset_reg = IS31FL3196_RESET,
0342     .is31fl319x_regmap_config = &is31fl3196_regmap_config,
0343     .brightness_set = is31fl3196_brightness_set,
0344     .current_default = IS31FL3196_CURRENT_uA_DEFAULT,
0345     .current_min = IS31FL3196_CURRENT_uA_MIN,
0346     .current_max = IS31FL3196_CURRENT_uA_MAX,
0347     .is_3196or3199 = true,
0348 };
0349 
0350 static const struct of_device_id of_is31fl319x_match[] = {
0351     { .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
0352     { .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
0353     { .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
0354     { .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
0355     { .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
0356     { .compatible = "si-en,sn3190",    .data = &is31fl3190_cdef, },
0357     { .compatible = "si-en,sn3191",    .data = &is31fl3190_cdef, },
0358     { .compatible = "si-en,sn3193",    .data = &is31fl3193_cdef, },
0359     { .compatible = "si-en,sn3196",    .data = &is31fl3196_cdef, },
0360     { .compatible = "si-en,sn3199",    .data = &is31fl3199_cdef, },
0361     { }
0362 };
0363 MODULE_DEVICE_TABLE(of, of_is31fl319x_match);
0364 
0365 static int is31fl319x_parse_child_fw(const struct device *dev,
0366                      const struct fwnode_handle *child,
0367                      struct is31fl319x_led *led,
0368                      struct is31fl319x_chip *is31)
0369 {
0370     struct led_classdev *cdev = &led->cdev;
0371     int ret;
0372 
0373     if (fwnode_property_read_string(child, "label", &cdev->name))
0374         cdev->name = fwnode_get_name(child);
0375 
0376     ret = fwnode_property_read_string(child, "linux,default-trigger", &cdev->default_trigger);
0377     if (ret < 0 && ret != -EINVAL) /* is optional */
0378         return ret;
0379 
0380     led->max_microamp = is31->cdef->current_default;
0381     ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp);
0382     if (!ret) {
0383         if (led->max_microamp < is31->cdef->current_min)
0384             return -EINVAL; /* not supported */
0385         led->max_microamp = min(led->max_microamp,
0386                     is31->cdef->current_max);
0387     }
0388 
0389     return 0;
0390 }
0391 
0392 static int is31fl319x_parse_fw(struct device *dev, struct is31fl319x_chip *is31)
0393 {
0394     struct fwnode_handle *fwnode = dev_fwnode(dev), *child;
0395     int count;
0396     int ret;
0397 
0398     is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
0399     if (IS_ERR(is31->shutdown_gpio))
0400         return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio),
0401                      "Failed to get shutdown gpio\n");
0402 
0403     is31->cdef = device_get_match_data(dev);
0404 
0405     count = 0;
0406     fwnode_for_each_available_child_node(fwnode, child)
0407         count++;
0408 
0409     dev_dbg(dev, "probing with %d leds defined in DT\n", count);
0410 
0411     if (!count || count > is31->cdef->num_leds)
0412         return dev_err_probe(dev, -ENODEV,
0413                      "Number of leds defined must be between 1 and %u\n",
0414                      is31->cdef->num_leds);
0415 
0416     fwnode_for_each_available_child_node(fwnode, child) {
0417         struct is31fl319x_led *led;
0418         u32 reg;
0419 
0420         ret = fwnode_property_read_u32(child, "reg", &reg);
0421         if (ret) {
0422             ret = dev_err_probe(dev, ret, "Failed to read led 'reg' property\n");
0423             goto put_child_node;
0424         }
0425 
0426         if (reg < 1 || reg > is31->cdef->num_leds) {
0427             ret = dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg);
0428             goto put_child_node;
0429         }
0430 
0431         led = &is31->leds[reg - 1];
0432 
0433         if (led->configured) {
0434             ret = dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg);
0435             goto put_child_node;
0436         }
0437 
0438         ret = is31fl319x_parse_child_fw(dev, child, led, is31);
0439         if (ret) {
0440             ret = dev_err_probe(dev, ret, "led %u DT parsing failed\n", reg);
0441             goto put_child_node;
0442         }
0443 
0444         led->configured = true;
0445     }
0446 
0447     is31->audio_gain_db = 0;
0448     if (is31->cdef->is_3196or3199) {
0449         ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db);
0450         if (!ret)
0451             is31->audio_gain_db = min(is31->audio_gain_db,
0452                           IS31FL3196_AUDIO_GAIN_DB_MAX);
0453     }
0454 
0455     return 0;
0456 
0457 put_child_node:
0458     fwnode_handle_put(child);
0459     return ret;
0460 }
0461 
0462 static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp)
0463 {
0464     switch (microamp) {
0465     case 5000:
0466         return IS31FL3190_CURRENT_5_mA;
0467     case 10000:
0468         return IS31FL3190_CURRENT_10_mA;
0469     case 17500:
0470         return IS31FL3190_CURRENT_17dot5_mA;
0471     case 30000:
0472         return IS31FL3190_CURRENT_30_mA;
0473     case 42000:
0474         return IS31FL3190_CURRENT_42_mA;
0475     default:
0476         dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp);
0477         return IS31FL3190_CURRENT_5_mA;
0478     }
0479 }
0480 
0481 static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp)
0482 {
0483     /* round down to nearest supported value (range check done by caller) */
0484     u32 step = microamp / IS31FL3196_CURRENT_uA_STEP;
0485 
0486     return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) &
0487         IS31FL3196_CONFIG2_CS_MASK) <<
0488         IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */
0489 }
0490 
0491 static inline int is31fl3196_db_to_gain(u32 dezibel)
0492 {
0493     /* round down to nearest supported value (range check done by caller) */
0494     return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP;
0495 }
0496 
0497 static int is31fl319x_probe(struct i2c_client *client)
0498 {
0499     struct is31fl319x_chip *is31;
0500     struct device *dev = &client->dev;
0501     int err;
0502     int i = 0;
0503     u32 aggregated_led_microamp;
0504 
0505     if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
0506         return -EIO;
0507 
0508     is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
0509     if (!is31)
0510         return -ENOMEM;
0511 
0512     mutex_init(&is31->lock);
0513     err = devm_add_action(dev, (void (*)(void *))mutex_destroy, &is31->lock);
0514     if (err)
0515         return err;
0516 
0517     err = is31fl319x_parse_fw(&client->dev, is31);
0518     if (err)
0519         return err;
0520 
0521     if (is31->shutdown_gpio) {
0522         gpiod_direction_output(is31->shutdown_gpio, 0);
0523         mdelay(5);
0524         gpiod_direction_output(is31->shutdown_gpio, 1);
0525     }
0526 
0527     is31->client = client;
0528     is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config);
0529     if (IS_ERR(is31->regmap))
0530         return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n");
0531 
0532     i2c_set_clientdata(client, is31);
0533 
0534     /* check for write-reply from chip (we can't read any registers) */
0535     err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00);
0536     if (err < 0)
0537         return dev_err_probe(dev, err, "no response from chip write\n");
0538 
0539     /*
0540      * Kernel conventions require per-LED led-max-microamp property.
0541      * But the chip does not allow to limit individual LEDs.
0542      * So we take minimum from all subnodes for safety of hardware.
0543      */
0544     aggregated_led_microamp = is31->cdef->current_max;
0545     for (i = 0; i < is31->cdef->num_leds; i++)
0546         if (is31->leds[i].configured &&
0547             is31->leds[i].max_microamp < aggregated_led_microamp)
0548             aggregated_led_microamp = is31->leds[i].max_microamp;
0549 
0550     if (is31->cdef->is_3196or3199)
0551         regmap_write(is31->regmap, IS31FL3196_CONFIG2,
0552                  is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) |
0553                  is31fl3196_db_to_gain(is31->audio_gain_db));
0554     else
0555         regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK,
0556                    is31fl3190_microamp_to_cs(dev, aggregated_led_microamp));
0557 
0558     for (i = 0; i < is31->cdef->num_leds; i++) {
0559         struct is31fl319x_led *led = &is31->leds[i];
0560 
0561         if (!led->configured)
0562             continue;
0563 
0564         led->chip = is31;
0565         led->cdev.brightness_set_blocking = is31->cdef->brightness_set;
0566 
0567         err = devm_led_classdev_register(&client->dev, &led->cdev);
0568         if (err < 0)
0569             return err;
0570     }
0571 
0572     return 0;
0573 }
0574 
0575 /*
0576  * i2c-core (and modalias) requires that id_table be properly filled,
0577  * even though it is not used for DeviceTree based instantiation.
0578  */
0579 static const struct i2c_device_id is31fl319x_id[] = {
0580     { "is31fl3190" },
0581     { "is31fl3191" },
0582     { "is31fl3193" },
0583     { "is31fl3196" },
0584     { "is31fl3199" },
0585     { "sn3190" },
0586     { "sn3191" },
0587     { "sn3193" },
0588     { "sn3196" },
0589     { "sn3199" },
0590     {},
0591 };
0592 MODULE_DEVICE_TABLE(i2c, is31fl319x_id);
0593 
0594 static struct i2c_driver is31fl319x_driver = {
0595     .driver   = {
0596         .name           = "leds-is31fl319x",
0597         .of_match_table = of_is31fl319x_match,
0598     },
0599     .probe_new = is31fl319x_probe,
0600     .id_table = is31fl319x_id,
0601 };
0602 
0603 module_i2c_driver(is31fl319x_driver);
0604 
0605 MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
0606 MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
0607 MODULE_DESCRIPTION("IS31FL319X LED driver");
0608 MODULE_LICENSE("GPL v2");