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0010 #include <linux/irq.h>
0011 #include <linux/bitops.h>
0012 #include <linux/module.h>
0013 #include <linux/moduleparam.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/irqdomain.h>
0016 #include <linux/irqchip.h>
0017 #include <linux/of.h>
0018 #include <linux/of_platform.h>
0019 #include <linux/mfd/syscon.h>
0020 #include <linux/regmap.h>
0021
0022
0023 #define BIT_OFS 4
0024 #define KEYSTONE_N_IRQ (32 - BIT_OFS)
0025
0026 struct keystone_irq_device {
0027 struct device *dev;
0028 struct irq_chip chip;
0029 u32 mask;
0030 int irq;
0031 struct irq_domain *irqd;
0032 struct regmap *devctrl_regs;
0033 u32 devctrl_offset;
0034 raw_spinlock_t wa_lock;
0035 };
0036
0037 static inline u32 keystone_irq_readl(struct keystone_irq_device *kirq)
0038 {
0039 int ret;
0040 u32 val = 0;
0041
0042 ret = regmap_read(kirq->devctrl_regs, kirq->devctrl_offset, &val);
0043 if (ret < 0)
0044 dev_dbg(kirq->dev, "irq read failed ret(%d)\n", ret);
0045 return val;
0046 }
0047
0048 static inline void
0049 keystone_irq_writel(struct keystone_irq_device *kirq, u32 value)
0050 {
0051 int ret;
0052
0053 ret = regmap_write(kirq->devctrl_regs, kirq->devctrl_offset, value);
0054 if (ret < 0)
0055 dev_dbg(kirq->dev, "irq write failed ret(%d)\n", ret);
0056 }
0057
0058 static void keystone_irq_setmask(struct irq_data *d)
0059 {
0060 struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
0061
0062 kirq->mask |= BIT(d->hwirq);
0063 dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask);
0064 }
0065
0066 static void keystone_irq_unmask(struct irq_data *d)
0067 {
0068 struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
0069
0070 kirq->mask &= ~BIT(d->hwirq);
0071 dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask);
0072 }
0073
0074 static void keystone_irq_ack(struct irq_data *d)
0075 {
0076
0077 }
0078
0079 static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq)
0080 {
0081 struct keystone_irq_device *kirq = keystone_irq;
0082 unsigned long wa_lock_flags;
0083 unsigned long pending;
0084 int src, err;
0085
0086 dev_dbg(kirq->dev, "start irq %d\n", irq);
0087
0088 pending = keystone_irq_readl(kirq);
0089 keystone_irq_writel(kirq, pending);
0090
0091 dev_dbg(kirq->dev, "pending 0x%lx, mask 0x%x\n", pending, kirq->mask);
0092
0093 pending = (pending >> BIT_OFS) & ~kirq->mask;
0094
0095 dev_dbg(kirq->dev, "pending after mask 0x%lx\n", pending);
0096
0097 for (src = 0; src < KEYSTONE_N_IRQ; src++) {
0098 if (BIT(src) & pending) {
0099 raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags);
0100 err = generic_handle_domain_irq(kirq->irqd, src);
0101 raw_spin_unlock_irqrestore(&kirq->wa_lock,
0102 wa_lock_flags);
0103
0104 if (err)
0105 dev_warn_ratelimited(kirq->dev, "spurious irq detected hwirq %d\n",
0106 src);
0107 }
0108 }
0109
0110 dev_dbg(kirq->dev, "end irq %d\n", irq);
0111 return IRQ_HANDLED;
0112 }
0113
0114 static int keystone_irq_map(struct irq_domain *h, unsigned int virq,
0115 irq_hw_number_t hw)
0116 {
0117 struct keystone_irq_device *kirq = h->host_data;
0118
0119 irq_set_chip_data(virq, kirq);
0120 irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq);
0121 irq_set_probe(virq);
0122 return 0;
0123 }
0124
0125 static const struct irq_domain_ops keystone_irq_ops = {
0126 .map = keystone_irq_map,
0127 .xlate = irq_domain_xlate_onecell,
0128 };
0129
0130 static int keystone_irq_probe(struct platform_device *pdev)
0131 {
0132 struct device *dev = &pdev->dev;
0133 struct device_node *np = dev->of_node;
0134 struct keystone_irq_device *kirq;
0135 int ret;
0136
0137 if (np == NULL)
0138 return -EINVAL;
0139
0140 kirq = devm_kzalloc(dev, sizeof(*kirq), GFP_KERNEL);
0141 if (!kirq)
0142 return -ENOMEM;
0143
0144 kirq->devctrl_regs =
0145 syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev");
0146 if (IS_ERR(kirq->devctrl_regs))
0147 return PTR_ERR(kirq->devctrl_regs);
0148
0149 ret = of_property_read_u32_index(np, "ti,syscon-dev", 1,
0150 &kirq->devctrl_offset);
0151 if (ret) {
0152 dev_err(dev, "couldn't read the devctrl_offset offset!\n");
0153 return ret;
0154 }
0155
0156 kirq->irq = platform_get_irq(pdev, 0);
0157 if (kirq->irq < 0)
0158 return kirq->irq;
0159
0160 kirq->dev = dev;
0161 kirq->mask = ~0x0;
0162 kirq->chip.name = "keystone-irq";
0163 kirq->chip.irq_ack = keystone_irq_ack;
0164 kirq->chip.irq_mask = keystone_irq_setmask;
0165 kirq->chip.irq_unmask = keystone_irq_unmask;
0166
0167 kirq->irqd = irq_domain_add_linear(np, KEYSTONE_N_IRQ,
0168 &keystone_irq_ops, kirq);
0169 if (!kirq->irqd) {
0170 dev_err(dev, "IRQ domain registration failed\n");
0171 return -ENODEV;
0172 }
0173
0174 raw_spin_lock_init(&kirq->wa_lock);
0175
0176 platform_set_drvdata(pdev, kirq);
0177
0178 ret = request_irq(kirq->irq, keystone_irq_handler,
0179 0, dev_name(dev), kirq);
0180 if (ret) {
0181 irq_domain_remove(kirq->irqd);
0182 return ret;
0183 }
0184
0185
0186 keystone_irq_writel(kirq, ~0x0);
0187
0188 dev_info(dev, "irqchip registered, nr_irqs %u\n", KEYSTONE_N_IRQ);
0189
0190 return 0;
0191 }
0192
0193 static int keystone_irq_remove(struct platform_device *pdev)
0194 {
0195 struct keystone_irq_device *kirq = platform_get_drvdata(pdev);
0196 int hwirq;
0197
0198 free_irq(kirq->irq, kirq);
0199
0200 for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++)
0201 irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq));
0202
0203 irq_domain_remove(kirq->irqd);
0204 return 0;
0205 }
0206
0207 static const struct of_device_id keystone_irq_dt_ids[] = {
0208 { .compatible = "ti,keystone-irq", },
0209 {},
0210 };
0211 MODULE_DEVICE_TABLE(of, keystone_irq_dt_ids);
0212
0213 static struct platform_driver keystone_irq_device_driver = {
0214 .probe = keystone_irq_probe,
0215 .remove = keystone_irq_remove,
0216 .driver = {
0217 .name = "keystone_irq",
0218 .of_match_table = of_match_ptr(keystone_irq_dt_ids),
0219 }
0220 };
0221
0222 module_platform_driver(keystone_irq_device_driver);
0223
0224 MODULE_AUTHOR("Texas Instruments");
0225 MODULE_AUTHOR("Sajesh Kumar Saran");
0226 MODULE_AUTHOR("Grygorii Strashko");
0227 MODULE_DESCRIPTION("Keystone IRQ chip");
0228 MODULE_LICENSE("GPL v2");