drivers/irqchip/irq-imx-irqsteer.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright 2017 NXP
0004  * Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
0005  */
0006
0007 #include <linux/clk.h>
0008 #include <linux/interrupt.h>
0009 #include <linux/irq.h>
0010 #include <linux/irqchip/chained_irq.h>
0011 #include <linux/irqdomain.h>
0012 #include <linux/kernel.h>
0013 #include <linux/of_irq.h>
0014 #include <linux/of_platform.h>
0015 #include <linux/pm_runtime.h>
0016 #include <linux/spinlock.h>
0017
0018 #define CTRL_STRIDE_OFF(_t, _r) (_t * 4 * _r)
0019 #define CHANCTRL        0x0
0020 #define CHANMASK(n, t)      (CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
0021 #define CHANSET(n, t)       (CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
0022 #define CHANSTATUS(n, t)    (CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
0023 #define CHAN_MINTDIS(t)     (CTRL_STRIDE_OFF(t, 3) + 0x4)
0024 #define CHAN_MASTRSTAT(t)   (CTRL_STRIDE_OFF(t, 3) + 0x8)
0025
0026 #define CHAN_MAX_OUTPUT_INT 0x8
0027
0028 struct irqsteer_data {
0029     void __iomem        *regs;
0030     struct clk      *ipg_clk;
0031     int         irq[CHAN_MAX_OUTPUT_INT];
0032     int         irq_count;
0033     raw_spinlock_t      lock;
0034     int         reg_num;
0035     int         channel;
0036     struct irq_domain   *domain;
0037     u32         *saved_reg;
0038 };
0039
0040 static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
0041                       unsigned long irqnum)
0042 {
0043     return (data->reg_num - irqnum / 32 - 1);
0044 }
0045
0046 static void imx_irqsteer_irq_unmask(struct irq_data *d)
0047 {
0048     struct irqsteer_data *data = d->chip_data;
0049     int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
0050     unsigned long flags;
0051     u32 val;
0052
0053     raw_spin_lock_irqsave(&data->lock, flags);
0054     val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
0055     val |= BIT(d->hwirq % 32);
0056     writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
0057     raw_spin_unlock_irqrestore(&data->lock, flags);
0058 }
0059
0060 static void imx_irqsteer_irq_mask(struct irq_data *d)
0061 {
0062     struct irqsteer_data *data = d->chip_data;
0063     int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
0064     unsigned long flags;
0065     u32 val;
0066
0067     raw_spin_lock_irqsave(&data->lock, flags);
0068     val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
0069     val &= ~BIT(d->hwirq % 32);
0070     writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
0071     raw_spin_unlock_irqrestore(&data->lock, flags);
0072 }
0073
0074 static const struct irq_chip imx_irqsteer_irq_chip = {
0075     .name       = "irqsteer",
0076     .irq_mask   = imx_irqsteer_irq_mask,
0077     .irq_unmask = imx_irqsteer_irq_unmask,
0078 };
0079
0080 static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
0081                 irq_hw_number_t hwirq)
0082 {
0083     irq_set_status_flags(irq, IRQ_LEVEL);
0084     irq_set_chip_data(irq, h->host_data);
0085     irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);
0086
0087     return 0;
0088 }
0089
0090 static const struct irq_domain_ops imx_irqsteer_domain_ops = {
0091     .map        = imx_irqsteer_irq_map,
0092     .xlate      = irq_domain_xlate_onecell,
0093 };
0094
0095 static int imx_irqsteer_get_hwirq_base(struct irqsteer_data *data, u32 irq)
0096 {
0097     int i;
0098
0099     for (i = 0; i < data->irq_count; i++) {
0100         if (data->irq[i] == irq)
0101             return i * 64;
0102     }
0103
0104     return -EINVAL;
0105 }
0106
0107 static void imx_irqsteer_irq_handler(struct irq_desc *desc)
0108 {
0109     struct irqsteer_data *data = irq_desc_get_handler_data(desc);
0110     int hwirq;
0111     int irq, i;
0112
0113     chained_irq_enter(irq_desc_get_chip(desc), desc);
0114
0115     irq = irq_desc_get_irq(desc);
0116     hwirq = imx_irqsteer_get_hwirq_base(data, irq);
0117     if (hwirq < 0) {
0118         pr_warn("%s: unable to get hwirq base for irq %d\n",
0119             __func__, irq);
0120         return;
0121     }
0122
0123     for (i = 0; i < 2; i++, hwirq += 32) {
0124         int idx = imx_irqsteer_get_reg_index(data, hwirq);
0125         unsigned long irqmap;
0126         int pos;
0127
0128         if (hwirq >= data->reg_num * 32)
0129             break;
0130
0131         irqmap = readl_relaxed(data->regs +
0132                        CHANSTATUS(idx, data->reg_num));
0133
0134         for_each_set_bit(pos, &irqmap, 32)
0135             generic_handle_domain_irq(data->domain, pos + hwirq);
0136     }
0137
0138     chained_irq_exit(irq_desc_get_chip(desc), desc);
0139 }
0140
0141 static int imx_irqsteer_probe(struct platform_device *pdev)
0142 {
0143     struct device_node *np = pdev->dev.of_node;
0144     struct irqsteer_data *data;
0145     u32 irqs_num;
0146     int i, ret;
0147
0148     data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
0149     if (!data)
0150         return -ENOMEM;
0151
0152     data->regs = devm_platform_ioremap_resource(pdev, 0);
0153     if (IS_ERR(data->regs)) {
0154         dev_err(&pdev->dev, "failed to initialize reg\n");
0155         return PTR_ERR(data->regs);
0156     }
0157
0158     data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
0159     if (IS_ERR(data->ipg_clk))
0160         return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk),
0161                      "failed to get ipg clk\n");
0162
0163     raw_spin_lock_init(&data->lock);
0164
0165     ret = of_property_read_u32(np, "fsl,num-irqs", &irqs_num);
0166     if (ret)
0167         return ret;
0168     ret = of_property_read_u32(np, "fsl,channel", &data->channel);
0169     if (ret)
0170         return ret;
0171
0172     /*
0173      * There is one output irq for each group of 64 inputs.
0174      * One register bit map can represent 32 input interrupts.
0175      */
0176     data->irq_count = DIV_ROUND_UP(irqs_num, 64);
0177     data->reg_num = irqs_num / 32;
0178
0179     if (IS_ENABLED(CONFIG_PM)) {
0180         data->saved_reg = devm_kzalloc(&pdev->dev,
0181                     sizeof(u32) * data->reg_num,
0182                     GFP_KERNEL);
0183         if (!data->saved_reg)
0184             return -ENOMEM;
0185     }
0186
0187     ret = clk_prepare_enable(data->ipg_clk);
0188     if (ret) {
0189         dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
0190         return ret;
0191     }
0192
0193     /* steer all IRQs into configured channel */
0194     writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
0195
0196     data->domain = irq_domain_add_linear(np, data->reg_num * 32,
0197                          &imx_irqsteer_domain_ops, data);
0198     if (!data->domain) {
0199         dev_err(&pdev->dev, "failed to create IRQ domain\n");
0200         ret = -ENOMEM;
0201         goto out;
0202     }
0203     irq_domain_set_pm_device(data->domain, &pdev->dev);
0204
0205     if (!data->irq_count || data->irq_count > CHAN_MAX_OUTPUT_INT) {
0206         ret = -EINVAL;
0207         goto out;
0208     }
0209
0210     for (i = 0; i < data->irq_count; i++) {
0211         data->irq[i] = irq_of_parse_and_map(np, i);
0212         if (!data->irq[i]) {
0213             ret = -EINVAL;
0214             goto out;
0215         }
0216
0217         irq_set_chained_handler_and_data(data->irq[i],
0218                          imx_irqsteer_irq_handler,
0219                          data);
0220     }
0221
0222     platform_set_drvdata(pdev, data);
0223
0224     pm_runtime_set_active(&pdev->dev);
0225     pm_runtime_enable(&pdev->dev);
0226
0227     return 0;
0228 out:
0229     clk_disable_unprepare(data->ipg_clk);
0230     return ret;
0231 }
0232
0233 static int imx_irqsteer_remove(struct platform_device *pdev)
0234 {
0235     struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
0236     int i;
0237
0238     for (i = 0; i < irqsteer_data->irq_count; i++)
0239         irq_set_chained_handler_and_data(irqsteer_data->irq[i],
0240                          NULL, NULL);
0241
0242     irq_domain_remove(irqsteer_data->domain);
0243
0244     clk_disable_unprepare(irqsteer_data->ipg_clk);
0245
0246     return 0;
0247 }
0248
0249 #ifdef CONFIG_PM
0250 static void imx_irqsteer_save_regs(struct irqsteer_data *data)
0251 {
0252     int i;
0253
0254     for (i = 0; i < data->reg_num; i++)
0255         data->saved_reg[i] = readl_relaxed(data->regs +
0256                         CHANMASK(i, data->reg_num));
0257 }
0258
0259 static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
0260 {
0261     int i;
0262
0263     writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
0264     for (i = 0; i < data->reg_num; i++)
0265         writel_relaxed(data->saved_reg[i],
0266                    data->regs + CHANMASK(i, data->reg_num));
0267 }
0268
0269 static int imx_irqsteer_suspend(struct device *dev)
0270 {
0271     struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
0272
0273     imx_irqsteer_save_regs(irqsteer_data);
0274     clk_disable_unprepare(irqsteer_data->ipg_clk);
0275
0276     return 0;
0277 }
0278
0279 static int imx_irqsteer_resume(struct device *dev)
0280 {
0281     struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
0282     int ret;
0283
0284     ret = clk_prepare_enable(irqsteer_data->ipg_clk);
0285     if (ret) {
0286         dev_err(dev, "failed to enable ipg clk: %d\n", ret);
0287         return ret;
0288     }
0289     imx_irqsteer_restore_regs(irqsteer_data);
0290
0291     return 0;
0292 }
0293 #endif
0294
0295 static const struct dev_pm_ops imx_irqsteer_pm_ops = {
0296     SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0297                       pm_runtime_force_resume)
0298     SET_RUNTIME_PM_OPS(imx_irqsteer_suspend,
0299                imx_irqsteer_resume, NULL)
0300 };
0301
0302 static const struct of_device_id imx_irqsteer_dt_ids[] = {
0303     { .compatible = "fsl,imx-irqsteer", },
0304     {},
0305 };
0306
0307 static struct platform_driver imx_irqsteer_driver = {
0308     .driver = {
0309         .name = "imx-irqsteer",
0310         .of_match_table = imx_irqsteer_dt_ids,
0311         .pm = &imx_irqsteer_pm_ops,
0312     },
0313     .probe = imx_irqsteer_probe,
0314     .remove = imx_irqsteer_remove,
0315 };
0316 builtin_platform_driver(imx_irqsteer_driver);