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0005 #include <linux/module.h>
0006 #include <linux/clk.h>
0007 #include <linux/of_device.h>
0008 #include <linux/of_irq.h>
0009 #include <linux/irqchip/arm-gic.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/pm_runtime.h>
0012 #include <linux/slab.h>
0013
0014 struct gic_clk_data {
0015 unsigned int num_clocks;
0016 const char *const *clocks;
0017 };
0018
0019 struct gic_chip_pm {
0020 struct gic_chip_data *chip_data;
0021 const struct gic_clk_data *clk_data;
0022 struct clk_bulk_data *clks;
0023 };
0024
0025 static int gic_runtime_resume(struct device *dev)
0026 {
0027 struct gic_chip_pm *chip_pm = dev_get_drvdata(dev);
0028 struct gic_chip_data *gic = chip_pm->chip_data;
0029 const struct gic_clk_data *data = chip_pm->clk_data;
0030 int ret;
0031
0032 ret = clk_bulk_prepare_enable(data->num_clocks, chip_pm->clks);
0033 if (ret)
0034 return ret;
0035
0036
0037
0038
0039
0040
0041
0042 if (!gic)
0043 return 0;
0044
0045 gic_dist_restore(gic);
0046 gic_cpu_restore(gic);
0047
0048 return 0;
0049 }
0050
0051 static int gic_runtime_suspend(struct device *dev)
0052 {
0053 struct gic_chip_pm *chip_pm = dev_get_drvdata(dev);
0054 struct gic_chip_data *gic = chip_pm->chip_data;
0055 const struct gic_clk_data *data = chip_pm->clk_data;
0056
0057 gic_dist_save(gic);
0058 gic_cpu_save(gic);
0059
0060 clk_bulk_disable_unprepare(data->num_clocks, chip_pm->clks);
0061
0062 return 0;
0063 }
0064
0065 static int gic_probe(struct platform_device *pdev)
0066 {
0067 struct device *dev = &pdev->dev;
0068 const struct gic_clk_data *data;
0069 struct gic_chip_pm *chip_pm;
0070 int ret, irq, i;
0071
0072 data = of_device_get_match_data(&pdev->dev);
0073 if (!data) {
0074 dev_err(&pdev->dev, "no device match found\n");
0075 return -ENODEV;
0076 }
0077
0078 chip_pm = devm_kzalloc(dev, sizeof(*chip_pm), GFP_KERNEL);
0079 if (!chip_pm)
0080 return -ENOMEM;
0081
0082 irq = irq_of_parse_and_map(dev->of_node, 0);
0083 if (!irq) {
0084 dev_err(dev, "no parent interrupt found!\n");
0085 return -EINVAL;
0086 }
0087
0088 chip_pm->clks = devm_kcalloc(dev, data->num_clocks,
0089 sizeof(*chip_pm->clks), GFP_KERNEL);
0090 if (!chip_pm->clks)
0091 return -ENOMEM;
0092
0093 for (i = 0; i < data->num_clocks; i++)
0094 chip_pm->clks[i].id = data->clocks[i];
0095
0096 ret = devm_clk_bulk_get(dev, data->num_clocks, chip_pm->clks);
0097 if (ret)
0098 goto irq_dispose;
0099
0100 chip_pm->clk_data = data;
0101 dev_set_drvdata(dev, chip_pm);
0102
0103 pm_runtime_enable(dev);
0104
0105 ret = pm_runtime_get_sync(dev);
0106 if (ret < 0)
0107 goto rpm_disable;
0108
0109 ret = gic_of_init_child(dev, &chip_pm->chip_data, irq);
0110 if (ret)
0111 goto rpm_put;
0112
0113 pm_runtime_put(dev);
0114
0115 dev_info(dev, "GIC IRQ controller registered\n");
0116
0117 return 0;
0118
0119 rpm_put:
0120 pm_runtime_put_sync(dev);
0121 rpm_disable:
0122 pm_runtime_disable(dev);
0123 irq_dispose:
0124 irq_dispose_mapping(irq);
0125
0126 return ret;
0127 }
0128
0129 static const struct dev_pm_ops gic_pm_ops = {
0130 SET_RUNTIME_PM_OPS(gic_runtime_suspend,
0131 gic_runtime_resume, NULL)
0132 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0133 pm_runtime_force_resume)
0134 };
0135
0136 static const char * const gic400_clocks[] = {
0137 "clk",
0138 };
0139
0140 static const struct gic_clk_data gic400_data = {
0141 .num_clocks = ARRAY_SIZE(gic400_clocks),
0142 .clocks = gic400_clocks,
0143 };
0144
0145 static const struct of_device_id gic_match[] = {
0146 { .compatible = "nvidia,tegra210-agic", .data = &gic400_data },
0147 {},
0148 };
0149 MODULE_DEVICE_TABLE(of, gic_match);
0150
0151 static struct platform_driver gic_driver = {
0152 .probe = gic_probe,
0153 .driver = {
0154 .name = "gic",
0155 .of_match_table = gic_match,
0156 .pm = &gic_pm_ops,
0157 }
0158 };
0159
0160 builtin_platform_driver(gic_driver);