0001 # SPDX-License-Identifier: GPL-2.0-only
0002 menu "IRQ chip support"
0003
0004 config IRQCHIP
0005 def_bool y
0006 depends on OF_IRQ
0007
0008 config ARM_GIC
0009 bool
0010 select IRQ_DOMAIN_HIERARCHY
0011 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0012
0013 config ARM_GIC_PM
0014 bool
0015 depends on PM
0016 select ARM_GIC
0017
0018 config ARM_GIC_MAX_NR
0019 int
0020 depends on ARM_GIC
0021 default 2 if ARCH_REALVIEW
0022 default 1
0023
0024 config ARM_GIC_V2M
0025 bool
0026 depends on PCI
0027 select ARM_GIC
0028 select PCI_MSI
0029
0030 config GIC_NON_BANKED
0031 bool
0032
0033 config ARM_GIC_V3
0034 bool
0035 select IRQ_DOMAIN_HIERARCHY
0036 select PARTITION_PERCPU
0037 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0038
0039 config ARM_GIC_V3_ITS
0040 bool
0041 select GENERIC_MSI_IRQ_DOMAIN
0042 default ARM_GIC_V3
0043
0044 config ARM_GIC_V3_ITS_PCI
0045 bool
0046 depends on ARM_GIC_V3_ITS
0047 depends on PCI
0048 depends on PCI_MSI
0049 default ARM_GIC_V3_ITS
0050
0051 config ARM_GIC_V3_ITS_FSL_MC
0052 bool
0053 depends on ARM_GIC_V3_ITS
0054 depends on FSL_MC_BUS
0055 default ARM_GIC_V3_ITS
0056
0057 config ARM_NVIC
0058 bool
0059 select IRQ_DOMAIN_HIERARCHY
0060 select GENERIC_IRQ_CHIP
0061
0062 config ARM_VIC
0063 bool
0064 select IRQ_DOMAIN
0065
0066 config ARM_VIC_NR
0067 int
0068 default 4 if ARCH_S5PV210
0069 default 2
0070 depends on ARM_VIC
0071 help
0072 The maximum number of VICs available in the system, for
0073 power management.
0074
0075 config ARMADA_370_XP_IRQ
0076 bool
0077 select GENERIC_IRQ_CHIP
0078 select PCI_MSI if PCI
0079 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0080
0081 config ALPINE_MSI
0082 bool
0083 depends on PCI
0084 select PCI_MSI
0085 select GENERIC_IRQ_CHIP
0086
0087 config AL_FIC
0088 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
0089 depends on OF || COMPILE_TEST
0090 select GENERIC_IRQ_CHIP
0091 select IRQ_DOMAIN
0092 help
0093 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
0094
0095 config ATMEL_AIC_IRQ
0096 bool
0097 select GENERIC_IRQ_CHIP
0098 select IRQ_DOMAIN
0099 select SPARSE_IRQ
0100
0101 config ATMEL_AIC5_IRQ
0102 bool
0103 select GENERIC_IRQ_CHIP
0104 select IRQ_DOMAIN
0105 select SPARSE_IRQ
0106
0107 config I8259
0108 bool
0109 select IRQ_DOMAIN
0110
0111 config BCM6345_L1_IRQ
0112 bool
0113 select GENERIC_IRQ_CHIP
0114 select IRQ_DOMAIN
0115 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0116
0117 config BCM7038_L1_IRQ
0118 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
0119 depends on ARCH_BRCMSTB || BMIPS_GENERIC
0120 default ARCH_BRCMSTB || BMIPS_GENERIC
0121 select GENERIC_IRQ_CHIP
0122 select IRQ_DOMAIN
0123 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0124
0125 config BCM7120_L2_IRQ
0126 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
0127 depends on ARCH_BRCMSTB || BMIPS_GENERIC
0128 default ARCH_BRCMSTB || BMIPS_GENERIC
0129 select GENERIC_IRQ_CHIP
0130 select IRQ_DOMAIN
0131
0132 config BRCMSTB_L2_IRQ
0133 tristate "Broadcom STB generic L2 interrupt controller driver"
0134 depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
0135 default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
0136 select GENERIC_IRQ_CHIP
0137 select IRQ_DOMAIN
0138
0139 config DAVINCI_AINTC
0140 bool
0141 select GENERIC_IRQ_CHIP
0142 select IRQ_DOMAIN
0143
0144 config DAVINCI_CP_INTC
0145 bool
0146 select GENERIC_IRQ_CHIP
0147 select IRQ_DOMAIN
0148
0149 config DW_APB_ICTL
0150 bool
0151 select GENERIC_IRQ_CHIP
0152 select IRQ_DOMAIN_HIERARCHY
0153
0154 config FARADAY_FTINTC010
0155 bool
0156 select IRQ_DOMAIN
0157 select SPARSE_IRQ
0158
0159 config HISILICON_IRQ_MBIGEN
0160 bool
0161 select ARM_GIC_V3
0162 select ARM_GIC_V3_ITS
0163
0164 config IMGPDC_IRQ
0165 bool
0166 select GENERIC_IRQ_CHIP
0167 select IRQ_DOMAIN
0168
0169 config IXP4XX_IRQ
0170 bool
0171 select IRQ_DOMAIN
0172 select SPARSE_IRQ
0173
0174 config MADERA_IRQ
0175 tristate
0176
0177 config IRQ_MIPS_CPU
0178 bool
0179 select GENERIC_IRQ_CHIP
0180 select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
0181 select IRQ_DOMAIN
0182 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0183
0184 config CLPS711X_IRQCHIP
0185 bool
0186 depends on ARCH_CLPS711X
0187 select IRQ_DOMAIN
0188 select SPARSE_IRQ
0189 default y
0190
0191 config OMPIC
0192 bool
0193
0194 config OR1K_PIC
0195 bool
0196 select IRQ_DOMAIN
0197
0198 config OMAP_IRQCHIP
0199 bool
0200 select GENERIC_IRQ_CHIP
0201 select IRQ_DOMAIN
0202
0203 config ORION_IRQCHIP
0204 bool
0205 select IRQ_DOMAIN
0206
0207 config PIC32_EVIC
0208 bool
0209 select GENERIC_IRQ_CHIP
0210 select IRQ_DOMAIN
0211
0212 config JCORE_AIC
0213 bool "J-Core integrated AIC" if COMPILE_TEST
0214 depends on OF
0215 select IRQ_DOMAIN
0216 help
0217 Support for the J-Core integrated AIC.
0218
0219 config RDA_INTC
0220 bool
0221 select IRQ_DOMAIN
0222
0223 config RENESAS_INTC_IRQPIN
0224 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
0225 select IRQ_DOMAIN
0226 help
0227 Enable support for the Renesas Interrupt Controller for external
0228 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
0229
0230 config RENESAS_IRQC
0231 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
0232 select GENERIC_IRQ_CHIP
0233 select IRQ_DOMAIN
0234 help
0235 Enable support for the Renesas Interrupt Controller for external
0236 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
0237
0238 config RENESAS_RZA1_IRQC
0239 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
0240 select IRQ_DOMAIN_HIERARCHY
0241 help
0242 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
0243 to 8 external interrupts with configurable sense select.
0244
0245 config RENESAS_RZG2L_IRQC
0246 bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST
0247 select GENERIC_IRQ_CHIP
0248 select IRQ_DOMAIN_HIERARCHY
0249 help
0250 Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller
0251 for external devices.
0252
0253 config SL28CPLD_INTC
0254 bool "Kontron sl28cpld IRQ controller"
0255 depends on MFD_SL28CPLD=y || COMPILE_TEST
0256 select REGMAP_IRQ
0257 help
0258 Interrupt controller driver for the board management controller
0259 found on the Kontron sl28 CPLD.
0260
0261 config ST_IRQCHIP
0262 bool
0263 select REGMAP
0264 select MFD_SYSCON
0265 help
0266 Enables SysCfg Controlled IRQs on STi based platforms.
0267
0268 config SUN4I_INTC
0269 bool
0270
0271 config SUN6I_R_INTC
0272 bool
0273 select IRQ_DOMAIN_HIERARCHY
0274 select IRQ_FASTEOI_HIERARCHY_HANDLERS
0275
0276 config SUNXI_NMI_INTC
0277 bool
0278 select GENERIC_IRQ_CHIP
0279
0280 config TB10X_IRQC
0281 bool
0282 select IRQ_DOMAIN
0283 select GENERIC_IRQ_CHIP
0284
0285 config TS4800_IRQ
0286 tristate "TS-4800 IRQ controller"
0287 select IRQ_DOMAIN
0288 depends on HAS_IOMEM
0289 depends on SOC_IMX51 || COMPILE_TEST
0290 help
0291 Support for the TS-4800 FPGA IRQ controller
0292
0293 config VERSATILE_FPGA_IRQ
0294 bool
0295 select IRQ_DOMAIN
0296
0297 config VERSATILE_FPGA_IRQ_NR
0298 int
0299 default 4
0300 depends on VERSATILE_FPGA_IRQ
0301
0302 config XTENSA_MX
0303 bool
0304 select IRQ_DOMAIN
0305 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0306
0307 config XILINX_INTC
0308 bool "Xilinx Interrupt Controller IP"
0309 depends on OF_ADDRESS
0310 select IRQ_DOMAIN
0311 help
0312 Support for the Xilinx Interrupt Controller IP core.
0313 This is used as a primary controller with MicroBlaze and can also
0314 be used as a secondary chained controller on other platforms.
0315
0316 config IRQ_CROSSBAR
0317 bool
0318 help
0319 Support for a CROSSBAR ip that precedes the main interrupt controller.
0320 The primary irqchip invokes the crossbar's callback which inturn allocates
0321 a free irq and configures the IP. Thus the peripheral interrupts are
0322 routed to one of the free irqchip interrupt lines.
0323
0324 config KEYSTONE_IRQ
0325 tristate "Keystone 2 IRQ controller IP"
0326 depends on ARCH_KEYSTONE
0327 help
0328 Support for Texas Instruments Keystone 2 IRQ controller IP which
0329 is part of the Keystone 2 IPC mechanism
0330
0331 config MIPS_GIC
0332 bool
0333 select GENERIC_IRQ_IPI if SMP
0334 select IRQ_DOMAIN_HIERARCHY
0335 select MIPS_CM
0336
0337 config INGENIC_IRQ
0338 bool
0339 depends on MACH_INGENIC
0340 default y
0341
0342 config INGENIC_TCU_IRQ
0343 bool "Ingenic JZ47xx TCU interrupt controller"
0344 default MACH_INGENIC
0345 depends on MIPS || COMPILE_TEST
0346 select MFD_SYSCON
0347 select GENERIC_IRQ_CHIP
0348 help
0349 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
0350 JZ47xx SoCs.
0351
0352 If unsure, say N.
0353
0354 config IMX_GPCV2
0355 bool
0356 select IRQ_DOMAIN
0357 help
0358 Enables the wakeup IRQs for IMX platforms with GPCv2 block
0359
0360 config IRQ_MXS
0361 def_bool y if MACH_ASM9260 || ARCH_MXS
0362 select IRQ_DOMAIN
0363 select STMP_DEVICE
0364
0365 config MSCC_OCELOT_IRQ
0366 bool
0367 select IRQ_DOMAIN
0368 select GENERIC_IRQ_CHIP
0369
0370 config MVEBU_GICP
0371 bool
0372
0373 config MVEBU_ICU
0374 bool
0375
0376 config MVEBU_ODMI
0377 bool
0378 select GENERIC_MSI_IRQ_DOMAIN
0379
0380 config MVEBU_PIC
0381 bool
0382
0383 config MVEBU_SEI
0384 bool
0385
0386 config LS_EXTIRQ
0387 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
0388 select MFD_SYSCON
0389
0390 config LS_SCFG_MSI
0391 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
0392 depends on PCI && PCI_MSI
0393
0394 config PARTITION_PERCPU
0395 bool
0396
0397 config STM32_EXTI
0398 bool
0399 select IRQ_DOMAIN
0400 select GENERIC_IRQ_CHIP
0401
0402 config QCOM_IRQ_COMBINER
0403 bool "QCOM IRQ combiner support"
0404 depends on ARCH_QCOM && ACPI
0405 select IRQ_DOMAIN_HIERARCHY
0406 help
0407 Say yes here to add support for the IRQ combiner devices embedded
0408 in Qualcomm Technologies chips.
0409
0410 config IRQ_UNIPHIER_AIDET
0411 bool "UniPhier AIDET support" if COMPILE_TEST
0412 depends on ARCH_UNIPHIER || COMPILE_TEST
0413 default ARCH_UNIPHIER
0414 select IRQ_DOMAIN_HIERARCHY
0415 help
0416 Support for the UniPhier AIDET (ARM Interrupt Detector).
0417
0418 config MESON_IRQ_GPIO
0419 tristate "Meson GPIO Interrupt Multiplexer"
0420 depends on ARCH_MESON || COMPILE_TEST
0421 default ARCH_MESON
0422 select IRQ_DOMAIN_HIERARCHY
0423 help
0424 Support Meson SoC Family GPIO Interrupt Multiplexer
0425
0426 config GOLDFISH_PIC
0427 bool "Goldfish programmable interrupt controller"
0428 depends on MIPS && (GOLDFISH || COMPILE_TEST)
0429 select GENERIC_IRQ_CHIP
0430 select IRQ_DOMAIN
0431 help
0432 Say yes here to enable Goldfish interrupt controller driver used
0433 for Goldfish based virtual platforms.
0434
0435 config QCOM_PDC
0436 tristate "QCOM PDC"
0437 depends on ARCH_QCOM
0438 select IRQ_DOMAIN_HIERARCHY
0439 help
0440 Power Domain Controller driver to manage and configure wakeup
0441 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
0442
0443 config QCOM_MPM
0444 tristate "QCOM MPM"
0445 depends on ARCH_QCOM
0446 depends on MAILBOX
0447 select IRQ_DOMAIN_HIERARCHY
0448 help
0449 MSM Power Manager driver to manage and configure wakeup
0450 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
0451
0452 config CSKY_MPINTC
0453 bool
0454 depends on CSKY
0455 help
0456 Say yes here to enable C-SKY SMP interrupt controller driver used
0457 for C-SKY SMP system.
0458 In fact it's not mmio map in hardware and it uses ld/st to visit the
0459 controller's register inside CPU.
0460
0461 config CSKY_APB_INTC
0462 bool "C-SKY APB Interrupt Controller"
0463 depends on CSKY
0464 help
0465 Say yes here to enable C-SKY APB interrupt controller driver used
0466 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
0467 the controller's register.
0468
0469 config IMX_IRQSTEER
0470 bool "i.MX IRQSTEER support"
0471 depends on ARCH_MXC || COMPILE_TEST
0472 default ARCH_MXC
0473 select IRQ_DOMAIN
0474 help
0475 Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
0476
0477 config IMX_INTMUX
0478 bool "i.MX INTMUX support" if COMPILE_TEST
0479 default y if ARCH_MXC
0480 select IRQ_DOMAIN
0481 help
0482 Support for the i.MX INTMUX interrupt multiplexer.
0483
0484 config LS1X_IRQ
0485 bool "Loongson-1 Interrupt Controller"
0486 depends on MACH_LOONGSON32
0487 default y
0488 select IRQ_DOMAIN
0489 select GENERIC_IRQ_CHIP
0490 help
0491 Support for the Loongson-1 platform Interrupt Controller.
0492
0493 config TI_SCI_INTR_IRQCHIP
0494 bool
0495 depends on TI_SCI_PROTOCOL
0496 select IRQ_DOMAIN_HIERARCHY
0497 help
0498 This enables the irqchip driver support for K3 Interrupt router
0499 over TI System Control Interface available on some new TI's SoCs.
0500 If you wish to use interrupt router irq resources managed by the
0501 TI System Controller, say Y here. Otherwise, say N.
0502
0503 config TI_SCI_INTA_IRQCHIP
0504 bool
0505 depends on TI_SCI_PROTOCOL
0506 select IRQ_DOMAIN_HIERARCHY
0507 select TI_SCI_INTA_MSI_DOMAIN
0508 help
0509 This enables the irqchip driver support for K3 Interrupt aggregator
0510 over TI System Control Interface available on some new TI's SoCs.
0511 If you wish to use interrupt aggregator irq resources managed by the
0512 TI System Controller, say Y here. Otherwise, say N.
0513
0514 config TI_PRUSS_INTC
0515 tristate
0516 depends on TI_PRUSS
0517 default TI_PRUSS
0518 select IRQ_DOMAIN
0519 help
0520 This enables support for the PRU-ICSS Local Interrupt Controller
0521 present within a PRU-ICSS subsystem present on various TI SoCs.
0522 The PRUSS INTC enables various interrupts to be routed to multiple
0523 different processors within the SoC.
0524
0525 config RISCV_INTC
0526 bool "RISC-V Local Interrupt Controller"
0527 depends on RISCV
0528 default y
0529 help
0530 This enables support for the per-HART local interrupt controller
0531 found in standard RISC-V systems. The per-HART local interrupt
0532 controller handles timer interrupts, software interrupts, and
0533 hardware interrupts. Without a per-HART local interrupt controller,
0534 a RISC-V system will be unable to handle any interrupts.
0535
0536 If you don't know what to do here, say Y.
0537
0538 config SIFIVE_PLIC
0539 bool "SiFive Platform-Level Interrupt Controller"
0540 depends on RISCV
0541 select IRQ_DOMAIN_HIERARCHY
0542 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0543 help
0544 This enables support for the PLIC chip found in SiFive (and
0545 potentially other) RISC-V systems. The PLIC controls devices
0546 interrupts and connects them to each core's local interrupt
0547 controller. Aside from timer and software interrupts, all other
0548 interrupt sources are subordinate to the PLIC.
0549
0550 If you don't know what to do here, say Y.
0551
0552 config EXYNOS_IRQ_COMBINER
0553 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
0554 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
0555 help
0556 Say yes here to add support for the IRQ combiner devices embedded
0557 in Samsung Exynos chips.
0558
0559 config IRQ_LOONGARCH_CPU
0560 bool
0561 select GENERIC_IRQ_CHIP
0562 select IRQ_DOMAIN
0563 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
0564 select LOONGSON_LIOINTC
0565 select LOONGSON_EIOINTC
0566 select LOONGSON_PCH_PIC
0567 select LOONGSON_PCH_MSI
0568 select LOONGSON_PCH_LPC
0569 help
0570 Support for the LoongArch CPU Interrupt Controller. For details of
0571 irq chip hierarchy on LoongArch platforms please read the document
0572 Documentation/loongarch/irq-chip-model.rst.
0573
0574 config LOONGSON_LIOINTC
0575 bool "Loongson Local I/O Interrupt Controller"
0576 depends on MACH_LOONGSON64
0577 default y
0578 select IRQ_DOMAIN
0579 select GENERIC_IRQ_CHIP
0580 help
0581 Support for the Loongson Local I/O Interrupt Controller.
0582
0583 config LOONGSON_EIOINTC
0584 bool "Loongson Extend I/O Interrupt Controller"
0585 depends on LOONGARCH
0586 depends on MACH_LOONGSON64
0587 default MACH_LOONGSON64
0588 select IRQ_DOMAIN_HIERARCHY
0589 select GENERIC_IRQ_CHIP
0590 help
0591 Support for the Loongson3 Extend I/O Interrupt Vector Controller.
0592
0593 config LOONGSON_HTPIC
0594 bool "Loongson3 HyperTransport PIC Controller"
0595 depends on MACH_LOONGSON64 && MIPS
0596 default y
0597 select IRQ_DOMAIN
0598 select GENERIC_IRQ_CHIP
0599 help
0600 Support for the Loongson-3 HyperTransport PIC Controller.
0601
0602 config LOONGSON_HTVEC
0603 bool "Loongson HyperTransport Interrupt Vector Controller"
0604 depends on MACH_LOONGSON64
0605 default MACH_LOONGSON64
0606 select IRQ_DOMAIN_HIERARCHY
0607 help
0608 Support for the Loongson HyperTransport Interrupt Vector Controller.
0609
0610 config LOONGSON_PCH_PIC
0611 bool "Loongson PCH PIC Controller"
0612 depends on MACH_LOONGSON64
0613 default MACH_LOONGSON64
0614 select IRQ_DOMAIN_HIERARCHY
0615 select IRQ_FASTEOI_HIERARCHY_HANDLERS
0616 help
0617 Support for the Loongson PCH PIC Controller.
0618
0619 config LOONGSON_PCH_MSI
0620 bool "Loongson PCH MSI Controller"
0621 depends on MACH_LOONGSON64
0622 depends on PCI
0623 default MACH_LOONGSON64
0624 select IRQ_DOMAIN_HIERARCHY
0625 select PCI_MSI
0626 help
0627 Support for the Loongson PCH MSI Controller.
0628
0629 config LOONGSON_PCH_LPC
0630 bool "Loongson PCH LPC Controller"
0631 depends on LOONGARCH
0632 depends on MACH_LOONGSON64
0633 default MACH_LOONGSON64
0634 select IRQ_DOMAIN_HIERARCHY
0635 help
0636 Support for the Loongson PCH LPC Controller.
0637
0638 config MST_IRQ
0639 bool "MStar Interrupt Controller"
0640 depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
0641 default ARCH_MEDIATEK
0642 select IRQ_DOMAIN
0643 select IRQ_DOMAIN_HIERARCHY
0644 help
0645 Support MStar Interrupt Controller.
0646
0647 config WPCM450_AIC
0648 bool "Nuvoton WPCM450 Advanced Interrupt Controller"
0649 depends on ARCH_WPCM450
0650 help
0651 Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC.
0652
0653 config IRQ_IDT3243X
0654 bool
0655 select GENERIC_IRQ_CHIP
0656 select IRQ_DOMAIN
0657
0658 config APPLE_AIC
0659 bool "Apple Interrupt Controller (AIC)"
0660 depends on ARM64
0661 depends on ARCH_APPLE || COMPILE_TEST
0662 help
0663 Support for the Apple Interrupt Controller found on Apple Silicon SoCs,
0664 such as the M1.
0665
0666 config MCHP_EIC
0667 bool "Microchip External Interrupt Controller"
0668 depends on ARCH_AT91 || COMPILE_TEST
0669 select IRQ_DOMAIN
0670 select IRQ_DOMAIN_HIERARCHY
0671 help
0672 Support for Microchip External Interrupt Controller.
0673
0674 config SUNPLUS_SP7021_INTC
0675 bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST
0676 default SOC_SP7021
0677 help
0678 Support for the Sunplus SP7021 Interrupt Controller IP core.
0679 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
0680 chained controller, routing all interrupt source in P-Chip to
0681 the primary controller on C-Chip.
0682
0683 endmenu
