0001
0002 #ifndef IO_PGTABLE_ARM_H_
0003 #define IO_PGTABLE_ARM_H_
0004
0005 #define ARM_LPAE_TCR_TG0_4K 0
0006 #define ARM_LPAE_TCR_TG0_64K 1
0007 #define ARM_LPAE_TCR_TG0_16K 2
0008
0009 #define ARM_LPAE_TCR_TG1_16K 1
0010 #define ARM_LPAE_TCR_TG1_4K 2
0011 #define ARM_LPAE_TCR_TG1_64K 3
0012
0013 #define ARM_LPAE_TCR_SH_NS 0
0014 #define ARM_LPAE_TCR_SH_OS 2
0015 #define ARM_LPAE_TCR_SH_IS 3
0016
0017 #define ARM_LPAE_TCR_RGN_NC 0
0018 #define ARM_LPAE_TCR_RGN_WBWA 1
0019 #define ARM_LPAE_TCR_RGN_WT 2
0020 #define ARM_LPAE_TCR_RGN_WB 3
0021
0022 #define ARM_LPAE_TCR_PS_32_BIT 0x0ULL
0023 #define ARM_LPAE_TCR_PS_36_BIT 0x1ULL
0024 #define ARM_LPAE_TCR_PS_40_BIT 0x2ULL
0025 #define ARM_LPAE_TCR_PS_42_BIT 0x3ULL
0026 #define ARM_LPAE_TCR_PS_44_BIT 0x4ULL
0027 #define ARM_LPAE_TCR_PS_48_BIT 0x5ULL
0028 #define ARM_LPAE_TCR_PS_52_BIT 0x6ULL
0029
0030 #endif