iommu/intel/trace.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Intel IOMMU trace support
0004  *
0005  * Copyright (C) 2019 Intel Corporation
0006  *
0007  * Author: Lu Baolu <baolu.lu@linux.intel.com>
0008  */
0009 #undef TRACE_SYSTEM
0010 #define TRACE_SYSTEM intel_iommu
0011
0012 #if !defined(_TRACE_INTEL_IOMMU_H) || defined(TRACE_HEADER_MULTI_READ)
0013 #define _TRACE_INTEL_IOMMU_H
0014
0015 #include <linux/tracepoint.h>
0016
0017 #include "iommu.h"
0018
0019 #define MSG_MAX     256
0020
0021 TRACE_EVENT(qi_submit,
0022     TP_PROTO(struct intel_iommu *iommu, u64 qw0, u64 qw1, u64 qw2, u64 qw3),
0023
0024     TP_ARGS(iommu, qw0, qw1, qw2, qw3),
0025
0026     TP_STRUCT__entry(
0027         __field(u64, qw0)
0028         __field(u64, qw1)
0029         __field(u64, qw2)
0030         __field(u64, qw3)
0031         __string(iommu, iommu->name)
0032     ),
0033
0034     TP_fast_assign(
0035         __assign_str(iommu, iommu->name);
0036         __entry->qw0 = qw0;
0037         __entry->qw1 = qw1;
0038         __entry->qw2 = qw2;
0039         __entry->qw3 = qw3;
0040     ),
0041
0042     TP_printk("%s %s: 0x%llx 0x%llx 0x%llx 0x%llx",
0043           __print_symbolic(__entry->qw0 & 0xf,
0044                    { QI_CC_TYPE,    "cc_inv" },
0045                    { QI_IOTLB_TYPE, "iotlb_inv" },
0046                    { QI_DIOTLB_TYPE,    "dev_tlb_inv" },
0047                    { QI_IEC_TYPE,   "iec_inv" },
0048                    { QI_IWD_TYPE,   "inv_wait" },
0049                    { QI_EIOTLB_TYPE,    "p_iotlb_inv" },
0050                    { QI_PC_TYPE,    "pc_inv" },
0051                    { QI_DEIOTLB_TYPE,   "p_dev_tlb_inv" },
0052                    { QI_PGRP_RESP_TYPE, "page_grp_resp" }),
0053         __get_str(iommu),
0054         __entry->qw0, __entry->qw1, __entry->qw2, __entry->qw3
0055     )
0056 );
0057
0058 TRACE_EVENT(prq_report,
0059     TP_PROTO(struct intel_iommu *iommu, struct device *dev,
0060          u64 dw0, u64 dw1, u64 dw2, u64 dw3,
0061          unsigned long seq),
0062
0063     TP_ARGS(iommu, dev, dw0, dw1, dw2, dw3, seq),
0064
0065     TP_STRUCT__entry(
0066         __field(u64, dw0)
0067         __field(u64, dw1)
0068         __field(u64, dw2)
0069         __field(u64, dw3)
0070         __field(unsigned long, seq)
0071         __string(iommu, iommu->name)
0072         __string(dev, dev_name(dev))
0073         __dynamic_array(char, buff, MSG_MAX)
0074     ),
0075
0076     TP_fast_assign(
0077         __entry->dw0 = dw0;
0078         __entry->dw1 = dw1;
0079         __entry->dw2 = dw2;
0080         __entry->dw3 = dw3;
0081         __entry->seq = seq;
0082         __assign_str(iommu, iommu->name);
0083         __assign_str(dev, dev_name(dev));
0084     ),
0085
0086     TP_printk("%s/%s seq# %ld: %s",
0087         __get_str(iommu), __get_str(dev), __entry->seq,
0088         decode_prq_descriptor(__get_str(buff), MSG_MAX, __entry->dw0,
0089                       __entry->dw1, __entry->dw2, __entry->dw3)
0090     )
0091 );
0092 #endif /* _TRACE_INTEL_IOMMU_H */
0093
0094 /* This part must be outside protection */
0095 #undef TRACE_INCLUDE_PATH
0096 #undef TRACE_INCLUDE_FILE
0097 #define TRACE_INCLUDE_PATH ../../drivers/iommu/intel/
0098 #define TRACE_INCLUDE_FILE trace
0099 #include <trace/define_trace.h>