drivers/iommu/hyperv-iommu.c

0001 // SPDX-License-Identifier: GPL-2.0
0002
0003 /*
0004  * Hyper-V stub IOMMU driver.
0005  *
0006  * Copyright (C) 2019, Microsoft, Inc.
0007  *
0008  * Author : Lan Tianyu <Tianyu.Lan@microsoft.com>
0009  */
0010
0011 #include <linux/types.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/irq.h>
0014 #include <linux/iommu.h>
0015 #include <linux/module.h>
0016
0017 #include <asm/apic.h>
0018 #include <asm/cpu.h>
0019 #include <asm/hw_irq.h>
0020 #include <asm/io_apic.h>
0021 #include <asm/irq_remapping.h>
0022 #include <asm/hypervisor.h>
0023 #include <asm/mshyperv.h>
0024
0025 #include "irq_remapping.h"
0026
0027 #ifdef CONFIG_IRQ_REMAP
0028
0029 /*
0030  * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
0031  * Redirection Table. Hyper-V exposes one single IO-APIC and so define
0032  * 24 IO APIC remmapping entries.
0033  */
0034 #define IOAPIC_REMAPPING_ENTRY 24
0035
0036 static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
0037 static struct irq_domain *ioapic_ir_domain;
0038
0039 static int hyperv_ir_set_affinity(struct irq_data *data,
0040         const struct cpumask *mask, bool force)
0041 {
0042     struct irq_data *parent = data->parent_data;
0043     struct irq_cfg *cfg = irqd_cfg(data);
0044     int ret;
0045
0046     /* Return error If new irq affinity is out of ioapic_max_cpumask. */
0047     if (!cpumask_subset(mask, &ioapic_max_cpumask))
0048         return -EINVAL;
0049
0050     ret = parent->chip->irq_set_affinity(parent, mask, force);
0051     if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
0052         return ret;
0053
0054     send_cleanup_vector(cfg);
0055
0056     return 0;
0057 }
0058
0059 static struct irq_chip hyperv_ir_chip = {
0060     .name           = "HYPERV-IR",
0061     .irq_ack        = apic_ack_irq,
0062     .irq_set_affinity   = hyperv_ir_set_affinity,
0063 };
0064
0065 static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
0066                      unsigned int virq, unsigned int nr_irqs,
0067                      void *arg)
0068 {
0069     struct irq_alloc_info *info = arg;
0070     struct irq_data *irq_data;
0071     int ret = 0;
0072
0073     if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
0074         return -EINVAL;
0075
0076     ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
0077     if (ret < 0)
0078         return ret;
0079
0080     irq_data = irq_domain_get_irq_data(domain, virq);
0081     if (!irq_data) {
0082         irq_domain_free_irqs_common(domain, virq, nr_irqs);
0083         return -EINVAL;
0084     }
0085
0086     irq_data->chip = &hyperv_ir_chip;
0087
0088     /*
0089      * Hypver-V IO APIC irq affinity should be in the scope of
0090      * ioapic_max_cpumask because no irq remapping support.
0091      */
0092     irq_data_update_affinity(irq_data, &ioapic_max_cpumask);
0093
0094     return 0;
0095 }
0096
0097 static void hyperv_irq_remapping_free(struct irq_domain *domain,
0098                  unsigned int virq, unsigned int nr_irqs)
0099 {
0100     irq_domain_free_irqs_common(domain, virq, nr_irqs);
0101 }
0102
0103 static int hyperv_irq_remapping_select(struct irq_domain *d,
0104                        struct irq_fwspec *fwspec,
0105                        enum irq_domain_bus_token bus_token)
0106 {
0107     /* Claim the only I/O APIC emulated by Hyper-V */
0108     return x86_fwspec_is_ioapic(fwspec);
0109 }
0110
0111 static const struct irq_domain_ops hyperv_ir_domain_ops = {
0112     .select = hyperv_irq_remapping_select,
0113     .alloc = hyperv_irq_remapping_alloc,
0114     .free = hyperv_irq_remapping_free,
0115 };
0116
0117 static const struct irq_domain_ops hyperv_root_ir_domain_ops;
0118 static int __init hyperv_prepare_irq_remapping(void)
0119 {
0120     struct fwnode_handle *fn;
0121     int i;
0122     const char *name;
0123     const struct irq_domain_ops *ops;
0124
0125     if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
0126         x86_init.hyper.msi_ext_dest_id() ||
0127         !x2apic_supported())
0128         return -ENODEV;
0129
0130     if (hv_root_partition) {
0131         name = "HYPERV-ROOT-IR";
0132         ops = &hyperv_root_ir_domain_ops;
0133     } else {
0134         name = "HYPERV-IR";
0135         ops = &hyperv_ir_domain_ops;
0136     }
0137
0138     fn = irq_domain_alloc_named_id_fwnode(name, 0);
0139     if (!fn)
0140         return -ENOMEM;
0141
0142     ioapic_ir_domain =
0143         irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
0144                 0, IOAPIC_REMAPPING_ENTRY, fn, ops, NULL);
0145
0146     if (!ioapic_ir_domain) {
0147         irq_domain_free_fwnode(fn);
0148         return -ENOMEM;
0149     }
0150
0151     if (hv_root_partition)
0152         return 0; /* The rest is only relevant to guests */
0153
0154     /*
0155      * Hyper-V doesn't provide irq remapping function for
0156      * IO-APIC and so IO-APIC only accepts 8-bit APIC ID.
0157      * Cpu's APIC ID is read from ACPI MADT table and APIC IDs
0158      * in the MADT table on Hyper-v are sorted monotonic increasingly.
0159      * APIC ID reflects cpu topology. There maybe some APIC ID
0160      * gaps when cpu number in a socket is not power of two. Prepare
0161      * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
0162      * into ioapic_max_cpumask if its APIC ID is less than 256.
0163      */
0164     for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
0165         if (cpu_physical_id(i) < 256)
0166             cpumask_set_cpu(i, &ioapic_max_cpumask);
0167
0168     return 0;
0169 }
0170
0171 static int __init hyperv_enable_irq_remapping(void)
0172 {
0173     return IRQ_REMAP_X2APIC_MODE;
0174 }
0175
0176 struct irq_remap_ops hyperv_irq_remap_ops = {
0177     .prepare        = hyperv_prepare_irq_remapping,
0178     .enable         = hyperv_enable_irq_remapping,
0179 };
0180
0181 /* IRQ remapping domain when Linux runs as the root partition */
0182 struct hyperv_root_ir_data {
0183     u8 ioapic_id;
0184     bool is_level;
0185     struct hv_interrupt_entry entry;
0186 };
0187
0188 static void
0189 hyperv_root_ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg)
0190 {
0191     u64 status;
0192     u32 vector;
0193     struct irq_cfg *cfg;
0194     int ioapic_id;
0195     const struct cpumask *affinity;
0196     int cpu;
0197     struct hv_interrupt_entry entry;
0198     struct hyperv_root_ir_data *data = irq_data->chip_data;
0199     struct IO_APIC_route_entry e;
0200
0201     cfg = irqd_cfg(irq_data);
0202     affinity = irq_data_get_effective_affinity_mask(irq_data);
0203     cpu = cpumask_first_and(affinity, cpu_online_mask);
0204
0205     vector = cfg->vector;
0206     ioapic_id = data->ioapic_id;
0207
0208     if (data->entry.source == HV_DEVICE_TYPE_IOAPIC
0209         && data->entry.ioapic_rte.as_uint64) {
0210         entry = data->entry;
0211
0212         status = hv_unmap_ioapic_interrupt(ioapic_id, &entry);
0213
0214         if (status != HV_STATUS_SUCCESS)
0215             pr_debug("%s: unexpected unmap status %lld\n", __func__, status);
0216
0217         data->entry.ioapic_rte.as_uint64 = 0;
0218         data->entry.source = 0; /* Invalid source */
0219     }
0220
0221
0222     status = hv_map_ioapic_interrupt(ioapic_id, data->is_level, cpu,
0223                     vector, &entry);
0224
0225     if (status != HV_STATUS_SUCCESS) {
0226         pr_err("%s: map hypercall failed, status %lld\n", __func__, status);
0227         return;
0228     }
0229
0230     data->entry = entry;
0231
0232     /* Turn it into an IO_APIC_route_entry, and generate MSI MSG. */
0233     e.w1 = entry.ioapic_rte.low_uint32;
0234     e.w2 = entry.ioapic_rte.high_uint32;
0235
0236     memset(msg, 0, sizeof(*msg));
0237     msg->arch_data.vector = e.vector;
0238     msg->arch_data.delivery_mode = e.delivery_mode;
0239     msg->arch_addr_lo.dest_mode_logical = e.dest_mode_logical;
0240     msg->arch_addr_lo.dmar_format = e.ir_format;
0241     msg->arch_addr_lo.dmar_index_0_14 = e.ir_index_0_14;
0242 }
0243
0244 static int hyperv_root_ir_set_affinity(struct irq_data *data,
0245         const struct cpumask *mask, bool force)
0246 {
0247     struct irq_data *parent = data->parent_data;
0248     struct irq_cfg *cfg = irqd_cfg(data);
0249     int ret;
0250
0251     ret = parent->chip->irq_set_affinity(parent, mask, force);
0252     if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
0253         return ret;
0254
0255     send_cleanup_vector(cfg);
0256
0257     return 0;
0258 }
0259
0260 static struct irq_chip hyperv_root_ir_chip = {
0261     .name           = "HYPERV-ROOT-IR",
0262     .irq_ack        = apic_ack_irq,
0263     .irq_set_affinity   = hyperv_root_ir_set_affinity,
0264     .irq_compose_msi_msg    = hyperv_root_ir_compose_msi_msg,
0265 };
0266
0267 static int hyperv_root_irq_remapping_alloc(struct irq_domain *domain,
0268                      unsigned int virq, unsigned int nr_irqs,
0269                      void *arg)
0270 {
0271     struct irq_alloc_info *info = arg;
0272     struct irq_data *irq_data;
0273     struct hyperv_root_ir_data *data;
0274     int ret = 0;
0275
0276     if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
0277         return -EINVAL;
0278
0279     ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
0280     if (ret < 0)
0281         return ret;
0282
0283     data = kzalloc(sizeof(*data), GFP_KERNEL);
0284     if (!data) {
0285         irq_domain_free_irqs_common(domain, virq, nr_irqs);
0286         return -ENOMEM;
0287     }
0288
0289     irq_data = irq_domain_get_irq_data(domain, virq);
0290     if (!irq_data) {
0291         kfree(data);
0292         irq_domain_free_irqs_common(domain, virq, nr_irqs);
0293         return -EINVAL;
0294     }
0295
0296     data->ioapic_id = info->devid;
0297     data->is_level = info->ioapic.is_level;
0298
0299     irq_data->chip = &hyperv_root_ir_chip;
0300     irq_data->chip_data = data;
0301
0302     return 0;
0303 }
0304
0305 static void hyperv_root_irq_remapping_free(struct irq_domain *domain,
0306                  unsigned int virq, unsigned int nr_irqs)
0307 {
0308     struct irq_data *irq_data;
0309     struct hyperv_root_ir_data *data;
0310     struct hv_interrupt_entry *e;
0311     int i;
0312
0313     for (i = 0; i < nr_irqs; i++) {
0314         irq_data = irq_domain_get_irq_data(domain, virq + i);
0315
0316         if (irq_data && irq_data->chip_data) {
0317             data = irq_data->chip_data;
0318             e = &data->entry;
0319
0320             if (e->source == HV_DEVICE_TYPE_IOAPIC
0321                   && e->ioapic_rte.as_uint64)
0322                 hv_unmap_ioapic_interrupt(data->ioapic_id,
0323                             &data->entry);
0324
0325             kfree(data);
0326         }
0327     }
0328
0329     irq_domain_free_irqs_common(domain, virq, nr_irqs);
0330 }
0331
0332 static const struct irq_domain_ops hyperv_root_ir_domain_ops = {
0333     .select = hyperv_irq_remapping_select,
0334     .alloc = hyperv_root_irq_remapping_alloc,
0335     .free = hyperv_root_irq_remapping_free,
0336 };
0337
0338 #endif