interconnect/imx/imx8mp.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Interconnect framework driver for i.MX8MP SoC
0004  *
0005  * Copyright 2022 NXP
0006  * Peng Fan <peng.fan@nxp.com>
0007  */
0008
0009 #include <linux/module.h>
0010 #include <linux/of_device.h>
0011 #include <linux/platform_device.h>
0012 #include <dt-bindings/interconnect/fsl,imx8mp.h>
0013
0014 #include "imx.h"
0015
0016 static const struct imx_icc_node_adj_desc imx8mp_noc_adj = {
0017     .bw_mul = 1,
0018     .bw_div = 16,
0019     .main_noc = true,
0020 };
0021
0022 static struct imx_icc_noc_setting noc_setting_nodes[] = {
0023     [IMX8MP_ICM_MLMIX] = {
0024         .reg = 0x180,
0025         .mode = IMX_NOC_MODE_FIXED,
0026         .prio_level = 3,
0027     },
0028     [IMX8MP_ICM_DSP] = {
0029         .reg = 0x200,
0030         .mode = IMX_NOC_MODE_FIXED,
0031         .prio_level = 3,
0032     },
0033     [IMX8MP_ICM_SDMA2PER] = {
0034         .reg = 0x280,
0035         .mode = IMX_NOC_MODE_FIXED,
0036         .prio_level = 4,
0037     },
0038     [IMX8MP_ICM_SDMA2BURST] = {
0039         .reg = 0x300,
0040         .mode = IMX_NOC_MODE_FIXED,
0041         .prio_level = 4,
0042     },
0043     [IMX8MP_ICM_SDMA3PER] = {
0044         .reg = 0x380,
0045         .mode = IMX_NOC_MODE_FIXED,
0046         .prio_level = 4,
0047     },
0048     [IMX8MP_ICM_SDMA3BURST] = {
0049         .reg = 0x400,
0050         .mode = IMX_NOC_MODE_FIXED,
0051         .prio_level = 4,
0052     },
0053     [IMX8MP_ICM_EDMA] = {
0054         .reg = 0x480,
0055         .mode = IMX_NOC_MODE_FIXED,
0056         .prio_level = 4,
0057     },
0058     [IMX8MP_ICM_GPU3D] = {
0059         .reg = 0x500,
0060         .mode = IMX_NOC_MODE_FIXED,
0061         .prio_level = 3,
0062     },
0063     [IMX8MP_ICM_GPU2D] = {
0064         .reg = 0x580,
0065         .mode = IMX_NOC_MODE_FIXED,
0066         .prio_level = 3,
0067     },
0068     [IMX8MP_ICM_HRV] = {
0069         .reg = 0x600,
0070         .mode = IMX_NOC_MODE_FIXED,
0071         .prio_level = 2,
0072         .ext_control = 1,
0073     },
0074     [IMX8MP_ICM_LCDIF_HDMI] = {
0075         .reg = 0x680,
0076         .mode = IMX_NOC_MODE_FIXED,
0077         .prio_level = 2,
0078         .ext_control = 1,
0079     },
0080     [IMX8MP_ICM_HDCP] = {
0081         .reg = 0x700,
0082         .mode = IMX_NOC_MODE_FIXED,
0083         .prio_level = 5,
0084     },
0085     [IMX8MP_ICM_NOC_PCIE] = {
0086         .reg = 0x780,
0087         .mode = IMX_NOC_MODE_FIXED,
0088         .prio_level = 3,
0089     },
0090     [IMX8MP_ICM_USB1] = {
0091         .reg = 0x800,
0092         .mode = IMX_NOC_MODE_FIXED,
0093         .prio_level = 3,
0094     },
0095     [IMX8MP_ICM_USB2] = {
0096         .reg = 0x880,
0097         .mode = IMX_NOC_MODE_FIXED,
0098         .prio_level = 3,
0099     },
0100     [IMX8MP_ICM_PCIE] = {
0101         .reg = 0x900,
0102         .mode = IMX_NOC_MODE_FIXED,
0103         .prio_level = 3,
0104     },
0105     [IMX8MP_ICM_LCDIF_RD] = {
0106         .reg = 0x980,
0107         .mode = IMX_NOC_MODE_FIXED,
0108         .prio_level = 2,
0109         .ext_control = 1,
0110     },
0111     [IMX8MP_ICM_LCDIF_WR] = {
0112         .reg = 0xa00,
0113         .mode = IMX_NOC_MODE_FIXED,
0114         .prio_level = 2,
0115         .ext_control = 1,
0116     },
0117     [IMX8MP_ICM_ISI0] = {
0118         .reg = 0xa80,
0119         .mode = IMX_NOC_MODE_FIXED,
0120         .prio_level = 2,
0121         .ext_control = 1,
0122     },
0123     [IMX8MP_ICM_ISI1] = {
0124         .reg = 0xb00,
0125         .mode = IMX_NOC_MODE_FIXED,
0126         .prio_level = 2,
0127         .ext_control = 1,
0128     },
0129     [IMX8MP_ICM_ISI2] = {
0130         .reg = 0xb80,
0131         .mode = IMX_NOC_MODE_FIXED,
0132         .prio_level = 2,
0133         .ext_control = 1,
0134     },
0135     [IMX8MP_ICM_ISP0] = {
0136         .reg = 0xc00,
0137         .mode = IMX_NOC_MODE_FIXED,
0138         .prio_level = 7,
0139     },
0140     [IMX8MP_ICM_ISP1] = {
0141         .reg = 0xc80,
0142         .mode = IMX_NOC_MODE_FIXED,
0143         .prio_level = 7,
0144     },
0145     [IMX8MP_ICM_DWE] = {
0146         .reg = 0xd00,
0147         .mode = IMX_NOC_MODE_FIXED,
0148         .prio_level = 7,
0149     },
0150     [IMX8MP_ICM_VPU_G1] = {
0151         .reg = 0xd80,
0152         .mode = IMX_NOC_MODE_FIXED,
0153         .prio_level = 3,
0154     },
0155     [IMX8MP_ICM_VPU_G2] = {
0156         .reg = 0xe00,
0157         .mode = IMX_NOC_MODE_FIXED,
0158         .prio_level = 3,
0159     },
0160     [IMX8MP_ICM_VPU_H1] = {
0161         .reg = 0xe80,
0162         .mode = IMX_NOC_MODE_FIXED,
0163         .prio_level = 3,
0164     },
0165     [IMX8MP_ICN_MEDIA] = {
0166         .mode = IMX_NOC_MODE_UNCONFIGURED,
0167     },
0168     [IMX8MP_ICN_VIDEO] = {
0169         .mode = IMX_NOC_MODE_UNCONFIGURED,
0170     },
0171     [IMX8MP_ICN_AUDIO] = {
0172         .mode = IMX_NOC_MODE_UNCONFIGURED,
0173     },
0174     [IMX8MP_ICN_HDMI] = {
0175         .mode = IMX_NOC_MODE_UNCONFIGURED,
0176     },
0177     [IMX8MP_ICN_GPU] = {
0178         .mode = IMX_NOC_MODE_UNCONFIGURED,
0179     },
0180     [IMX8MP_ICN_HSIO] = {
0181         .mode = IMX_NOC_MODE_UNCONFIGURED,
0182     },
0183 };
0184
0185 /* Describe bus masters, slaves and connections between them */
0186 static struct imx_icc_node_desc nodes[] = {
0187     DEFINE_BUS_INTERCONNECT("NOC", IMX8MP_ICN_NOC, &imx8mp_noc_adj,
0188                 IMX8MP_ICS_DRAM, IMX8MP_ICN_MAIN),
0189
0190     DEFINE_BUS_SLAVE("OCRAM", IMX8MP_ICS_OCRAM, NULL),
0191     DEFINE_BUS_SLAVE("DRAM", IMX8MP_ICS_DRAM, NULL),
0192     DEFINE_BUS_MASTER("A53", IMX8MP_ICM_A53, IMX8MP_ICN_NOC),
0193     DEFINE_BUS_MASTER("SUPERMIX", IMX8MP_ICM_SUPERMIX, IMX8MP_ICN_NOC),
0194     DEFINE_BUS_MASTER("GIC", IMX8MP_ICM_GIC, IMX8MP_ICN_NOC),
0195     DEFINE_BUS_MASTER("MLMIX", IMX8MP_ICM_MLMIX, IMX8MP_ICN_NOC),
0196
0197     DEFINE_BUS_INTERCONNECT("NOC_AUDIO", IMX8MP_ICN_AUDIO, NULL, IMX8MP_ICN_NOC),
0198     DEFINE_BUS_MASTER("DSP", IMX8MP_ICM_DSP, IMX8MP_ICN_AUDIO),
0199     DEFINE_BUS_MASTER("SDMA2PER", IMX8MP_ICM_SDMA2PER, IMX8MP_ICN_AUDIO),
0200     DEFINE_BUS_MASTER("SDMA2BURST", IMX8MP_ICM_SDMA2BURST, IMX8MP_ICN_AUDIO),
0201     DEFINE_BUS_MASTER("SDMA3PER", IMX8MP_ICM_SDMA3PER, IMX8MP_ICN_AUDIO),
0202     DEFINE_BUS_MASTER("SDMA3BURST", IMX8MP_ICM_SDMA3BURST, IMX8MP_ICN_AUDIO),
0203     DEFINE_BUS_MASTER("EDMA", IMX8MP_ICM_EDMA, IMX8MP_ICN_AUDIO),
0204
0205     DEFINE_BUS_INTERCONNECT("NOC_GPU", IMX8MP_ICN_GPU, NULL, IMX8MP_ICN_NOC),
0206     DEFINE_BUS_MASTER("GPU 2D", IMX8MP_ICM_GPU2D, IMX8MP_ICN_GPU),
0207     DEFINE_BUS_MASTER("GPU 3D", IMX8MP_ICM_GPU3D, IMX8MP_ICN_GPU),
0208
0209     DEFINE_BUS_INTERCONNECT("NOC_HDMI", IMX8MP_ICN_HDMI, NULL, IMX8MP_ICN_NOC),
0210     DEFINE_BUS_MASTER("HRV", IMX8MP_ICM_HRV, IMX8MP_ICN_HDMI),
0211     DEFINE_BUS_MASTER("LCDIF_HDMI", IMX8MP_ICM_LCDIF_HDMI, IMX8MP_ICN_HDMI),
0212     DEFINE_BUS_MASTER("HDCP", IMX8MP_ICM_HDCP, IMX8MP_ICN_HDMI),
0213
0214     DEFINE_BUS_INTERCONNECT("NOC_HSIO", IMX8MP_ICN_HSIO, NULL, IMX8MP_ICN_NOC),
0215     DEFINE_BUS_MASTER("NOC_PCIE", IMX8MP_ICM_NOC_PCIE, IMX8MP_ICN_HSIO),
0216     DEFINE_BUS_MASTER("USB1", IMX8MP_ICM_USB1, IMX8MP_ICN_HSIO),
0217     DEFINE_BUS_MASTER("USB2", IMX8MP_ICM_USB2, IMX8MP_ICN_HSIO),
0218     DEFINE_BUS_MASTER("PCIE", IMX8MP_ICM_PCIE, IMX8MP_ICN_HSIO),
0219
0220     DEFINE_BUS_INTERCONNECT("NOC_MEDIA", IMX8MP_ICN_MEDIA, NULL, IMX8MP_ICN_NOC),
0221     DEFINE_BUS_MASTER("LCDIF_RD", IMX8MP_ICM_LCDIF_RD, IMX8MP_ICN_MEDIA),
0222     DEFINE_BUS_MASTER("LCDIF_WR", IMX8MP_ICM_LCDIF_WR, IMX8MP_ICN_MEDIA),
0223     DEFINE_BUS_MASTER("ISI0", IMX8MP_ICM_ISI0, IMX8MP_ICN_MEDIA),
0224     DEFINE_BUS_MASTER("ISI1", IMX8MP_ICM_ISI1, IMX8MP_ICN_MEDIA),
0225     DEFINE_BUS_MASTER("ISI2", IMX8MP_ICM_ISI2, IMX8MP_ICN_MEDIA),
0226     DEFINE_BUS_MASTER("ISP0", IMX8MP_ICM_ISP0, IMX8MP_ICN_MEDIA),
0227     DEFINE_BUS_MASTER("ISP1", IMX8MP_ICM_ISP1, IMX8MP_ICN_MEDIA),
0228     DEFINE_BUS_MASTER("DWE", IMX8MP_ICM_DWE, IMX8MP_ICN_MEDIA),
0229
0230     DEFINE_BUS_INTERCONNECT("NOC_VIDEO", IMX8MP_ICN_VIDEO, NULL, IMX8MP_ICN_NOC),
0231     DEFINE_BUS_MASTER("VPU G1", IMX8MP_ICM_VPU_G1, IMX8MP_ICN_VIDEO),
0232     DEFINE_BUS_MASTER("VPU G2", IMX8MP_ICM_VPU_G2, IMX8MP_ICN_VIDEO),
0233     DEFINE_BUS_MASTER("VPU H1", IMX8MP_ICM_VPU_H1, IMX8MP_ICN_VIDEO),
0234     DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MP_ICN_MAIN, NULL,
0235                 IMX8MP_ICN_NOC, IMX8MP_ICS_OCRAM),
0236 };
0237
0238 static int imx8mp_icc_probe(struct platform_device *pdev)
0239 {
0240     return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes), noc_setting_nodes);
0241 }
0242
0243 static int imx8mp_icc_remove(struct platform_device *pdev)
0244 {
0245     return imx_icc_unregister(pdev);
0246 }
0247
0248 static struct platform_driver imx8mp_icc_driver = {
0249     .probe = imx8mp_icc_probe,
0250     .remove = imx8mp_icc_remove,
0251     .driver = {
0252         .name = "imx8mp-interconnect",
0253     },
0254 };
0255
0256 module_platform_driver(imx8mp_icc_driver);
0257 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
0258 MODULE_LICENSE("GPL");
0259 MODULE_ALIAS("platform:imx8mp-interconnect");