interconnect/imx/imx.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Interconnect framework driver for i.MX SoC
0004  *
0005  * Copyright (c) 2019, BayLibre
0006  * Copyright (c) 2019-2020, NXP
0007  * Author: Alexandre Bailon <abailon@baylibre.com>
0008  * Author: Leonard Crestez <leonard.crestez@nxp.com>
0009  */
0010 #ifndef __DRIVERS_INTERCONNECT_IMX_H
0011 #define __DRIVERS_INTERCONNECT_IMX_H
0012
0013 #include <linux/interconnect-provider.h>
0014 #include <linux/kernel.h>
0015
0016 #define IMX_ICC_MAX_LINKS   4
0017
0018 /*
0019  * High throughput priority level in Regulator mode
0020  * Read Priority in Fixed/Limiter mode
0021  */
0022 #define PRIORITY0_SHIFT 0
0023 /*
0024  * Low throughput priority level in Regulator mode
0025  * Write Priority in Fixed/Limiter mode
0026  */
0027 #define PRIORITY1_SHIFT 8
0028 #define PRIORITY_MASK       0x7
0029
0030 #define PRIORITY_COMP_MARK  BIT(31) /* Must set */
0031
0032 #define IMX_NOC_MODE_FIXED      0
0033 #define IMX_NOC_MODE_LIMITER        1
0034 #define IMX_NOC_MODE_BYPASS     2
0035 #define IMX_NOC_MODE_REGULATOR      3
0036 #define IMX_NOC_MODE_UNCONFIGURED   0xFF
0037
0038 #define IMX_NOC_PRIO_REG    0x8
0039 #define IMX_NOC_MODE_REG    0xC
0040 #define IMX_NOC_BANDWIDTH_REG   0x10
0041 #define IMX_NOC_SATURATION  0x14
0042 #define IMX_NOC_EXT_CTL_REG 0x18
0043
0044 struct imx_icc_provider {
0045     void __iomem *noc_base;
0046     struct icc_provider provider;
0047 };
0048
0049 /*
0050  * struct imx_icc_node_adj - Describe a dynamic adjustable node
0051  */
0052 struct imx_icc_node_adj_desc {
0053     unsigned int bw_mul, bw_div;
0054     const char *phandle_name;
0055     bool main_noc;
0056 };
0057
0058 /*
0059  * struct imx_icc_node - Describe an interconnect node
0060  * @name: name of the node
0061  * @id: an unique id to identify the node
0062  * @links: an array of slaves' node id
0063  * @num_links: number of id defined in links
0064  */
0065 struct imx_icc_node_desc {
0066     const char *name;
0067     u16 id;
0068     u16 links[IMX_ICC_MAX_LINKS];
0069     u16 num_links;
0070     const struct imx_icc_node_adj_desc *adj;
0071 };
0072
0073 /*
0074  * struct imx_icc_noc_setting - Describe an interconnect node setting
0075  * @reg: register offset inside the NoC
0076  * @prio_level: priority level
0077  * @mode: functional mode
0078  * @ext_control: external input control
0079  */
0080 struct imx_icc_noc_setting {
0081     u32 reg;
0082     u32 prio_level;
0083     u32 mode;
0084     u32 ext_control;
0085 };
0086
0087 #define DEFINE_BUS_INTERCONNECT(_name, _id, _adj, ...)          \
0088     {                               \
0089         .id = _id,                      \
0090         .name = _name,                      \
0091         .adj = _adj,                        \
0092         .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })),  \
0093         .links = { __VA_ARGS__ },               \
0094     }
0095
0096 #define DEFINE_BUS_MASTER(_name, _id, _dest_id)             \
0097     DEFINE_BUS_INTERCONNECT(_name, _id, NULL, _dest_id)
0098
0099 #define DEFINE_BUS_SLAVE(_name, _id, _adj)              \
0100     DEFINE_BUS_INTERCONNECT(_name, _id, _adj)
0101
0102 int imx_icc_register(struct platform_device *pdev,
0103              struct imx_icc_node_desc *nodes,
0104              int nodes_count,
0105              struct imx_icc_noc_setting *noc_settings);
0106 int imx_icc_unregister(struct platform_device *pdev);
0107
0108 #endif /* __DRIVERS_INTERCONNECT_IMX_H */