input/serio/apbps2.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2013 Aeroflex Gaisler
0004  *
0005  * This driver supports the APBPS2 PS/2 core available in the GRLIB
0006  * VHDL IP core library.
0007  *
0008  * Full documentation of the APBPS2 core can be found here:
0009  * http://www.gaisler.com/products/grlib/grip.pdf
0010  *
0011  * See "Documentation/devicetree/bindings/input/ps2keyb-mouse-apbps2.txt" for
0012  * information on open firmware properties.
0013  *
0014  * Contributors: Daniel Hellstrom <daniel@gaisler.com>
0015  */
0016 #include <linux/platform_device.h>
0017 #include <linux/of_device.h>
0018 #include <linux/module.h>
0019 #include <linux/serio.h>
0020 #include <linux/errno.h>
0021 #include <linux/interrupt.h>
0022 #include <linux/of_irq.h>
0023 #include <linux/device.h>
0024 #include <linux/delay.h>
0025 #include <linux/err.h>
0026 #include <linux/slab.h>
0027 #include <linux/string.h>
0028 #include <linux/kernel.h>
0029 #include <linux/io.h>
0030
0031 struct apbps2_regs {
0032     u32 __iomem data;   /* 0x00 */
0033     u32 __iomem status; /* 0x04 */
0034     u32 __iomem ctrl;   /* 0x08 */
0035     u32 __iomem reload; /* 0x0c */
0036 };
0037
0038 #define APBPS2_STATUS_DR    (1<<0)
0039 #define APBPS2_STATUS_PE    (1<<1)
0040 #define APBPS2_STATUS_FE    (1<<2)
0041 #define APBPS2_STATUS_KI    (1<<3)
0042 #define APBPS2_STATUS_RF    (1<<4)
0043 #define APBPS2_STATUS_TF    (1<<5)
0044 #define APBPS2_STATUS_TCNT  (0x1f<<22)
0045 #define APBPS2_STATUS_RCNT  (0x1f<<27)
0046
0047 #define APBPS2_CTRL_RE      (1<<0)
0048 #define APBPS2_CTRL_TE      (1<<1)
0049 #define APBPS2_CTRL_RI      (1<<2)
0050 #define APBPS2_CTRL_TI      (1<<3)
0051
0052 struct apbps2_priv {
0053     struct serio        *io;
0054     struct apbps2_regs  __iomem *regs;
0055 };
0056
0057 static int apbps2_idx;
0058
0059 static irqreturn_t apbps2_isr(int irq, void *dev_id)
0060 {
0061     struct apbps2_priv *priv = dev_id;
0062     unsigned long status, data, rxflags;
0063     irqreturn_t ret = IRQ_NONE;
0064
0065     while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) {
0066         data = ioread32be(&priv->regs->data);
0067         rxflags = (status & APBPS2_STATUS_PE) ? SERIO_PARITY : 0;
0068         rxflags |= (status & APBPS2_STATUS_FE) ? SERIO_FRAME : 0;
0069
0070         /* clear error bits? */
0071         if (rxflags)
0072             iowrite32be(0, &priv->regs->status);
0073
0074         serio_interrupt(priv->io, data, rxflags);
0075
0076         ret = IRQ_HANDLED;
0077     }
0078
0079     return ret;
0080 }
0081
0082 static int apbps2_write(struct serio *io, unsigned char val)
0083 {
0084     struct apbps2_priv *priv = io->port_data;
0085     unsigned int tleft = 10000; /* timeout in 100ms */
0086
0087     /* delay until PS/2 controller has room for more chars */
0088     while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--)
0089         udelay(10);
0090
0091     if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) {
0092         iowrite32be(val, &priv->regs->data);
0093
0094         iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI | APBPS2_CTRL_TE,
0095                 &priv->regs->ctrl);
0096         return 0;
0097     }
0098
0099     return -ETIMEDOUT;
0100 }
0101
0102 static int apbps2_open(struct serio *io)
0103 {
0104     struct apbps2_priv *priv = io->port_data;
0105     int limit;
0106
0107     /* clear error flags */
0108     iowrite32be(0, &priv->regs->status);
0109
0110     /* Clear old data if available (unlikely) */
0111     limit = 1024;
0112     while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit)
0113         ioread32be(&priv->regs->data);
0114
0115     /* Enable reciever and it's interrupt */
0116     iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI, &priv->regs->ctrl);
0117
0118     return 0;
0119 }
0120
0121 static void apbps2_close(struct serio *io)
0122 {
0123     struct apbps2_priv *priv = io->port_data;
0124
0125     /* stop interrupts at PS/2 HW level */
0126     iowrite32be(0, &priv->regs->ctrl);
0127 }
0128
0129 /* Initialize one APBPS2 PS/2 core */
0130 static int apbps2_of_probe(struct platform_device *ofdev)
0131 {
0132     struct apbps2_priv *priv;
0133     int irq, err;
0134     u32 freq_hz;
0135     struct resource *res;
0136
0137     priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL);
0138     if (!priv) {
0139         dev_err(&ofdev->dev, "memory allocation failed\n");
0140         return -ENOMEM;
0141     }
0142
0143     /* Find Device Address */
0144     res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
0145     priv->regs = devm_ioremap_resource(&ofdev->dev, res);
0146     if (IS_ERR(priv->regs))
0147         return PTR_ERR(priv->regs);
0148
0149     /* Reset hardware, disable interrupt */
0150     iowrite32be(0, &priv->regs->ctrl);
0151
0152     /* IRQ */
0153     irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
0154     err = devm_request_irq(&ofdev->dev, irq, apbps2_isr,
0155                 IRQF_SHARED, "apbps2", priv);
0156     if (err) {
0157         dev_err(&ofdev->dev, "request IRQ%d failed\n", irq);
0158         return err;
0159     }
0160
0161     /* Get core frequency */
0162     if (of_property_read_u32(ofdev->dev.of_node, "freq", &freq_hz)) {
0163         dev_err(&ofdev->dev, "unable to get core frequency\n");
0164         return -EINVAL;
0165     }
0166
0167     /* Set reload register to core freq in kHz/10 */
0168     iowrite32be(freq_hz / 10000, &priv->regs->reload);
0169
0170     priv->io = kzalloc(sizeof(struct serio), GFP_KERNEL);
0171     if (!priv->io)
0172         return -ENOMEM;
0173
0174     priv->io->id.type = SERIO_8042;
0175     priv->io->open = apbps2_open;
0176     priv->io->close = apbps2_close;
0177     priv->io->write = apbps2_write;
0178     priv->io->port_data = priv;
0179     strlcpy(priv->io->name, "APBPS2 PS/2", sizeof(priv->io->name));
0180     snprintf(priv->io->phys, sizeof(priv->io->phys),
0181          "apbps2_%d", apbps2_idx++);
0182
0183     dev_info(&ofdev->dev, "irq = %d, base = 0x%p\n", irq, priv->regs);
0184
0185     serio_register_port(priv->io);
0186
0187     platform_set_drvdata(ofdev, priv);
0188
0189     return 0;
0190 }
0191
0192 static int apbps2_of_remove(struct platform_device *of_dev)
0193 {
0194     struct apbps2_priv *priv = platform_get_drvdata(of_dev);
0195
0196     serio_unregister_port(priv->io);
0197
0198     return 0;
0199 }
0200
0201 static const struct of_device_id apbps2_of_match[] = {
0202     { .name = "GAISLER_APBPS2", },
0203     { .name = "01_060", },
0204     {}
0205 };
0206
0207 MODULE_DEVICE_TABLE(of, apbps2_of_match);
0208
0209 static struct platform_driver apbps2_of_driver = {
0210     .driver = {
0211         .name = "grlib-apbps2",
0212         .of_match_table = apbps2_of_match,
0213     },
0214     .probe = apbps2_of_probe,
0215     .remove = apbps2_of_remove,
0216 };
0217
0218 module_platform_driver(apbps2_of_driver);
0219
0220 MODULE_AUTHOR("Aeroflex Gaisler AB.");
0221 MODULE_DESCRIPTION("GRLIB APBPS2 PS/2 serial I/O");
0222 MODULE_LICENSE("GPL");