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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Azoteq IQS626A Capacitive Touch Controller
0004  *
0005  * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com>
0006  *
0007  * This driver registers up to 2 input devices: one representing capacitive or
0008  * inductive keys as well as Hall-effect switches, and one for a trackpad that
0009  * can express various gestures.
0010  */
0011 
0012 #include <linux/bits.h>
0013 #include <linux/completion.h>
0014 #include <linux/delay.h>
0015 #include <linux/device.h>
0016 #include <linux/err.h>
0017 #include <linux/i2c.h>
0018 #include <linux/input.h>
0019 #include <linux/input/touchscreen.h>
0020 #include <linux/interrupt.h>
0021 #include <linux/kernel.h>
0022 #include <linux/module.h>
0023 #include <linux/of_device.h>
0024 #include <linux/property.h>
0025 #include <linux/regmap.h>
0026 #include <linux/slab.h>
0027 
0028 #define IQS626_VER_INFO             0x00
0029 #define IQS626_VER_INFO_PROD_NUM        0x51
0030 
0031 #define IQS626_SYS_FLAGS            0x02
0032 #define IQS626_SYS_FLAGS_SHOW_RESET     BIT(15)
0033 #define IQS626_SYS_FLAGS_IN_ATI         BIT(12)
0034 #define IQS626_SYS_FLAGS_PWR_MODE_MASK      GENMASK(9, 8)
0035 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT     8
0036 
0037 #define IQS626_HALL_OUTPUT          0x23
0038 
0039 #define IQS626_SYS_SETTINGS         0x80
0040 #define IQS626_SYS_SETTINGS_CLK_DIV     BIT(15)
0041 #define IQS626_SYS_SETTINGS_ULP_AUTO        BIT(14)
0042 #define IQS626_SYS_SETTINGS_DIS_AUTO        BIT(13)
0043 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK   GENMASK(12, 11)
0044 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT  11
0045 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX    3
0046 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
0047 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT    8
0048 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX  7
0049 #define IQS626_SYS_SETTINGS_EVENT_MODE      BIT(5)
0050 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP   BIT(4)
0051 #define IQS626_SYS_SETTINGS_REDO_ATI        BIT(2)
0052 #define IQS626_SYS_SETTINGS_ACK_RESET       BIT(0)
0053 
0054 #define IQS626_MISC_A_ATI_BAND_DISABLE      BIT(7)
0055 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK   GENMASK(6, 4)
0056 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT  4
0057 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX    7
0058 #define IQS626_MISC_A_ATI_LP_ONLY       BIT(3)
0059 #define IQS626_MISC_A_GPIO3_SELECT_MASK     GENMASK(2, 0)
0060 #define IQS626_MISC_A_GPIO3_SELECT_MAX      7
0061 
0062 #define IQS626_EVENT_MASK_SYS           BIT(6)
0063 #define IQS626_EVENT_MASK_GESTURE       BIT(3)
0064 #define IQS626_EVENT_MASK_DEEP          BIT(2)
0065 #define IQS626_EVENT_MASK_TOUCH         BIT(1)
0066 #define IQS626_EVENT_MASK_PROX          BIT(0)
0067 
0068 #define IQS626_RATE_NP_MS_MAX           255
0069 #define IQS626_RATE_LP_MS_MAX           255
0070 #define IQS626_RATE_ULP_MS_MAX          4080
0071 #define IQS626_TIMEOUT_PWR_MS_MAX       130560
0072 #define IQS626_TIMEOUT_LTA_MS_MAX       130560
0073 
0074 #define IQS626_MISC_B_RESEED_UI_SEL_MASK    GENMASK(7, 6)
0075 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT   6
0076 #define IQS626_MISC_B_RESEED_UI_SEL_MAX     3
0077 #define IQS626_MISC_B_THRESH_EXTEND     BIT(5)
0078 #define IQS626_MISC_B_TRACKING_UI_ENABLE    BIT(4)
0079 #define IQS626_MISC_B_TPx_SWIPE         BIT(3)
0080 #define IQS626_MISC_B_RESEED_OFFSET     BIT(2)
0081 #define IQS626_MISC_B_FILT_STR_TPx      GENMASK(1, 0)
0082 
0083 #define IQS626_THRESH_SWIPE_MAX         255
0084 #define IQS626_TIMEOUT_TAP_MS_MAX       4080
0085 #define IQS626_TIMEOUT_SWIPE_MS_MAX     4080
0086 
0087 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE      BIT(7)
0088 #define IQS626_CHx_ENG_0_RX_TERM_VSS        BIT(5)
0089 #define IQS626_CHx_ENG_0_LINEARIZE      BIT(4)
0090 #define IQS626_CHx_ENG_0_DUAL_DIR       BIT(3)
0091 #define IQS626_CHx_ENG_0_FILT_DISABLE       BIT(2)
0092 #define IQS626_CHx_ENG_0_ATI_MODE_MASK      GENMASK(1, 0)
0093 #define IQS626_CHx_ENG_0_ATI_MODE_MAX       3
0094 
0095 #define IQS626_CHx_ENG_1_CCT_HIGH_1     BIT(7)
0096 #define IQS626_CHx_ENG_1_CCT_HIGH_0     BIT(6)
0097 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK     GENMASK(5, 4)
0098 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT    4
0099 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX      3
0100 #define IQS626_CHx_ENG_1_CCT_ENABLE     BIT(3)
0101 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK    GENMASK(2, 1)
0102 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT   1
0103 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX     3
0104 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN   BIT(0)
0105 
0106 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK     GENMASK(7, 6)
0107 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT    6
0108 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX      3
0109 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE   BIT(5)
0110 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK    GENMASK(3, 0)
0111 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX     15
0112 
0113 #define IQS626_CHx_ENG_3_TX_FREQ_MASK       GENMASK(5, 4)
0114 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT      4
0115 #define IQS626_CHx_ENG_3_TX_FREQ_MAX        3
0116 #define IQS626_CHx_ENG_3_INV_LOGIC      BIT(0)
0117 
0118 #define IQS626_CHx_ENG_4_RX_TERM_VREG       BIT(6)
0119 #define IQS626_CHx_ENG_4_CCT_LOW_1      BIT(5)
0120 #define IQS626_CHx_ENG_4_CCT_LOW_0      BIT(4)
0121 #define IQS626_CHx_ENG_4_COMP_DISABLE       BIT(1)
0122 #define IQS626_CHx_ENG_4_STATIC_ENABLE      BIT(0)
0123 
0124 #define IQS626_TPx_ATI_BASE_MIN         45
0125 #define IQS626_TPx_ATI_BASE_MAX         300
0126 #define IQS626_CHx_ATI_BASE_MASK        GENMASK(7, 6)
0127 #define IQS626_CHx_ATI_BASE_75          0x00
0128 #define IQS626_CHx_ATI_BASE_100         0x40
0129 #define IQS626_CHx_ATI_BASE_150         0x80
0130 #define IQS626_CHx_ATI_BASE_200         0xC0
0131 #define IQS626_CHx_ATI_TARGET_MASK      GENMASK(5, 0)
0132 #define IQS626_CHx_ATI_TARGET_MAX       2016
0133 
0134 #define IQS626_CHx_THRESH_MAX           255
0135 #define IQS626_CHx_HYST_DEEP_MASK       GENMASK(7, 4)
0136 #define IQS626_CHx_HYST_DEEP_SHIFT      4
0137 #define IQS626_CHx_HYST_TOUCH_MASK      GENMASK(3, 0)
0138 #define IQS626_CHx_HYST_MAX         15
0139 
0140 #define IQS626_FILT_STR_NP_TPx_MASK     GENMASK(7, 6)
0141 #define IQS626_FILT_STR_NP_TPx_SHIFT        6
0142 #define IQS626_FILT_STR_LP_TPx_MASK     GENMASK(5, 4)
0143 #define IQS626_FILT_STR_LP_TPx_SHIFT        4
0144 
0145 #define IQS626_FILT_STR_NP_CNT_MASK     GENMASK(7, 6)
0146 #define IQS626_FILT_STR_NP_CNT_SHIFT        6
0147 #define IQS626_FILT_STR_LP_CNT_MASK     GENMASK(5, 4)
0148 #define IQS626_FILT_STR_LP_CNT_SHIFT        4
0149 #define IQS626_FILT_STR_NP_LTA_MASK     GENMASK(3, 2)
0150 #define IQS626_FILT_STR_NP_LTA_SHIFT        2
0151 #define IQS626_FILT_STR_LP_LTA_MASK     GENMASK(1, 0)
0152 #define IQS626_FILT_STR_MAX         3
0153 
0154 #define IQS626_ULP_PROJ_ENABLE          BIT(4)
0155 #define IQS626_GEN_WEIGHT_MAX           255
0156 
0157 #define IQS626_MAX_REG              0xFF
0158 
0159 #define IQS626_NUM_CH_TP_3          9
0160 #define IQS626_NUM_CH_TP_2          6
0161 #define IQS626_NUM_CH_GEN           3
0162 #define IQS626_NUM_CRx_TX           8
0163 
0164 #define IQS626_PWR_MODE_POLL_SLEEP_US       50000
0165 #define IQS626_PWR_MODE_POLL_TIMEOUT_US     500000
0166 
0167 #define iqs626_irq_wait()           usleep_range(350, 400)
0168 
0169 enum iqs626_ch_id {
0170     IQS626_CH_ULP_0,
0171     IQS626_CH_TP_2,
0172     IQS626_CH_TP_3,
0173     IQS626_CH_GEN_0,
0174     IQS626_CH_GEN_1,
0175     IQS626_CH_GEN_2,
0176     IQS626_CH_HALL,
0177 };
0178 
0179 enum iqs626_rx_inactive {
0180     IQS626_RX_INACTIVE_VSS,
0181     IQS626_RX_INACTIVE_FLOAT,
0182     IQS626_RX_INACTIVE_VREG,
0183 };
0184 
0185 enum iqs626_st_offs {
0186     IQS626_ST_OFFS_PROX,
0187     IQS626_ST_OFFS_DIR,
0188     IQS626_ST_OFFS_TOUCH,
0189     IQS626_ST_OFFS_DEEP,
0190 };
0191 
0192 enum iqs626_th_offs {
0193     IQS626_TH_OFFS_PROX,
0194     IQS626_TH_OFFS_TOUCH,
0195     IQS626_TH_OFFS_DEEP,
0196 };
0197 
0198 enum iqs626_event_id {
0199     IQS626_EVENT_PROX_DN,
0200     IQS626_EVENT_PROX_UP,
0201     IQS626_EVENT_TOUCH_DN,
0202     IQS626_EVENT_TOUCH_UP,
0203     IQS626_EVENT_DEEP_DN,
0204     IQS626_EVENT_DEEP_UP,
0205 };
0206 
0207 enum iqs626_gesture_id {
0208     IQS626_GESTURE_FLICK_X_POS,
0209     IQS626_GESTURE_FLICK_X_NEG,
0210     IQS626_GESTURE_FLICK_Y_POS,
0211     IQS626_GESTURE_FLICK_Y_NEG,
0212     IQS626_GESTURE_TAP,
0213     IQS626_GESTURE_HOLD,
0214     IQS626_NUM_GESTURES,
0215 };
0216 
0217 struct iqs626_event_desc {
0218     const char *name;
0219     enum iqs626_st_offs st_offs;
0220     enum iqs626_th_offs th_offs;
0221     bool dir_up;
0222     u8 mask;
0223 };
0224 
0225 static const struct iqs626_event_desc iqs626_events[] = {
0226     [IQS626_EVENT_PROX_DN] = {
0227         .name = "event-prox",
0228         .st_offs = IQS626_ST_OFFS_PROX,
0229         .th_offs = IQS626_TH_OFFS_PROX,
0230         .mask = IQS626_EVENT_MASK_PROX,
0231     },
0232     [IQS626_EVENT_PROX_UP] = {
0233         .name = "event-prox-alt",
0234         .st_offs = IQS626_ST_OFFS_PROX,
0235         .th_offs = IQS626_TH_OFFS_PROX,
0236         .dir_up = true,
0237         .mask = IQS626_EVENT_MASK_PROX,
0238     },
0239     [IQS626_EVENT_TOUCH_DN] = {
0240         .name = "event-touch",
0241         .st_offs = IQS626_ST_OFFS_TOUCH,
0242         .th_offs = IQS626_TH_OFFS_TOUCH,
0243         .mask = IQS626_EVENT_MASK_TOUCH,
0244     },
0245     [IQS626_EVENT_TOUCH_UP] = {
0246         .name = "event-touch-alt",
0247         .st_offs = IQS626_ST_OFFS_TOUCH,
0248         .th_offs = IQS626_TH_OFFS_TOUCH,
0249         .dir_up = true,
0250         .mask = IQS626_EVENT_MASK_TOUCH,
0251     },
0252     [IQS626_EVENT_DEEP_DN] = {
0253         .name = "event-deep",
0254         .st_offs = IQS626_ST_OFFS_DEEP,
0255         .th_offs = IQS626_TH_OFFS_DEEP,
0256         .mask = IQS626_EVENT_MASK_DEEP,
0257     },
0258     [IQS626_EVENT_DEEP_UP] = {
0259         .name = "event-deep-alt",
0260         .st_offs = IQS626_ST_OFFS_DEEP,
0261         .th_offs = IQS626_TH_OFFS_DEEP,
0262         .dir_up = true,
0263         .mask = IQS626_EVENT_MASK_DEEP,
0264     },
0265 };
0266 
0267 struct iqs626_ver_info {
0268     u8 prod_num;
0269     u8 sw_num;
0270     u8 hw_num;
0271     u8 padding;
0272 } __packed;
0273 
0274 struct iqs626_flags {
0275     __be16 system;
0276     u8 gesture;
0277     u8 padding_a;
0278     u8 states[4];
0279     u8 ref_active;
0280     u8 padding_b;
0281     u8 comp_min;
0282     u8 comp_max;
0283     u8 trackpad_x;
0284     u8 trackpad_y;
0285 } __packed;
0286 
0287 struct iqs626_ch_reg_ulp {
0288     u8 thresh[2];
0289     u8 hyst;
0290     u8 filter;
0291     u8 engine[2];
0292     u8 ati_target;
0293     u8 padding;
0294     __be16 ati_comp;
0295     u8 rx_enable;
0296     u8 tx_enable;
0297 } __packed;
0298 
0299 struct iqs626_ch_reg_tp {
0300     u8 thresh;
0301     u8 ati_base;
0302     __be16 ati_comp;
0303 } __packed;
0304 
0305 struct iqs626_tp_grp_reg {
0306     u8 hyst;
0307     u8 ati_target;
0308     u8 engine[2];
0309     struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3];
0310 } __packed;
0311 
0312 struct iqs626_ch_reg_gen {
0313     u8 thresh[3];
0314     u8 padding;
0315     u8 hyst;
0316     u8 ati_target;
0317     __be16 ati_comp;
0318     u8 engine[5];
0319     u8 filter;
0320     u8 rx_enable;
0321     u8 tx_enable;
0322     u8 assoc_select;
0323     u8 assoc_weight;
0324 } __packed;
0325 
0326 struct iqs626_ch_reg_hall {
0327     u8 engine;
0328     u8 thresh;
0329     u8 hyst;
0330     u8 ati_target;
0331     __be16 ati_comp;
0332 } __packed;
0333 
0334 struct iqs626_sys_reg {
0335     __be16 general;
0336     u8 misc_a;
0337     u8 event_mask;
0338     u8 active;
0339     u8 reseed;
0340     u8 rate_np;
0341     u8 rate_lp;
0342     u8 rate_ulp;
0343     u8 timeout_pwr;
0344     u8 timeout_rdy;
0345     u8 timeout_lta;
0346     u8 misc_b;
0347     u8 thresh_swipe;
0348     u8 timeout_tap;
0349     u8 timeout_swipe;
0350     u8 redo_ati;
0351     u8 padding;
0352     struct iqs626_ch_reg_ulp ch_reg_ulp;
0353     struct iqs626_tp_grp_reg tp_grp_reg;
0354     struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN];
0355     struct iqs626_ch_reg_hall ch_reg_hall;
0356 } __packed;
0357 
0358 struct iqs626_channel_desc {
0359     const char *name;
0360     int num_ch;
0361     u8 active;
0362     bool events[ARRAY_SIZE(iqs626_events)];
0363 };
0364 
0365 static const struct iqs626_channel_desc iqs626_channels[] = {
0366     [IQS626_CH_ULP_0] = {
0367         .name = "ulp-0",
0368         .num_ch = 1,
0369         .active = BIT(0),
0370         .events = {
0371             [IQS626_EVENT_PROX_DN] = true,
0372             [IQS626_EVENT_PROX_UP] = true,
0373             [IQS626_EVENT_TOUCH_DN] = true,
0374             [IQS626_EVENT_TOUCH_UP] = true,
0375         },
0376     },
0377     [IQS626_CH_TP_2] = {
0378         .name = "trackpad-3x2",
0379         .num_ch = IQS626_NUM_CH_TP_2,
0380         .active = BIT(1),
0381         .events = {
0382             [IQS626_EVENT_TOUCH_DN] = true,
0383         },
0384     },
0385     [IQS626_CH_TP_3] = {
0386         .name = "trackpad-3x3",
0387         .num_ch = IQS626_NUM_CH_TP_3,
0388         .active = BIT(2) | BIT(1),
0389         .events = {
0390             [IQS626_EVENT_TOUCH_DN] = true,
0391         },
0392     },
0393     [IQS626_CH_GEN_0] = {
0394         .name = "generic-0",
0395         .num_ch = 1,
0396         .active = BIT(4),
0397         .events = {
0398             [IQS626_EVENT_PROX_DN] = true,
0399             [IQS626_EVENT_PROX_UP] = true,
0400             [IQS626_EVENT_TOUCH_DN] = true,
0401             [IQS626_EVENT_TOUCH_UP] = true,
0402             [IQS626_EVENT_DEEP_DN] = true,
0403             [IQS626_EVENT_DEEP_UP] = true,
0404         },
0405     },
0406     [IQS626_CH_GEN_1] = {
0407         .name = "generic-1",
0408         .num_ch = 1,
0409         .active = BIT(5),
0410         .events = {
0411             [IQS626_EVENT_PROX_DN] = true,
0412             [IQS626_EVENT_PROX_UP] = true,
0413             [IQS626_EVENT_TOUCH_DN] = true,
0414             [IQS626_EVENT_TOUCH_UP] = true,
0415             [IQS626_EVENT_DEEP_DN] = true,
0416             [IQS626_EVENT_DEEP_UP] = true,
0417         },
0418     },
0419     [IQS626_CH_GEN_2] = {
0420         .name = "generic-2",
0421         .num_ch = 1,
0422         .active = BIT(6),
0423         .events = {
0424             [IQS626_EVENT_PROX_DN] = true,
0425             [IQS626_EVENT_PROX_UP] = true,
0426             [IQS626_EVENT_TOUCH_DN] = true,
0427             [IQS626_EVENT_TOUCH_UP] = true,
0428             [IQS626_EVENT_DEEP_DN] = true,
0429             [IQS626_EVENT_DEEP_UP] = true,
0430         },
0431     },
0432     [IQS626_CH_HALL] = {
0433         .name = "hall",
0434         .num_ch = 1,
0435         .active = BIT(7),
0436         .events = {
0437             [IQS626_EVENT_TOUCH_DN] = true,
0438             [IQS626_EVENT_TOUCH_UP] = true,
0439         },
0440     },
0441 };
0442 
0443 struct iqs626_private {
0444     struct i2c_client *client;
0445     struct regmap *regmap;
0446     struct iqs626_sys_reg sys_reg;
0447     struct completion ati_done;
0448     struct input_dev *keypad;
0449     struct input_dev *trackpad;
0450     struct touchscreen_properties prop;
0451     unsigned int kp_type[ARRAY_SIZE(iqs626_channels)]
0452                 [ARRAY_SIZE(iqs626_events)];
0453     unsigned int kp_code[ARRAY_SIZE(iqs626_channels)]
0454                 [ARRAY_SIZE(iqs626_events)];
0455     unsigned int tp_code[IQS626_NUM_GESTURES];
0456     unsigned int suspend_mode;
0457 };
0458 
0459 static noinline_for_stack int
0460 iqs626_parse_events(struct iqs626_private *iqs626,
0461             const struct fwnode_handle *ch_node,
0462             enum iqs626_ch_id ch_id)
0463 {
0464     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
0465     struct i2c_client *client = iqs626->client;
0466     const struct fwnode_handle *ev_node;
0467     const char *ev_name;
0468     u8 *thresh, *hyst;
0469     unsigned int thresh_tp[IQS626_NUM_CH_TP_3];
0470     unsigned int val;
0471     int num_ch = iqs626_channels[ch_id].num_ch;
0472     int error, i, j;
0473 
0474     switch (ch_id) {
0475     case IQS626_CH_ULP_0:
0476         thresh = sys_reg->ch_reg_ulp.thresh;
0477         hyst = &sys_reg->ch_reg_ulp.hyst;
0478         break;
0479 
0480     case IQS626_CH_TP_2:
0481     case IQS626_CH_TP_3:
0482         thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh;
0483         hyst = &sys_reg->tp_grp_reg.hyst;
0484         break;
0485 
0486     case IQS626_CH_GEN_0:
0487     case IQS626_CH_GEN_1:
0488     case IQS626_CH_GEN_2:
0489         i = ch_id - IQS626_CH_GEN_0;
0490         thresh = sys_reg->ch_reg_gen[i].thresh;
0491         hyst = &sys_reg->ch_reg_gen[i].hyst;
0492         break;
0493 
0494     case IQS626_CH_HALL:
0495         thresh = &sys_reg->ch_reg_hall.thresh;
0496         hyst = &sys_reg->ch_reg_hall.hyst;
0497         break;
0498 
0499     default:
0500         return -EINVAL;
0501     }
0502 
0503     for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) {
0504         if (!iqs626_channels[ch_id].events[i])
0505             continue;
0506 
0507         if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) {
0508             /*
0509              * Trackpad touch events are simply described under the
0510              * trackpad child node.
0511              */
0512             ev_node = ch_node;
0513         } else {
0514             ev_name = iqs626_events[i].name;
0515             ev_node = fwnode_get_named_child_node(ch_node, ev_name);
0516             if (!ev_node)
0517                 continue;
0518 
0519             if (!fwnode_property_read_u32(ev_node, "linux,code",
0520                               &val)) {
0521                 iqs626->kp_code[ch_id][i] = val;
0522 
0523                 if (fwnode_property_read_u32(ev_node,
0524                                  "linux,input-type",
0525                                  &val)) {
0526                     if (ch_id == IQS626_CH_HALL)
0527                         val = EV_SW;
0528                     else
0529                         val = EV_KEY;
0530                 }
0531 
0532                 if (val != EV_KEY && val != EV_SW) {
0533                     dev_err(&client->dev,
0534                         "Invalid input type: %u\n",
0535                         val);
0536                     return -EINVAL;
0537                 }
0538 
0539                 iqs626->kp_type[ch_id][i] = val;
0540 
0541                 sys_reg->event_mask &= ~iqs626_events[i].mask;
0542             }
0543         }
0544 
0545         if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
0546             if (val > IQS626_CHx_HYST_MAX) {
0547                 dev_err(&client->dev,
0548                     "Invalid %s channel hysteresis: %u\n",
0549                     fwnode_get_name(ch_node), val);
0550                 return -EINVAL;
0551             }
0552 
0553             if (i == IQS626_EVENT_DEEP_DN ||
0554                 i == IQS626_EVENT_DEEP_UP) {
0555                 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK;
0556                 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT);
0557             } else if (i == IQS626_EVENT_TOUCH_DN ||
0558                    i == IQS626_EVENT_TOUCH_UP) {
0559                 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK;
0560                 *hyst |= val;
0561             }
0562         }
0563 
0564         if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
0565             !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
0566             if (val > IQS626_CHx_THRESH_MAX) {
0567                 dev_err(&client->dev,
0568                     "Invalid %s channel threshold: %u\n",
0569                     fwnode_get_name(ch_node), val);
0570                 return -EINVAL;
0571             }
0572 
0573             if (ch_id == IQS626_CH_HALL)
0574                 *thresh = val;
0575             else
0576                 *(thresh + iqs626_events[i].th_offs) = val;
0577 
0578             continue;
0579         }
0580 
0581         if (!fwnode_property_present(ev_node, "azoteq,thresh"))
0582             continue;
0583 
0584         error = fwnode_property_read_u32_array(ev_node, "azoteq,thresh",
0585                                thresh_tp, num_ch);
0586         if (error) {
0587             dev_err(&client->dev,
0588                 "Failed to read %s channel thresholds: %d\n",
0589                 fwnode_get_name(ch_node), error);
0590             return error;
0591         }
0592 
0593         for (j = 0; j < num_ch; j++) {
0594             if (thresh_tp[j] > IQS626_CHx_THRESH_MAX) {
0595                 dev_err(&client->dev,
0596                     "Invalid %s channel threshold: %u\n",
0597                     fwnode_get_name(ch_node), thresh_tp[j]);
0598                 return -EINVAL;
0599             }
0600 
0601             sys_reg->tp_grp_reg.ch_reg_tp[j].thresh = thresh_tp[j];
0602         }
0603     }
0604 
0605     return 0;
0606 }
0607 
0608 static noinline_for_stack int
0609 iqs626_parse_ati_target(struct iqs626_private *iqs626,
0610             const struct fwnode_handle *ch_node,
0611             enum iqs626_ch_id ch_id)
0612 {
0613     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
0614     struct i2c_client *client = iqs626->client;
0615     unsigned int ati_base[IQS626_NUM_CH_TP_3];
0616     unsigned int val;
0617     u8 *ati_target;
0618     int num_ch = iqs626_channels[ch_id].num_ch;
0619     int error, i;
0620 
0621     switch (ch_id) {
0622     case IQS626_CH_ULP_0:
0623         ati_target = &sys_reg->ch_reg_ulp.ati_target;
0624         break;
0625 
0626     case IQS626_CH_TP_2:
0627     case IQS626_CH_TP_3:
0628         ati_target = &sys_reg->tp_grp_reg.ati_target;
0629         break;
0630 
0631     case IQS626_CH_GEN_0:
0632     case IQS626_CH_GEN_1:
0633     case IQS626_CH_GEN_2:
0634         i = ch_id - IQS626_CH_GEN_0;
0635         ati_target = &sys_reg->ch_reg_gen[i].ati_target;
0636         break;
0637 
0638     case IQS626_CH_HALL:
0639         ati_target = &sys_reg->ch_reg_hall.ati_target;
0640         break;
0641 
0642     default:
0643         return -EINVAL;
0644     }
0645 
0646     if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
0647         if (val > IQS626_CHx_ATI_TARGET_MAX) {
0648             dev_err(&client->dev,
0649                 "Invalid %s channel ATI target: %u\n",
0650                 fwnode_get_name(ch_node), val);
0651             return -EINVAL;
0652         }
0653 
0654         *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK;
0655         *ati_target |= (val / 32);
0656     }
0657 
0658     if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
0659         !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
0660         switch (val) {
0661         case 75:
0662             val = IQS626_CHx_ATI_BASE_75;
0663             break;
0664 
0665         case 100:
0666             val = IQS626_CHx_ATI_BASE_100;
0667             break;
0668 
0669         case 150:
0670             val = IQS626_CHx_ATI_BASE_150;
0671             break;
0672 
0673         case 200:
0674             val = IQS626_CHx_ATI_BASE_200;
0675             break;
0676 
0677         default:
0678             dev_err(&client->dev,
0679                 "Invalid %s channel ATI base: %u\n",
0680                 fwnode_get_name(ch_node), val);
0681             return -EINVAL;
0682         }
0683 
0684         *ati_target &= ~IQS626_CHx_ATI_BASE_MASK;
0685         *ati_target |= val;
0686 
0687         return 0;
0688     }
0689 
0690     if (!fwnode_property_present(ch_node, "azoteq,ati-base"))
0691         return 0;
0692 
0693     error = fwnode_property_read_u32_array(ch_node, "azoteq,ati-base",
0694                            ati_base, num_ch);
0695     if (error) {
0696         dev_err(&client->dev,
0697             "Failed to read %s channel ATI bases: %d\n",
0698             fwnode_get_name(ch_node), error);
0699         return error;
0700     }
0701 
0702     for (i = 0; i < num_ch; i++) {
0703         if (ati_base[i] < IQS626_TPx_ATI_BASE_MIN ||
0704             ati_base[i] > IQS626_TPx_ATI_BASE_MAX) {
0705             dev_err(&client->dev,
0706                 "Invalid %s channel ATI base: %u\n",
0707                 fwnode_get_name(ch_node), ati_base[i]);
0708             return -EINVAL;
0709         }
0710 
0711         ati_base[i] -= IQS626_TPx_ATI_BASE_MIN;
0712         sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base = ati_base[i];
0713     }
0714 
0715     return 0;
0716 }
0717 
0718 static int iqs626_parse_pins(struct iqs626_private *iqs626,
0719                  const struct fwnode_handle *ch_node,
0720                  const char *propname, u8 *enable)
0721 {
0722     struct i2c_client *client = iqs626->client;
0723     unsigned int val[IQS626_NUM_CRx_TX];
0724     int error, count, i;
0725 
0726     if (!fwnode_property_present(ch_node, propname))
0727         return 0;
0728 
0729     count = fwnode_property_count_u32(ch_node, propname);
0730     if (count > IQS626_NUM_CRx_TX) {
0731         dev_err(&client->dev,
0732             "Too many %s channel CRX/TX pins present\n",
0733             fwnode_get_name(ch_node));
0734         return -EINVAL;
0735     } else if (count < 0) {
0736         dev_err(&client->dev,
0737             "Failed to count %s channel CRX/TX pins: %d\n",
0738             fwnode_get_name(ch_node), count);
0739         return count;
0740     }
0741 
0742     error = fwnode_property_read_u32_array(ch_node, propname, val, count);
0743     if (error) {
0744         dev_err(&client->dev,
0745             "Failed to read %s channel CRX/TX pins: %d\n",
0746             fwnode_get_name(ch_node), error);
0747         return error;
0748     }
0749 
0750     *enable = 0;
0751 
0752     for (i = 0; i < count; i++) {
0753         if (val[i] >= IQS626_NUM_CRx_TX) {
0754             dev_err(&client->dev,
0755                 "Invalid %s channel CRX/TX pin: %u\n",
0756                 fwnode_get_name(ch_node), val[i]);
0757             return -EINVAL;
0758         }
0759 
0760         *enable |= BIT(val[i]);
0761     }
0762 
0763     return 0;
0764 }
0765 
0766 static int iqs626_parse_trackpad(struct iqs626_private *iqs626,
0767                  const struct fwnode_handle *ch_node)
0768 {
0769     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
0770     struct i2c_client *client = iqs626->client;
0771     u8 *hyst = &sys_reg->tp_grp_reg.hyst;
0772     unsigned int val;
0773     int error, count;
0774 
0775     if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) {
0776         if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) {
0777             dev_err(&client->dev,
0778                 "Invalid %s channel update rate: %u\n",
0779                 fwnode_get_name(ch_node), val);
0780             return -EINVAL;
0781         }
0782 
0783         sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK;
0784         sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT);
0785     }
0786 
0787     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad",
0788                       &val)) {
0789         if (val > IQS626_FILT_STR_MAX) {
0790             dev_err(&client->dev,
0791                 "Invalid %s channel filter strength: %u\n",
0792                 fwnode_get_name(ch_node), val);
0793             return -EINVAL;
0794         }
0795 
0796         sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx;
0797         sys_reg->misc_b |= val;
0798     }
0799 
0800     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
0801                       &val)) {
0802         if (val > IQS626_FILT_STR_MAX) {
0803             dev_err(&client->dev,
0804                 "Invalid %s channel filter strength: %u\n",
0805                 fwnode_get_name(ch_node), val);
0806             return -EINVAL;
0807         }
0808 
0809         *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK;
0810         *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT);
0811     }
0812 
0813     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
0814                       &val)) {
0815         if (val > IQS626_FILT_STR_MAX) {
0816             dev_err(&client->dev,
0817                 "Invalid %s channel filter strength: %u\n",
0818                 fwnode_get_name(ch_node), val);
0819             return -EINVAL;
0820         }
0821 
0822         *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK;
0823         *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT);
0824     }
0825 
0826     if (!fwnode_property_present(ch_node, "linux,keycodes"))
0827         return 0;
0828 
0829     count = fwnode_property_count_u32(ch_node, "linux,keycodes");
0830     if (count > IQS626_NUM_GESTURES) {
0831         dev_err(&client->dev, "Too many keycodes present\n");
0832         return -EINVAL;
0833     } else if (count < 0) {
0834         dev_err(&client->dev, "Failed to count keycodes: %d\n", count);
0835         return count;
0836     }
0837 
0838     error = fwnode_property_read_u32_array(ch_node, "linux,keycodes",
0839                            iqs626->tp_code, count);
0840     if (error) {
0841         dev_err(&client->dev, "Failed to read keycodes: %d\n", error);
0842         return error;
0843     }
0844 
0845     sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE;
0846     if (fwnode_property_present(ch_node, "azoteq,gesture-swipe"))
0847         sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE;
0848 
0849     if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms",
0850                       &val)) {
0851         if (val > IQS626_TIMEOUT_TAP_MS_MAX) {
0852             dev_err(&client->dev,
0853                 "Invalid %s channel timeout: %u\n",
0854                 fwnode_get_name(ch_node), val);
0855             return -EINVAL;
0856         }
0857 
0858         sys_reg->timeout_tap = val / 16;
0859     }
0860 
0861     if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms",
0862                       &val)) {
0863         if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) {
0864             dev_err(&client->dev,
0865                 "Invalid %s channel timeout: %u\n",
0866                 fwnode_get_name(ch_node), val);
0867             return -EINVAL;
0868         }
0869 
0870         sys_reg->timeout_swipe = val / 16;
0871     }
0872 
0873     if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe",
0874                       &val)) {
0875         if (val > IQS626_THRESH_SWIPE_MAX) {
0876             dev_err(&client->dev,
0877                 "Invalid %s channel threshold: %u\n",
0878                 fwnode_get_name(ch_node), val);
0879             return -EINVAL;
0880         }
0881 
0882         sys_reg->thresh_swipe = val;
0883     }
0884 
0885     sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE;
0886 
0887     return 0;
0888 }
0889 
0890 static noinline_for_stack int
0891 iqs626_parse_channel(struct iqs626_private *iqs626,
0892              const struct fwnode_handle *ch_node,
0893              enum iqs626_ch_id ch_id)
0894 {
0895     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
0896     struct i2c_client *client = iqs626->client;
0897     u8 *engine, *filter, *rx_enable, *tx_enable;
0898     u8 *assoc_select, *assoc_weight;
0899     unsigned int val;
0900     int error, i;
0901 
0902     switch (ch_id) {
0903     case IQS626_CH_ULP_0:
0904         engine = sys_reg->ch_reg_ulp.engine;
0905         break;
0906 
0907     case IQS626_CH_TP_2:
0908     case IQS626_CH_TP_3:
0909         engine = sys_reg->tp_grp_reg.engine;
0910         break;
0911 
0912     case IQS626_CH_GEN_0:
0913     case IQS626_CH_GEN_1:
0914     case IQS626_CH_GEN_2:
0915         i = ch_id - IQS626_CH_GEN_0;
0916         engine = sys_reg->ch_reg_gen[i].engine;
0917         break;
0918 
0919     case IQS626_CH_HALL:
0920         engine = &sys_reg->ch_reg_hall.engine;
0921         break;
0922 
0923     default:
0924         return -EINVAL;
0925     }
0926 
0927     *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
0928     if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
0929         *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
0930 
0931     *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS;
0932     if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) {
0933         switch (val) {
0934         case IQS626_RX_INACTIVE_VSS:
0935             break;
0936 
0937         case IQS626_RX_INACTIVE_FLOAT:
0938             *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
0939             if (ch_id == IQS626_CH_GEN_0 ||
0940                 ch_id == IQS626_CH_GEN_1 ||
0941                 ch_id == IQS626_CH_GEN_2)
0942                 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG;
0943             break;
0944 
0945         case IQS626_RX_INACTIVE_VREG:
0946             if (ch_id == IQS626_CH_GEN_0 ||
0947                 ch_id == IQS626_CH_GEN_1 ||
0948                 ch_id == IQS626_CH_GEN_2) {
0949                 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
0950                 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG;
0951                 break;
0952             }
0953             fallthrough;
0954 
0955         default:
0956             dev_err(&client->dev,
0957                 "Invalid %s channel CRX pin termination: %u\n",
0958                 fwnode_get_name(ch_node), val);
0959             return -EINVAL;
0960         }
0961     }
0962 
0963     *engine &= ~IQS626_CHx_ENG_0_LINEARIZE;
0964     if (fwnode_property_present(ch_node, "azoteq,linearize"))
0965         *engine |= IQS626_CHx_ENG_0_LINEARIZE;
0966 
0967     *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR;
0968     if (fwnode_property_present(ch_node, "azoteq,dual-direction"))
0969         *engine |= IQS626_CHx_ENG_0_DUAL_DIR;
0970 
0971     *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE;
0972     if (fwnode_property_present(ch_node, "azoteq,filt-disable"))
0973         *engine |= IQS626_CHx_ENG_0_FILT_DISABLE;
0974 
0975     if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
0976         if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) {
0977             dev_err(&client->dev,
0978                 "Invalid %s channel ATI mode: %u\n",
0979                 fwnode_get_name(ch_node), val);
0980             return -EINVAL;
0981         }
0982 
0983         *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK;
0984         *engine |= val;
0985     }
0986 
0987     if (ch_id == IQS626_CH_HALL)
0988         return 0;
0989 
0990     *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE;
0991     if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase",
0992                       &val) && val) {
0993         unsigned int orig_val = val--;
0994 
0995         /*
0996          * In the case of the generic channels, the charge cycle time
0997          * field doubles in size and straddles two separate registers.
0998          */
0999         if (ch_id == IQS626_CH_GEN_0 ||
1000             ch_id == IQS626_CH_GEN_1 ||
1001             ch_id == IQS626_CH_GEN_2) {
1002             *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1;
1003             if (val & BIT(1))
1004                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1;
1005 
1006             *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0;
1007             if (val & BIT(0))
1008                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0;
1009 
1010             val >>= 2;
1011         }
1012 
1013         if (val & ~GENMASK(1, 0)) {
1014             dev_err(&client->dev,
1015                 "Invalid %s channel charge cycle time: %u\n",
1016                 fwnode_get_name(ch_node), orig_val);
1017             return -EINVAL;
1018         }
1019 
1020         *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1;
1021         if (val & BIT(1))
1022             *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1;
1023 
1024         *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0;
1025         if (val & BIT(0))
1026             *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0;
1027 
1028         *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE;
1029     }
1030 
1031     if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
1032         if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) {
1033             dev_err(&client->dev,
1034                 "Invalid %s channel bias current: %u\n",
1035                 fwnode_get_name(ch_node), val);
1036             return -EINVAL;
1037         }
1038 
1039         *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK;
1040         *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT);
1041     }
1042 
1043     if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
1044         if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) {
1045             dev_err(&client->dev,
1046                 "Invalid %s channel sensing frequency: %u\n",
1047                 fwnode_get_name(ch_node), val);
1048             return -EINVAL;
1049         }
1050 
1051         *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK;
1052         *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT);
1053     }
1054 
1055     *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1056     if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten"))
1057         *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1058 
1059     if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3)
1060         return iqs626_parse_trackpad(iqs626, ch_node);
1061 
1062     if (ch_id == IQS626_CH_ULP_0) {
1063         sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE;
1064         if (fwnode_property_present(ch_node, "azoteq,proj-enable"))
1065             sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE;
1066 
1067         filter = &sys_reg->ch_reg_ulp.filter;
1068 
1069         rx_enable = &sys_reg->ch_reg_ulp.rx_enable;
1070         tx_enable = &sys_reg->ch_reg_ulp.tx_enable;
1071     } else {
1072         i = ch_id - IQS626_CH_GEN_0;
1073         filter = &sys_reg->ch_reg_gen[i].filter;
1074 
1075         rx_enable = &sys_reg->ch_reg_gen[i].rx_enable;
1076         tx_enable = &sys_reg->ch_reg_gen[i].tx_enable;
1077     }
1078 
1079     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
1080                       &val)) {
1081         if (val > IQS626_FILT_STR_MAX) {
1082             dev_err(&client->dev,
1083                 "Invalid %s channel filter strength: %u\n",
1084                 fwnode_get_name(ch_node), val);
1085             return -EINVAL;
1086         }
1087 
1088         *filter &= ~IQS626_FILT_STR_NP_CNT_MASK;
1089         *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT);
1090     }
1091 
1092     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
1093                       &val)) {
1094         if (val > IQS626_FILT_STR_MAX) {
1095             dev_err(&client->dev,
1096                 "Invalid %s channel filter strength: %u\n",
1097                 fwnode_get_name(ch_node), val);
1098             return -EINVAL;
1099         }
1100 
1101         *filter &= ~IQS626_FILT_STR_LP_CNT_MASK;
1102         *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT);
1103     }
1104 
1105     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta",
1106                       &val)) {
1107         if (val > IQS626_FILT_STR_MAX) {
1108             dev_err(&client->dev,
1109                 "Invalid %s channel filter strength: %u\n",
1110                 fwnode_get_name(ch_node), val);
1111             return -EINVAL;
1112         }
1113 
1114         *filter &= ~IQS626_FILT_STR_NP_LTA_MASK;
1115         *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT);
1116     }
1117 
1118     if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta",
1119                       &val)) {
1120         if (val > IQS626_FILT_STR_MAX) {
1121             dev_err(&client->dev,
1122                 "Invalid %s channel filter strength: %u\n",
1123                 fwnode_get_name(ch_node), val);
1124             return -EINVAL;
1125         }
1126 
1127         *filter &= ~IQS626_FILT_STR_LP_LTA_MASK;
1128         *filter |= val;
1129     }
1130 
1131     error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable",
1132                   rx_enable);
1133     if (error)
1134         return error;
1135 
1136     error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable",
1137                   tx_enable);
1138     if (error)
1139         return error;
1140 
1141     if (ch_id == IQS626_CH_ULP_0)
1142         return 0;
1143 
1144     *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1145     if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size",
1146                       &val) && val) {
1147         unsigned int orig_val = val--;
1148 
1149         if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) {
1150             dev_err(&client->dev,
1151                 "Invalid %s channel local cap. size: %u\n",
1152                 fwnode_get_name(ch_node), orig_val);
1153             return -EINVAL;
1154         }
1155 
1156         *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK;
1157         *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT);
1158 
1159         *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1160     }
1161 
1162     if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
1163         if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) {
1164             dev_err(&client->dev,
1165                 "Invalid %s channel sensing mode: %u\n",
1166                 fwnode_get_name(ch_node), val);
1167             return -EINVAL;
1168         }
1169 
1170         *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK;
1171         *(engine + 2) |= val;
1172     }
1173 
1174     if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) {
1175         if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) {
1176             dev_err(&client->dev,
1177                 "Invalid %s channel excitation frequency: %u\n",
1178                 fwnode_get_name(ch_node), val);
1179             return -EINVAL;
1180         }
1181 
1182         *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK;
1183         *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT);
1184     }
1185 
1186     *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC;
1187     if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
1188         *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC;
1189 
1190     *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE;
1191     if (fwnode_property_present(ch_node, "azoteq,comp-disable"))
1192         *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE;
1193 
1194     *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE;
1195     if (fwnode_property_present(ch_node, "azoteq,static-enable"))
1196         *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE;
1197 
1198     i = ch_id - IQS626_CH_GEN_0;
1199     assoc_select = &sys_reg->ch_reg_gen[i].assoc_select;
1200     assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight;
1201 
1202     *assoc_select = 0;
1203     if (!fwnode_property_present(ch_node, "azoteq,assoc-select"))
1204         return 0;
1205 
1206     for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1207         if (fwnode_property_match_string(ch_node, "azoteq,assoc-select",
1208                          iqs626_channels[i].name) < 0)
1209             continue;
1210 
1211         *assoc_select |= iqs626_channels[i].active;
1212     }
1213 
1214     if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val))
1215         return 0;
1216 
1217     if (val > IQS626_GEN_WEIGHT_MAX) {
1218         dev_err(&client->dev,
1219             "Invalid %s channel associated weight: %u\n",
1220             fwnode_get_name(ch_node), val);
1221         return -EINVAL;
1222     }
1223 
1224     *assoc_weight = val;
1225 
1226     return 0;
1227 }
1228 
1229 static int iqs626_parse_prop(struct iqs626_private *iqs626)
1230 {
1231     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1232     struct i2c_client *client = iqs626->client;
1233     struct fwnode_handle *ch_node;
1234     unsigned int val;
1235     int error, i;
1236     u16 general;
1237 
1238     if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
1239                       &val)) {
1240         if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) {
1241             dev_err(&client->dev, "Invalid suspend mode: %u\n",
1242                 val);
1243             return -EINVAL;
1244         }
1245 
1246         iqs626->suspend_mode = val;
1247     }
1248 
1249     error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg,
1250                 sizeof(*sys_reg));
1251     if (error)
1252         return error;
1253 
1254     general = be16_to_cpu(sys_reg->general);
1255     general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1256 
1257     if (device_property_present(&client->dev, "azoteq,clk-div"))
1258         general |= IQS626_SYS_SETTINGS_CLK_DIV;
1259 
1260     if (device_property_present(&client->dev, "azoteq,ulp-enable"))
1261         general |= IQS626_SYS_SETTINGS_ULP_AUTO;
1262 
1263     if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
1264                       &val)) {
1265         if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) {
1266             dev_err(&client->dev, "Invalid update rate: %u\n", val);
1267             return -EINVAL;
1268         }
1269 
1270         general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1271         general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT);
1272     }
1273 
1274     sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE;
1275     if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
1276         sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE;
1277 
1278     sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY;
1279     if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
1280         sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY;
1281 
1282     if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
1283                       &val)) {
1284         if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) {
1285             dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
1286                 val);
1287             return -EINVAL;
1288         }
1289 
1290         sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK;
1291         sys_reg->misc_a |= val;
1292     }
1293 
1294     if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
1295                       &val)) {
1296         if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) {
1297             dev_err(&client->dev, "Invalid reseed selection: %u\n",
1298                 val);
1299             return -EINVAL;
1300         }
1301 
1302         sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK;
1303         sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT);
1304     }
1305 
1306     sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND;
1307     if (device_property_present(&client->dev, "azoteq,thresh-extend"))
1308         sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND;
1309 
1310     sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE;
1311     if (device_property_present(&client->dev, "azoteq,tracking-enable"))
1312         sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE;
1313 
1314     sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET;
1315     if (device_property_present(&client->dev, "azoteq,reseed-offset"))
1316         sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET;
1317 
1318     if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
1319                       &val)) {
1320         if (val > IQS626_RATE_NP_MS_MAX) {
1321             dev_err(&client->dev, "Invalid report rate: %u\n", val);
1322             return -EINVAL;
1323         }
1324 
1325         sys_reg->rate_np = val;
1326     }
1327 
1328     if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
1329                       &val)) {
1330         if (val > IQS626_RATE_LP_MS_MAX) {
1331             dev_err(&client->dev, "Invalid report rate: %u\n", val);
1332             return -EINVAL;
1333         }
1334 
1335         sys_reg->rate_lp = val;
1336     }
1337 
1338     if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
1339                       &val)) {
1340         if (val > IQS626_RATE_ULP_MS_MAX) {
1341             dev_err(&client->dev, "Invalid report rate: %u\n", val);
1342             return -EINVAL;
1343         }
1344 
1345         sys_reg->rate_ulp = val / 16;
1346     }
1347 
1348     if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
1349                       &val)) {
1350         if (val > IQS626_TIMEOUT_PWR_MS_MAX) {
1351             dev_err(&client->dev, "Invalid timeout: %u\n", val);
1352             return -EINVAL;
1353         }
1354 
1355         sys_reg->timeout_pwr = val / 512;
1356     }
1357 
1358     if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
1359                       &val)) {
1360         if (val > IQS626_TIMEOUT_LTA_MS_MAX) {
1361             dev_err(&client->dev, "Invalid timeout: %u\n", val);
1362             return -EINVAL;
1363         }
1364 
1365         sys_reg->timeout_lta = val / 512;
1366     }
1367 
1368     sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS);
1369     sys_reg->redo_ati = 0;
1370 
1371     sys_reg->reseed = 0;
1372     sys_reg->active = 0;
1373 
1374     for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1375         ch_node = device_get_named_child_node(&client->dev,
1376                               iqs626_channels[i].name);
1377         if (!ch_node)
1378             continue;
1379 
1380         error = iqs626_parse_channel(iqs626, ch_node, i);
1381         if (error)
1382             return error;
1383 
1384         error = iqs626_parse_ati_target(iqs626, ch_node, i);
1385         if (error)
1386             return error;
1387 
1388         error = iqs626_parse_events(iqs626, ch_node, i);
1389         if (error)
1390             return error;
1391 
1392         if (!fwnode_property_present(ch_node, "azoteq,ati-exclude"))
1393             sys_reg->redo_ati |= iqs626_channels[i].active;
1394 
1395         if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
1396             sys_reg->reseed |= iqs626_channels[i].active;
1397 
1398         sys_reg->active |= iqs626_channels[i].active;
1399     }
1400 
1401     general |= IQS626_SYS_SETTINGS_EVENT_MODE;
1402 
1403     /*
1404      * Enable streaming during normal-power mode if the trackpad is used to
1405      * report raw coordinates instead of gestures. In that case, the device
1406      * returns to event mode during low-power mode.
1407      */
1408     if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active &&
1409         sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE)
1410         general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP;
1411 
1412     general |= IQS626_SYS_SETTINGS_REDO_ATI;
1413     general |= IQS626_SYS_SETTINGS_ACK_RESET;
1414 
1415     sys_reg->general = cpu_to_be16(general);
1416 
1417     error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1418                  &iqs626->sys_reg, sizeof(iqs626->sys_reg));
1419     if (error)
1420         return error;
1421 
1422     iqs626_irq_wait();
1423 
1424     return 0;
1425 }
1426 
1427 static int iqs626_input_init(struct iqs626_private *iqs626)
1428 {
1429     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1430     struct i2c_client *client = iqs626->client;
1431     int error, i, j;
1432 
1433     iqs626->keypad = devm_input_allocate_device(&client->dev);
1434     if (!iqs626->keypad)
1435         return -ENOMEM;
1436 
1437     iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code);
1438     iqs626->keypad->keycode = iqs626->kp_code;
1439     iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code);
1440 
1441     iqs626->keypad->name = "iqs626a_keypad";
1442     iqs626->keypad->id.bustype = BUS_I2C;
1443 
1444     for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1445         if (!(sys_reg->active & iqs626_channels[i].active))
1446             continue;
1447 
1448         for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1449             if (!iqs626->kp_type[i][j])
1450                 continue;
1451 
1452             input_set_capability(iqs626->keypad,
1453                          iqs626->kp_type[i][j],
1454                          iqs626->kp_code[i][j]);
1455         }
1456     }
1457 
1458     if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1459         return 0;
1460 
1461     iqs626->trackpad = devm_input_allocate_device(&client->dev);
1462     if (!iqs626->trackpad)
1463         return -ENOMEM;
1464 
1465     iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code);
1466     iqs626->trackpad->keycode = iqs626->tp_code;
1467     iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code);
1468 
1469     iqs626->trackpad->name = "iqs626a_trackpad";
1470     iqs626->trackpad->id.bustype = BUS_I2C;
1471 
1472     /*
1473      * Present the trackpad as a traditional pointing device if no gestures
1474      * have been mapped to a keycode.
1475      */
1476     if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1477         u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active;
1478 
1479         input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH);
1480         input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0);
1481 
1482         if ((sys_reg->active & tp_mask) == tp_mask)
1483             input_set_abs_params(iqs626->trackpad,
1484                          ABS_X, 0, 255, 0, 0);
1485         else
1486             input_set_abs_params(iqs626->trackpad,
1487                          ABS_X, 0, 128, 0, 0);
1488 
1489         touchscreen_parse_properties(iqs626->trackpad, false,
1490                          &iqs626->prop);
1491     } else {
1492         for (i = 0; i < IQS626_NUM_GESTURES; i++)
1493             if (iqs626->tp_code[i] != KEY_RESERVED)
1494                 input_set_capability(iqs626->trackpad, EV_KEY,
1495                              iqs626->tp_code[i]);
1496     }
1497 
1498     error = input_register_device(iqs626->trackpad);
1499     if (error)
1500         dev_err(&client->dev, "Failed to register trackpad: %d\n",
1501             error);
1502 
1503     return error;
1504 }
1505 
1506 static int iqs626_report(struct iqs626_private *iqs626)
1507 {
1508     struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1509     struct i2c_client *client = iqs626->client;
1510     struct iqs626_flags flags;
1511     __le16 hall_output;
1512     int error, i, j;
1513     u8 state;
1514     u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR];
1515 
1516     error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags,
1517                 sizeof(flags));
1518     if (error) {
1519         dev_err(&client->dev, "Failed to read device status: %d\n",
1520             error);
1521         return error;
1522     }
1523 
1524     /*
1525      * The device resets itself if its own watchdog bites, which can happen
1526      * in the event of an I2C communication error. In this case, the device
1527      * asserts a SHOW_RESET interrupt and all registers must be restored.
1528      */
1529     if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) {
1530         dev_err(&client->dev, "Unexpected device reset\n");
1531 
1532         error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1533                      sys_reg, sizeof(*sys_reg));
1534         if (error)
1535             dev_err(&client->dev,
1536                 "Failed to re-initialize device: %d\n", error);
1537 
1538         return error;
1539     }
1540 
1541     if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI)
1542         return 0;
1543 
1544     /*
1545      * Unlike the ULP or generic channels, the Hall channel does not have a
1546      * direction flag. Instead, the direction (i.e. magnet polarity) can be
1547      * derived based on the sign of the 2's complement differential output.
1548      */
1549     if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) {
1550         error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT,
1551                     &hall_output, sizeof(hall_output));
1552         if (error) {
1553             dev_err(&client->dev,
1554                 "Failed to read Hall output: %d\n", error);
1555             return error;
1556         }
1557 
1558         *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active;
1559         if (le16_to_cpu(hall_output) < 0x8000)
1560             *dir_mask |= iqs626_channels[IQS626_CH_HALL].active;
1561     }
1562 
1563     for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1564         if (!(sys_reg->active & iqs626_channels[i].active))
1565             continue;
1566 
1567         for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1568             if (!iqs626->kp_type[i][j])
1569                 continue;
1570 
1571             state = flags.states[iqs626_events[j].st_offs];
1572             state &= iqs626_events[j].dir_up ? *dir_mask
1573                              : ~(*dir_mask);
1574             state &= iqs626_channels[i].active;
1575 
1576             input_event(iqs626->keypad, iqs626->kp_type[i][j],
1577                     iqs626->kp_code[i][j], !!state);
1578         }
1579     }
1580 
1581     input_sync(iqs626->keypad);
1582 
1583     /*
1584      * The following completion signals that ATI has finished, any initial
1585      * switch states have been reported and the keypad can be registered.
1586      */
1587     complete_all(&iqs626->ati_done);
1588 
1589     if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1590         return 0;
1591 
1592     if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1593         state = flags.states[IQS626_ST_OFFS_TOUCH];
1594         state &= iqs626_channels[IQS626_CH_TP_2].active;
1595 
1596         input_report_key(iqs626->trackpad, BTN_TOUCH, state);
1597 
1598         if (state)
1599             touchscreen_report_pos(iqs626->trackpad, &iqs626->prop,
1600                            flags.trackpad_x,
1601                            flags.trackpad_y, false);
1602     } else {
1603         for (i = 0; i < IQS626_NUM_GESTURES; i++)
1604             input_report_key(iqs626->trackpad, iqs626->tp_code[i],
1605                      flags.gesture & BIT(i));
1606 
1607         if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) {
1608             input_sync(iqs626->trackpad);
1609 
1610             /*
1611              * Momentary gestures are followed by a complementary
1612              * release cycle so as to emulate a full keystroke.
1613              */
1614             for (i = 0; i < IQS626_GESTURE_HOLD; i++)
1615                 input_report_key(iqs626->trackpad,
1616                          iqs626->tp_code[i], 0);
1617         }
1618     }
1619 
1620     input_sync(iqs626->trackpad);
1621 
1622     return 0;
1623 }
1624 
1625 static irqreturn_t iqs626_irq(int irq, void *context)
1626 {
1627     struct iqs626_private *iqs626 = context;
1628 
1629     if (iqs626_report(iqs626))
1630         return IRQ_NONE;
1631 
1632     /*
1633      * The device does not deassert its interrupt (RDY) pin until shortly
1634      * after receiving an I2C stop condition; the following delay ensures
1635      * the interrupt handler does not return before this time.
1636      */
1637     iqs626_irq_wait();
1638 
1639     return IRQ_HANDLED;
1640 }
1641 
1642 static const struct regmap_config iqs626_regmap_config = {
1643     .reg_bits = 8,
1644     .val_bits = 16,
1645     .max_register = IQS626_MAX_REG,
1646 };
1647 
1648 static int iqs626_probe(struct i2c_client *client)
1649 {
1650     struct iqs626_ver_info ver_info;
1651     struct iqs626_private *iqs626;
1652     int error;
1653 
1654     iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL);
1655     if (!iqs626)
1656         return -ENOMEM;
1657 
1658     i2c_set_clientdata(client, iqs626);
1659     iqs626->client = client;
1660 
1661     iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config);
1662     if (IS_ERR(iqs626->regmap)) {
1663         error = PTR_ERR(iqs626->regmap);
1664         dev_err(&client->dev, "Failed to initialize register map: %d\n",
1665             error);
1666         return error;
1667     }
1668 
1669     init_completion(&iqs626->ati_done);
1670 
1671     error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info,
1672                 sizeof(ver_info));
1673     if (error)
1674         return error;
1675 
1676     if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) {
1677         dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
1678             ver_info.prod_num);
1679         return -EINVAL;
1680     }
1681 
1682     error = iqs626_parse_prop(iqs626);
1683     if (error)
1684         return error;
1685 
1686     error = iqs626_input_init(iqs626);
1687     if (error)
1688         return error;
1689 
1690     error = devm_request_threaded_irq(&client->dev, client->irq,
1691                       NULL, iqs626_irq, IRQF_ONESHOT,
1692                       client->name, iqs626);
1693     if (error) {
1694         dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
1695         return error;
1696     }
1697 
1698     if (!wait_for_completion_timeout(&iqs626->ati_done,
1699                      msecs_to_jiffies(2000))) {
1700         dev_err(&client->dev, "Failed to complete ATI\n");
1701         return -ETIMEDOUT;
1702     }
1703 
1704     /*
1705      * The keypad may include one or more switches and is not registered
1706      * until ATI is complete and the initial switch states are read.
1707      */
1708     error = input_register_device(iqs626->keypad);
1709     if (error)
1710         dev_err(&client->dev, "Failed to register keypad: %d\n", error);
1711 
1712     return error;
1713 }
1714 
1715 static int __maybe_unused iqs626_suspend(struct device *dev)
1716 {
1717     struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1718     struct i2c_client *client = iqs626->client;
1719     unsigned int val;
1720     int error;
1721 
1722     if (!iqs626->suspend_mode)
1723         return 0;
1724 
1725     disable_irq(client->irq);
1726 
1727     /*
1728      * Automatic power mode switching must be disabled before the device is
1729      * forced into any particular power mode. In this case, the device will
1730      * transition into normal-power mode.
1731      */
1732     error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1733                    IQS626_SYS_SETTINGS_DIS_AUTO, ~0);
1734     if (error)
1735         goto err_irq;
1736 
1737     /*
1738      * The following check ensures the device has completed its transition
1739      * into normal-power mode before a manual mode switch is performed.
1740      */
1741     error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1742                     !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1743                      IQS626_PWR_MODE_POLL_SLEEP_US,
1744                      IQS626_PWR_MODE_POLL_TIMEOUT_US);
1745     if (error)
1746         goto err_irq;
1747 
1748     error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1749                    IQS626_SYS_SETTINGS_PWR_MODE_MASK,
1750                    iqs626->suspend_mode <<
1751                    IQS626_SYS_SETTINGS_PWR_MODE_SHIFT);
1752     if (error)
1753         goto err_irq;
1754 
1755     /*
1756      * This last check ensures the device has completed its transition into
1757      * the desired power mode to prevent any spurious interrupts from being
1758      * triggered after iqs626_suspend has already returned.
1759      */
1760     error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1761                      (val & IQS626_SYS_FLAGS_PWR_MODE_MASK)
1762                      == (iqs626->suspend_mode <<
1763                          IQS626_SYS_FLAGS_PWR_MODE_SHIFT),
1764                      IQS626_PWR_MODE_POLL_SLEEP_US,
1765                      IQS626_PWR_MODE_POLL_TIMEOUT_US);
1766 
1767 err_irq:
1768     iqs626_irq_wait();
1769     enable_irq(client->irq);
1770 
1771     return error;
1772 }
1773 
1774 static int __maybe_unused iqs626_resume(struct device *dev)
1775 {
1776     struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1777     struct i2c_client *client = iqs626->client;
1778     unsigned int val;
1779     int error;
1780 
1781     if (!iqs626->suspend_mode)
1782         return 0;
1783 
1784     disable_irq(client->irq);
1785 
1786     error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1787                    IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0);
1788     if (error)
1789         goto err_irq;
1790 
1791     /*
1792      * This check ensures the device has returned to normal-power mode
1793      * before automatic power mode switching is re-enabled.
1794      */
1795     error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1796                     !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1797                      IQS626_PWR_MODE_POLL_SLEEP_US,
1798                      IQS626_PWR_MODE_POLL_TIMEOUT_US);
1799     if (error)
1800         goto err_irq;
1801 
1802     error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1803                    IQS626_SYS_SETTINGS_DIS_AUTO, 0);
1804     if (error)
1805         goto err_irq;
1806 
1807     /*
1808      * This step reports any events that may have been "swallowed" as a
1809      * result of polling PWR_MODE (which automatically acknowledges any
1810      * pending interrupts).
1811      */
1812     error = iqs626_report(iqs626);
1813 
1814 err_irq:
1815     iqs626_irq_wait();
1816     enable_irq(client->irq);
1817 
1818     return error;
1819 }
1820 
1821 static SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume);
1822 
1823 static const struct of_device_id iqs626_of_match[] = {
1824     { .compatible = "azoteq,iqs626a" },
1825     { }
1826 };
1827 MODULE_DEVICE_TABLE(of, iqs626_of_match);
1828 
1829 static struct i2c_driver iqs626_i2c_driver = {
1830     .driver = {
1831         .name = "iqs626a",
1832         .of_match_table = iqs626_of_match,
1833         .pm = &iqs626_pm,
1834     },
1835     .probe_new = iqs626_probe,
1836 };
1837 module_i2c_driver(iqs626_i2c_driver);
1838 
1839 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
1840 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller");
1841 MODULE_LICENSE("GPL");
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