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0012 #include <linux/delay.h>
0013 #include <linux/device.h>
0014 #include <linux/err.h>
0015 #include <linux/i2c.h>
0016 #include <linux/input.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/kernel.h>
0019 #include <linux/module.h>
0020 #include <linux/mutex.h>
0021 #include <linux/of_device.h>
0022 #include <linux/property.h>
0023 #include <linux/regmap.h>
0024 #include <linux/slab.h>
0025
0026 #define IQS269_VER_INFO 0x00
0027 #define IQS269_VER_INFO_PROD_NUM 0x4F
0028
0029 #define IQS269_SYS_FLAGS 0x02
0030 #define IQS269_SYS_FLAGS_SHOW_RESET BIT(15)
0031 #define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11)
0032 #define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11
0033 #define IQS269_SYS_FLAGS_IN_ATI BIT(10)
0034
0035 #define IQS269_CHx_COUNTS 0x08
0036
0037 #define IQS269_SLIDER_X 0x30
0038
0039 #define IQS269_CAL_DATA_A 0x35
0040 #define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12)
0041 #define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12
0042 #define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8)
0043 #define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8
0044
0045 #define IQS269_SYS_SETTINGS 0x80
0046 #define IQS269_SYS_SETTINGS_CLK_DIV BIT(15)
0047 #define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14)
0048 #define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13)
0049 #define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11)
0050 #define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11
0051 #define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3
0052 #define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
0053 #define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8
0054 #define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7
0055 #define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6)
0056 #define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5)
0057 #define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4)
0058 #define IQS269_SYS_SETTINGS_REDO_ATI BIT(2)
0059 #define IQS269_SYS_SETTINGS_ACK_RESET BIT(0)
0060
0061 #define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6)
0062 #define IQS269_FILT_STR_LP_LTA_SHIFT 6
0063 #define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4)
0064 #define IQS269_FILT_STR_LP_CNT_SHIFT 4
0065 #define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2)
0066 #define IQS269_FILT_STR_NP_LTA_SHIFT 2
0067 #define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0)
0068 #define IQS269_FILT_STR_MAX 3
0069
0070 #define IQS269_EVENT_MASK_SYS BIT(6)
0071 #define IQS269_EVENT_MASK_DEEP BIT(2)
0072 #define IQS269_EVENT_MASK_TOUCH BIT(1)
0073 #define IQS269_EVENT_MASK_PROX BIT(0)
0074
0075 #define IQS269_RATE_NP_MS_MAX 255
0076 #define IQS269_RATE_LP_MS_MAX 255
0077 #define IQS269_RATE_ULP_MS_MAX 4080
0078 #define IQS269_TIMEOUT_PWR_MS_MAX 130560
0079 #define IQS269_TIMEOUT_LTA_MS_MAX 130560
0080
0081 #define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15)
0082 #define IQS269_MISC_A_ATI_LP_ONLY BIT(14)
0083 #define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13)
0084 #define IQS269_MISC_A_FILT_DISABLE BIT(12)
0085 #define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8)
0086 #define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8
0087 #define IQS269_MISC_A_DUAL_DIR BIT(6)
0088 #define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4)
0089 #define IQS269_MISC_A_TX_FREQ_SHIFT 4
0090 #define IQS269_MISC_A_TX_FREQ_MAX 3
0091 #define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0)
0092
0093 #define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6)
0094 #define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6
0095 #define IQS269_MISC_B_RESEED_UI_SEL_MAX 3
0096 #define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4)
0097 #define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0)
0098
0099 #define IQS269_CHx_SETTINGS 0x8C
0100
0101 #define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15)
0102 #define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13)
0103 #define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12)
0104 #define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8)
0105 #define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8
0106 #define IQS269_CHx_ENG_A_ATI_MODE_MAX 3
0107 #define IQS269_CHx_ENG_A_INV_LOGIC BIT(7)
0108 #define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5)
0109 #define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5
0110 #define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3
0111 #define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0)
0112 #define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15
0113
0114 #define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13)
0115 #define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9)
0116 #define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9
0117 #define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3
0118 #define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8)
0119 #define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6)
0120 #define IQS269_CHx_ENG_B_ATI_BASE_75 0x00
0121 #define IQS269_CHx_ENG_B_ATI_BASE_100 0x40
0122 #define IQS269_CHx_ENG_B_ATI_BASE_150 0x80
0123 #define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0
0124 #define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0)
0125 #define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016
0126
0127 #define IQS269_CHx_WEIGHT_MAX 255
0128 #define IQS269_CHx_THRESH_MAX 255
0129 #define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4)
0130 #define IQS269_CHx_HYST_DEEP_SHIFT 4
0131 #define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0)
0132 #define IQS269_CHx_HYST_MAX 15
0133
0134 #define IQS269_CHx_HALL_INACTIVE 6
0135 #define IQS269_CHx_HALL_ACTIVE 7
0136
0137 #define IQS269_HALL_PAD_R BIT(0)
0138 #define IQS269_HALL_PAD_L BIT(1)
0139 #define IQS269_HALL_PAD_INV BIT(6)
0140
0141 #define IQS269_HALL_UI 0xF5
0142 #define IQS269_HALL_UI_ENABLE BIT(15)
0143
0144 #define IQS269_MAX_REG 0xFF
0145
0146 #define IQS269_NUM_CH 8
0147 #define IQS269_NUM_SL 2
0148
0149 #define IQS269_ATI_POLL_SLEEP_US (iqs269->delay_mult * 10000)
0150 #define IQS269_ATI_POLL_TIMEOUT_US (iqs269->delay_mult * 500000)
0151 #define IQS269_ATI_STABLE_DELAY_MS (iqs269->delay_mult * 150)
0152
0153 #define IQS269_PWR_MODE_POLL_SLEEP_US IQS269_ATI_POLL_SLEEP_US
0154 #define IQS269_PWR_MODE_POLL_TIMEOUT_US IQS269_ATI_POLL_TIMEOUT_US
0155
0156 #define iqs269_irq_wait() usleep_range(100, 150)
0157
0158 enum iqs269_local_cap_size {
0159 IQS269_LOCAL_CAP_SIZE_0,
0160 IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY,
0161 IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5,
0162 };
0163
0164 enum iqs269_st_offs {
0165 IQS269_ST_OFFS_PROX,
0166 IQS269_ST_OFFS_DIR,
0167 IQS269_ST_OFFS_TOUCH,
0168 IQS269_ST_OFFS_DEEP,
0169 };
0170
0171 enum iqs269_th_offs {
0172 IQS269_TH_OFFS_PROX,
0173 IQS269_TH_OFFS_TOUCH,
0174 IQS269_TH_OFFS_DEEP,
0175 };
0176
0177 enum iqs269_event_id {
0178 IQS269_EVENT_PROX_DN,
0179 IQS269_EVENT_PROX_UP,
0180 IQS269_EVENT_TOUCH_DN,
0181 IQS269_EVENT_TOUCH_UP,
0182 IQS269_EVENT_DEEP_DN,
0183 IQS269_EVENT_DEEP_UP,
0184 };
0185
0186 struct iqs269_switch_desc {
0187 unsigned int code;
0188 bool enabled;
0189 };
0190
0191 struct iqs269_event_desc {
0192 const char *name;
0193 enum iqs269_st_offs st_offs;
0194 enum iqs269_th_offs th_offs;
0195 bool dir_up;
0196 u8 mask;
0197 };
0198
0199 static const struct iqs269_event_desc iqs269_events[] = {
0200 [IQS269_EVENT_PROX_DN] = {
0201 .name = "event-prox",
0202 .st_offs = IQS269_ST_OFFS_PROX,
0203 .th_offs = IQS269_TH_OFFS_PROX,
0204 .mask = IQS269_EVENT_MASK_PROX,
0205 },
0206 [IQS269_EVENT_PROX_UP] = {
0207 .name = "event-prox-alt",
0208 .st_offs = IQS269_ST_OFFS_PROX,
0209 .th_offs = IQS269_TH_OFFS_PROX,
0210 .dir_up = true,
0211 .mask = IQS269_EVENT_MASK_PROX,
0212 },
0213 [IQS269_EVENT_TOUCH_DN] = {
0214 .name = "event-touch",
0215 .st_offs = IQS269_ST_OFFS_TOUCH,
0216 .th_offs = IQS269_TH_OFFS_TOUCH,
0217 .mask = IQS269_EVENT_MASK_TOUCH,
0218 },
0219 [IQS269_EVENT_TOUCH_UP] = {
0220 .name = "event-touch-alt",
0221 .st_offs = IQS269_ST_OFFS_TOUCH,
0222 .th_offs = IQS269_TH_OFFS_TOUCH,
0223 .dir_up = true,
0224 .mask = IQS269_EVENT_MASK_TOUCH,
0225 },
0226 [IQS269_EVENT_DEEP_DN] = {
0227 .name = "event-deep",
0228 .st_offs = IQS269_ST_OFFS_DEEP,
0229 .th_offs = IQS269_TH_OFFS_DEEP,
0230 .mask = IQS269_EVENT_MASK_DEEP,
0231 },
0232 [IQS269_EVENT_DEEP_UP] = {
0233 .name = "event-deep-alt",
0234 .st_offs = IQS269_ST_OFFS_DEEP,
0235 .th_offs = IQS269_TH_OFFS_DEEP,
0236 .dir_up = true,
0237 .mask = IQS269_EVENT_MASK_DEEP,
0238 },
0239 };
0240
0241 struct iqs269_ver_info {
0242 u8 prod_num;
0243 u8 sw_num;
0244 u8 hw_num;
0245 u8 padding;
0246 } __packed;
0247
0248 struct iqs269_sys_reg {
0249 __be16 general;
0250 u8 active;
0251 u8 filter;
0252 u8 reseed;
0253 u8 event_mask;
0254 u8 rate_np;
0255 u8 rate_lp;
0256 u8 rate_ulp;
0257 u8 timeout_pwr;
0258 u8 timeout_rdy;
0259 u8 timeout_lta;
0260 __be16 misc_a;
0261 __be16 misc_b;
0262 u8 blocking;
0263 u8 padding;
0264 u8 slider_select[IQS269_NUM_SL];
0265 u8 timeout_tap;
0266 u8 timeout_swipe;
0267 u8 thresh_swipe;
0268 u8 redo_ati;
0269 } __packed;
0270
0271 struct iqs269_ch_reg {
0272 u8 rx_enable;
0273 u8 tx_enable;
0274 __be16 engine_a;
0275 __be16 engine_b;
0276 __be16 ati_comp;
0277 u8 thresh[3];
0278 u8 hyst;
0279 u8 assoc_select;
0280 u8 assoc_weight;
0281 } __packed;
0282
0283 struct iqs269_flags {
0284 __be16 system;
0285 u8 gesture;
0286 u8 padding;
0287 u8 states[4];
0288 } __packed;
0289
0290 struct iqs269_private {
0291 struct i2c_client *client;
0292 struct regmap *regmap;
0293 struct mutex lock;
0294 struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)];
0295 struct iqs269_ch_reg ch_reg[IQS269_NUM_CH];
0296 struct iqs269_sys_reg sys_reg;
0297 struct input_dev *keypad;
0298 struct input_dev *slider[IQS269_NUM_SL];
0299 unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH];
0300 unsigned int suspend_mode;
0301 unsigned int delay_mult;
0302 unsigned int ch_num;
0303 bool hall_enable;
0304 bool ati_current;
0305 };
0306
0307 static int iqs269_ati_mode_set(struct iqs269_private *iqs269,
0308 unsigned int ch_num, unsigned int mode)
0309 {
0310 u16 engine_a;
0311
0312 if (ch_num >= IQS269_NUM_CH)
0313 return -EINVAL;
0314
0315 if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX)
0316 return -EINVAL;
0317
0318 mutex_lock(&iqs269->lock);
0319
0320 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
0321
0322 engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK;
0323 engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
0324
0325 iqs269->ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
0326 iqs269->ati_current = false;
0327
0328 mutex_unlock(&iqs269->lock);
0329
0330 return 0;
0331 }
0332
0333 static int iqs269_ati_mode_get(struct iqs269_private *iqs269,
0334 unsigned int ch_num, unsigned int *mode)
0335 {
0336 u16 engine_a;
0337
0338 if (ch_num >= IQS269_NUM_CH)
0339 return -EINVAL;
0340
0341 mutex_lock(&iqs269->lock);
0342 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
0343 mutex_unlock(&iqs269->lock);
0344
0345 engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK;
0346 *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
0347
0348 return 0;
0349 }
0350
0351 static int iqs269_ati_base_set(struct iqs269_private *iqs269,
0352 unsigned int ch_num, unsigned int base)
0353 {
0354 u16 engine_b;
0355
0356 if (ch_num >= IQS269_NUM_CH)
0357 return -EINVAL;
0358
0359 switch (base) {
0360 case 75:
0361 base = IQS269_CHx_ENG_B_ATI_BASE_75;
0362 break;
0363
0364 case 100:
0365 base = IQS269_CHx_ENG_B_ATI_BASE_100;
0366 break;
0367
0368 case 150:
0369 base = IQS269_CHx_ENG_B_ATI_BASE_150;
0370 break;
0371
0372 case 200:
0373 base = IQS269_CHx_ENG_B_ATI_BASE_200;
0374 break;
0375
0376 default:
0377 return -EINVAL;
0378 }
0379
0380 mutex_lock(&iqs269->lock);
0381
0382 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
0383
0384 engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK;
0385 engine_b |= base;
0386
0387 iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
0388 iqs269->ati_current = false;
0389
0390 mutex_unlock(&iqs269->lock);
0391
0392 return 0;
0393 }
0394
0395 static int iqs269_ati_base_get(struct iqs269_private *iqs269,
0396 unsigned int ch_num, unsigned int *base)
0397 {
0398 u16 engine_b;
0399
0400 if (ch_num >= IQS269_NUM_CH)
0401 return -EINVAL;
0402
0403 mutex_lock(&iqs269->lock);
0404 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
0405 mutex_unlock(&iqs269->lock);
0406
0407 switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) {
0408 case IQS269_CHx_ENG_B_ATI_BASE_75:
0409 *base = 75;
0410 return 0;
0411
0412 case IQS269_CHx_ENG_B_ATI_BASE_100:
0413 *base = 100;
0414 return 0;
0415
0416 case IQS269_CHx_ENG_B_ATI_BASE_150:
0417 *base = 150;
0418 return 0;
0419
0420 case IQS269_CHx_ENG_B_ATI_BASE_200:
0421 *base = 200;
0422 return 0;
0423
0424 default:
0425 return -EINVAL;
0426 }
0427 }
0428
0429 static int iqs269_ati_target_set(struct iqs269_private *iqs269,
0430 unsigned int ch_num, unsigned int target)
0431 {
0432 u16 engine_b;
0433
0434 if (ch_num >= IQS269_NUM_CH)
0435 return -EINVAL;
0436
0437 if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX)
0438 return -EINVAL;
0439
0440 mutex_lock(&iqs269->lock);
0441
0442 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
0443
0444 engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK;
0445 engine_b |= target / 32;
0446
0447 iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
0448 iqs269->ati_current = false;
0449
0450 mutex_unlock(&iqs269->lock);
0451
0452 return 0;
0453 }
0454
0455 static int iqs269_ati_target_get(struct iqs269_private *iqs269,
0456 unsigned int ch_num, unsigned int *target)
0457 {
0458 u16 engine_b;
0459
0460 if (ch_num >= IQS269_NUM_CH)
0461 return -EINVAL;
0462
0463 mutex_lock(&iqs269->lock);
0464 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
0465 mutex_unlock(&iqs269->lock);
0466
0467 *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32;
0468
0469 return 0;
0470 }
0471
0472 static int iqs269_parse_mask(const struct fwnode_handle *fwnode,
0473 const char *propname, u8 *mask)
0474 {
0475 unsigned int val[IQS269_NUM_CH];
0476 int count, error, i;
0477
0478 count = fwnode_property_count_u32(fwnode, propname);
0479 if (count < 0)
0480 return 0;
0481
0482 if (count > IQS269_NUM_CH)
0483 return -EINVAL;
0484
0485 error = fwnode_property_read_u32_array(fwnode, propname, val, count);
0486 if (error)
0487 return error;
0488
0489 *mask = 0;
0490
0491 for (i = 0; i < count; i++) {
0492 if (val[i] >= IQS269_NUM_CH)
0493 return -EINVAL;
0494
0495 *mask |= BIT(val[i]);
0496 }
0497
0498 return 0;
0499 }
0500
0501 static int iqs269_parse_chan(struct iqs269_private *iqs269,
0502 const struct fwnode_handle *ch_node)
0503 {
0504 struct i2c_client *client = iqs269->client;
0505 struct fwnode_handle *ev_node;
0506 struct iqs269_ch_reg *ch_reg;
0507 u16 engine_a, engine_b;
0508 unsigned int reg, val;
0509 int error, i;
0510
0511 error = fwnode_property_read_u32(ch_node, "reg", ®);
0512 if (error) {
0513 dev_err(&client->dev, "Failed to read channel number: %d\n",
0514 error);
0515 return error;
0516 } else if (reg >= IQS269_NUM_CH) {
0517 dev_err(&client->dev, "Invalid channel number: %u\n", reg);
0518 return -EINVAL;
0519 }
0520
0521 iqs269->sys_reg.active |= BIT(reg);
0522 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
0523 iqs269->sys_reg.reseed |= BIT(reg);
0524
0525 if (fwnode_property_present(ch_node, "azoteq,blocking-enable"))
0526 iqs269->sys_reg.blocking |= BIT(reg);
0527
0528 if (fwnode_property_present(ch_node, "azoteq,slider0-select"))
0529 iqs269->sys_reg.slider_select[0] |= BIT(reg);
0530
0531 if (fwnode_property_present(ch_node, "azoteq,slider1-select"))
0532 iqs269->sys_reg.slider_select[1] |= BIT(reg);
0533
0534 ch_reg = &iqs269->ch_reg[reg];
0535
0536 error = regmap_raw_read(iqs269->regmap,
0537 IQS269_CHx_SETTINGS + reg * sizeof(*ch_reg) / 2,
0538 ch_reg, sizeof(*ch_reg));
0539 if (error)
0540 return error;
0541
0542 error = iqs269_parse_mask(ch_node, "azoteq,rx-enable",
0543 &ch_reg->rx_enable);
0544 if (error) {
0545 dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n",
0546 reg, error);
0547 return error;
0548 }
0549
0550 error = iqs269_parse_mask(ch_node, "azoteq,tx-enable",
0551 &ch_reg->tx_enable);
0552 if (error) {
0553 dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n",
0554 reg, error);
0555 return error;
0556 }
0557
0558 engine_a = be16_to_cpu(ch_reg->engine_a);
0559 engine_b = be16_to_cpu(ch_reg->engine_b);
0560
0561 engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
0562 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
0563 engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
0564
0565 engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE;
0566 if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive"))
0567 engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE;
0568
0569 engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
0570 engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
0571 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) {
0572 switch (val) {
0573 case IQS269_LOCAL_CAP_SIZE_0:
0574 break;
0575
0576 case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5:
0577 engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
0578 fallthrough;
0579
0580 case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY:
0581 engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
0582 break;
0583
0584 default:
0585 dev_err(&client->dev,
0586 "Invalid channel %u local cap. size: %u\n", reg,
0587 val);
0588 return -EINVAL;
0589 }
0590 }
0591
0592 engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC;
0593 if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
0594 engine_a |= IQS269_CHx_ENG_A_INV_LOGIC;
0595
0596 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
0597 if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) {
0598 dev_err(&client->dev,
0599 "Invalid channel %u bias current: %u\n", reg,
0600 val);
0601 return -EINVAL;
0602 }
0603
0604 engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK;
0605 engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT);
0606 }
0607
0608 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
0609 if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) {
0610 dev_err(&client->dev,
0611 "Invalid channel %u sensing mode: %u\n", reg,
0612 val);
0613 return -EINVAL;
0614 }
0615
0616 engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK;
0617 engine_a |= val;
0618 }
0619
0620 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
0621 if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) {
0622 dev_err(&client->dev,
0623 "Invalid channel %u sensing frequency: %u\n",
0624 reg, val);
0625 return -EINVAL;
0626 }
0627
0628 engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK;
0629 engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT);
0630 }
0631
0632 engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE;
0633 if (fwnode_property_present(ch_node, "azoteq,static-enable"))
0634 engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE;
0635
0636 ch_reg->engine_a = cpu_to_be16(engine_a);
0637 ch_reg->engine_b = cpu_to_be16(engine_b);
0638
0639 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
0640 error = iqs269_ati_mode_set(iqs269, reg, val);
0641 if (error) {
0642 dev_err(&client->dev,
0643 "Invalid channel %u ATI mode: %u\n", reg, val);
0644 return error;
0645 }
0646 }
0647
0648 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
0649 error = iqs269_ati_base_set(iqs269, reg, val);
0650 if (error) {
0651 dev_err(&client->dev,
0652 "Invalid channel %u ATI base: %u\n", reg, val);
0653 return error;
0654 }
0655 }
0656
0657 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
0658 error = iqs269_ati_target_set(iqs269, reg, val);
0659 if (error) {
0660 dev_err(&client->dev,
0661 "Invalid channel %u ATI target: %u\n", reg,
0662 val);
0663 return error;
0664 }
0665 }
0666
0667 error = iqs269_parse_mask(ch_node, "azoteq,assoc-select",
0668 &ch_reg->assoc_select);
0669 if (error) {
0670 dev_err(&client->dev, "Invalid channel %u association: %d\n",
0671 reg, error);
0672 return error;
0673 }
0674
0675 if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) {
0676 if (val > IQS269_CHx_WEIGHT_MAX) {
0677 dev_err(&client->dev,
0678 "Invalid channel %u associated weight: %u\n",
0679 reg, val);
0680 return -EINVAL;
0681 }
0682
0683 ch_reg->assoc_weight = val;
0684 }
0685
0686 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
0687 ev_node = fwnode_get_named_child_node(ch_node,
0688 iqs269_events[i].name);
0689 if (!ev_node)
0690 continue;
0691
0692 if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
0693 if (val > IQS269_CHx_THRESH_MAX) {
0694 dev_err(&client->dev,
0695 "Invalid channel %u threshold: %u\n",
0696 reg, val);
0697 return -EINVAL;
0698 }
0699
0700 ch_reg->thresh[iqs269_events[i].th_offs] = val;
0701 }
0702
0703 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
0704 u8 *hyst = &ch_reg->hyst;
0705
0706 if (val > IQS269_CHx_HYST_MAX) {
0707 dev_err(&client->dev,
0708 "Invalid channel %u hysteresis: %u\n",
0709 reg, val);
0710 return -EINVAL;
0711 }
0712
0713 if (i == IQS269_EVENT_DEEP_DN ||
0714 i == IQS269_EVENT_DEEP_UP) {
0715 *hyst &= ~IQS269_CHx_HYST_DEEP_MASK;
0716 *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT);
0717 } else if (i == IQS269_EVENT_TOUCH_DN ||
0718 i == IQS269_EVENT_TOUCH_UP) {
0719 *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK;
0720 *hyst |= val;
0721 }
0722 }
0723
0724 if (fwnode_property_read_u32(ev_node, "linux,code", &val))
0725 continue;
0726
0727 switch (reg) {
0728 case IQS269_CHx_HALL_ACTIVE:
0729 if (iqs269->hall_enable) {
0730 iqs269->switches[i].code = val;
0731 iqs269->switches[i].enabled = true;
0732 }
0733 fallthrough;
0734
0735 case IQS269_CHx_HALL_INACTIVE:
0736 if (iqs269->hall_enable)
0737 break;
0738 fallthrough;
0739
0740 default:
0741 iqs269->keycode[i * IQS269_NUM_CH + reg] = val;
0742 }
0743
0744 iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask;
0745 }
0746
0747 return 0;
0748 }
0749
0750 static int iqs269_parse_prop(struct iqs269_private *iqs269)
0751 {
0752 struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
0753 struct i2c_client *client = iqs269->client;
0754 struct fwnode_handle *ch_node;
0755 u16 general, misc_a, misc_b;
0756 unsigned int val;
0757 int error;
0758
0759 iqs269->hall_enable = device_property_present(&client->dev,
0760 "azoteq,hall-enable");
0761
0762 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
0763 &val)) {
0764 if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) {
0765 dev_err(&client->dev, "Invalid suspend mode: %u\n",
0766 val);
0767 return -EINVAL;
0768 }
0769
0770 iqs269->suspend_mode = val;
0771 }
0772
0773 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
0774 sizeof(*sys_reg));
0775 if (error)
0776 return error;
0777
0778 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta",
0779 &val)) {
0780 if (val > IQS269_FILT_STR_MAX) {
0781 dev_err(&client->dev, "Invalid filter strength: %u\n",
0782 val);
0783 return -EINVAL;
0784 }
0785
0786 sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK;
0787 sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT);
0788 }
0789
0790 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt",
0791 &val)) {
0792 if (val > IQS269_FILT_STR_MAX) {
0793 dev_err(&client->dev, "Invalid filter strength: %u\n",
0794 val);
0795 return -EINVAL;
0796 }
0797
0798 sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK;
0799 sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT);
0800 }
0801
0802 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta",
0803 &val)) {
0804 if (val > IQS269_FILT_STR_MAX) {
0805 dev_err(&client->dev, "Invalid filter strength: %u\n",
0806 val);
0807 return -EINVAL;
0808 }
0809
0810 sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK;
0811 sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT);
0812 }
0813
0814 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt",
0815 &val)) {
0816 if (val > IQS269_FILT_STR_MAX) {
0817 dev_err(&client->dev, "Invalid filter strength: %u\n",
0818 val);
0819 return -EINVAL;
0820 }
0821
0822 sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK;
0823 sys_reg->filter |= val;
0824 }
0825
0826 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
0827 &val)) {
0828 if (val > IQS269_RATE_NP_MS_MAX) {
0829 dev_err(&client->dev, "Invalid report rate: %u\n", val);
0830 return -EINVAL;
0831 }
0832
0833 sys_reg->rate_np = val;
0834 }
0835
0836 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
0837 &val)) {
0838 if (val > IQS269_RATE_LP_MS_MAX) {
0839 dev_err(&client->dev, "Invalid report rate: %u\n", val);
0840 return -EINVAL;
0841 }
0842
0843 sys_reg->rate_lp = val;
0844 }
0845
0846 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
0847 &val)) {
0848 if (val > IQS269_RATE_ULP_MS_MAX) {
0849 dev_err(&client->dev, "Invalid report rate: %u\n", val);
0850 return -EINVAL;
0851 }
0852
0853 sys_reg->rate_ulp = val / 16;
0854 }
0855
0856 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
0857 &val)) {
0858 if (val > IQS269_TIMEOUT_PWR_MS_MAX) {
0859 dev_err(&client->dev, "Invalid timeout: %u\n", val);
0860 return -EINVAL;
0861 }
0862
0863 sys_reg->timeout_pwr = val / 512;
0864 }
0865
0866 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
0867 &val)) {
0868 if (val > IQS269_TIMEOUT_LTA_MS_MAX) {
0869 dev_err(&client->dev, "Invalid timeout: %u\n", val);
0870 return -EINVAL;
0871 }
0872
0873 sys_reg->timeout_lta = val / 512;
0874 }
0875
0876 misc_a = be16_to_cpu(sys_reg->misc_a);
0877 misc_b = be16_to_cpu(sys_reg->misc_b);
0878
0879 misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE;
0880 if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
0881 misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE;
0882
0883 misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY;
0884 if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
0885 misc_a |= IQS269_MISC_A_ATI_LP_ONLY;
0886
0887 misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN;
0888 if (device_property_present(&client->dev, "azoteq,ati-band-tighten"))
0889 misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN;
0890
0891 misc_a &= ~IQS269_MISC_A_FILT_DISABLE;
0892 if (device_property_present(&client->dev, "azoteq,filt-disable"))
0893 misc_a |= IQS269_MISC_A_FILT_DISABLE;
0894
0895 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
0896 &val)) {
0897 if (val >= IQS269_NUM_CH) {
0898 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
0899 val);
0900 return -EINVAL;
0901 }
0902
0903 misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK;
0904 misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT);
0905 }
0906
0907 misc_a &= ~IQS269_MISC_A_DUAL_DIR;
0908 if (device_property_present(&client->dev, "azoteq,dual-direction"))
0909 misc_a |= IQS269_MISC_A_DUAL_DIR;
0910
0911 if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) {
0912 if (val > IQS269_MISC_A_TX_FREQ_MAX) {
0913 dev_err(&client->dev,
0914 "Invalid excitation frequency: %u\n", val);
0915 return -EINVAL;
0916 }
0917
0918 misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK;
0919 misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT);
0920 }
0921
0922 misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE;
0923 if (device_property_present(&client->dev, "azoteq,global-cap-increase"))
0924 misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE;
0925
0926 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
0927 &val)) {
0928 if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) {
0929 dev_err(&client->dev, "Invalid reseed selection: %u\n",
0930 val);
0931 return -EINVAL;
0932 }
0933
0934 misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK;
0935 misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT);
0936 }
0937
0938 misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE;
0939 if (device_property_present(&client->dev, "azoteq,tracking-enable"))
0940 misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE;
0941
0942 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider",
0943 &val)) {
0944 if (val > IQS269_FILT_STR_MAX) {
0945 dev_err(&client->dev, "Invalid filter strength: %u\n",
0946 val);
0947 return -EINVAL;
0948 }
0949
0950 misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER;
0951 misc_b |= val;
0952 }
0953
0954 sys_reg->misc_a = cpu_to_be16(misc_a);
0955 sys_reg->misc_b = cpu_to_be16(misc_b);
0956
0957 sys_reg->active = 0;
0958 sys_reg->reseed = 0;
0959
0960 sys_reg->blocking = 0;
0961
0962 sys_reg->slider_select[0] = 0;
0963 sys_reg->slider_select[1] = 0;
0964
0965 sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS);
0966
0967 device_for_each_child_node(&client->dev, ch_node) {
0968 error = iqs269_parse_chan(iqs269, ch_node);
0969 if (error) {
0970 fwnode_handle_put(ch_node);
0971 return error;
0972 }
0973 }
0974
0975
0976
0977
0978
0979 sys_reg->redo_ati = sys_reg->active;
0980
0981 general = be16_to_cpu(sys_reg->general);
0982
0983 if (device_property_present(&client->dev, "azoteq,clk-div")) {
0984 general |= IQS269_SYS_SETTINGS_CLK_DIV;
0985 iqs269->delay_mult = 4;
0986 } else {
0987 general &= ~IQS269_SYS_SETTINGS_CLK_DIV;
0988 iqs269->delay_mult = 1;
0989 }
0990
0991
0992
0993
0994
0995
0996 general &= ~IQS269_SYS_SETTINGS_ULP_AUTO;
0997 general &= ~IQS269_SYS_SETTINGS_DIS_AUTO;
0998 general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK;
0999
1000 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
1001 &val)) {
1002 if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) {
1003 dev_err(&client->dev, "Invalid update rate: %u\n", val);
1004 return -EINVAL;
1005 }
1006
1007 general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK;
1008 general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT);
1009 }
1010
1011 general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET;
1012 if (device_property_present(&client->dev, "azoteq,reseed-offset"))
1013 general |= IQS269_SYS_SETTINGS_RESEED_OFFSET;
1014
1015 general |= IQS269_SYS_SETTINGS_EVENT_MODE;
1016
1017
1018
1019
1020
1021
1022 if (sys_reg->slider_select[0] || sys_reg->slider_select[1])
1023 general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP;
1024
1025 general |= IQS269_SYS_SETTINGS_REDO_ATI;
1026 general |= IQS269_SYS_SETTINGS_ACK_RESET;
1027
1028 sys_reg->general = cpu_to_be16(general);
1029
1030 return 0;
1031 }
1032
1033 static int iqs269_dev_init(struct iqs269_private *iqs269)
1034 {
1035 struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
1036 struct iqs269_ch_reg *ch_reg;
1037 unsigned int val;
1038 int error, i;
1039
1040 mutex_lock(&iqs269->lock);
1041
1042 error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI,
1043 IQS269_HALL_UI_ENABLE,
1044 iqs269->hall_enable ? ~0 : 0);
1045 if (error)
1046 goto err_mutex;
1047
1048 for (i = 0; i < IQS269_NUM_CH; i++) {
1049 if (!(sys_reg->active & BIT(i)))
1050 continue;
1051
1052 ch_reg = &iqs269->ch_reg[i];
1053
1054 error = regmap_raw_write(iqs269->regmap,
1055 IQS269_CHx_SETTINGS + i *
1056 sizeof(*ch_reg) / 2, ch_reg,
1057 sizeof(*ch_reg));
1058 if (error)
1059 goto err_mutex;
1060 }
1061
1062
1063
1064
1065
1066
1067 error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
1068 sizeof(*sys_reg));
1069 if (error)
1070 goto err_mutex;
1071
1072 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1073 !(val & IQS269_SYS_FLAGS_IN_ATI),
1074 IQS269_ATI_POLL_SLEEP_US,
1075 IQS269_ATI_POLL_TIMEOUT_US);
1076 if (error)
1077 goto err_mutex;
1078
1079 msleep(IQS269_ATI_STABLE_DELAY_MS);
1080 iqs269->ati_current = true;
1081
1082 err_mutex:
1083 mutex_unlock(&iqs269->lock);
1084
1085 return error;
1086 }
1087
1088 static int iqs269_input_init(struct iqs269_private *iqs269)
1089 {
1090 struct i2c_client *client = iqs269->client;
1091 struct iqs269_flags flags;
1092 unsigned int sw_code, keycode;
1093 int error, i, j;
1094 u8 dir_mask, state;
1095
1096 iqs269->keypad = devm_input_allocate_device(&client->dev);
1097 if (!iqs269->keypad)
1098 return -ENOMEM;
1099
1100 iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode);
1101 iqs269->keypad->keycode = iqs269->keycode;
1102 iqs269->keypad->keycodesize = sizeof(*iqs269->keycode);
1103
1104 iqs269->keypad->name = "iqs269a_keypad";
1105 iqs269->keypad->id.bustype = BUS_I2C;
1106
1107 if (iqs269->hall_enable) {
1108 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS,
1109 &flags, sizeof(flags));
1110 if (error) {
1111 dev_err(&client->dev,
1112 "Failed to read initial status: %d\n", error);
1113 return error;
1114 }
1115 }
1116
1117 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
1118 dir_mask = flags.states[IQS269_ST_OFFS_DIR];
1119 if (!iqs269_events[i].dir_up)
1120 dir_mask = ~dir_mask;
1121
1122 state = flags.states[iqs269_events[i].st_offs] & dir_mask;
1123
1124 sw_code = iqs269->switches[i].code;
1125
1126 for (j = 0; j < IQS269_NUM_CH; j++) {
1127 keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
1128
1129
1130
1131
1132
1133 switch (j) {
1134 case IQS269_CHx_HALL_ACTIVE:
1135 if (iqs269->hall_enable &&
1136 iqs269->switches[i].enabled) {
1137 input_set_capability(iqs269->keypad,
1138 EV_SW, sw_code);
1139 input_report_switch(iqs269->keypad,
1140 sw_code,
1141 state & BIT(j));
1142 }
1143 fallthrough;
1144
1145 case IQS269_CHx_HALL_INACTIVE:
1146 if (iqs269->hall_enable)
1147 continue;
1148 fallthrough;
1149
1150 default:
1151 if (keycode != KEY_RESERVED)
1152 input_set_capability(iqs269->keypad,
1153 EV_KEY, keycode);
1154 }
1155 }
1156 }
1157
1158 input_sync(iqs269->keypad);
1159
1160 error = input_register_device(iqs269->keypad);
1161 if (error) {
1162 dev_err(&client->dev, "Failed to register keypad: %d\n", error);
1163 return error;
1164 }
1165
1166 for (i = 0; i < IQS269_NUM_SL; i++) {
1167 if (!iqs269->sys_reg.slider_select[i])
1168 continue;
1169
1170 iqs269->slider[i] = devm_input_allocate_device(&client->dev);
1171 if (!iqs269->slider[i])
1172 return -ENOMEM;
1173
1174 iqs269->slider[i]->name = i ? "iqs269a_slider_1"
1175 : "iqs269a_slider_0";
1176 iqs269->slider[i]->id.bustype = BUS_I2C;
1177
1178 input_set_capability(iqs269->slider[i], EV_KEY, BTN_TOUCH);
1179 input_set_abs_params(iqs269->slider[i], ABS_X, 0, 255, 0, 0);
1180
1181 error = input_register_device(iqs269->slider[i]);
1182 if (error) {
1183 dev_err(&client->dev,
1184 "Failed to register slider %d: %d\n", i, error);
1185 return error;
1186 }
1187 }
1188
1189 return 0;
1190 }
1191
1192 static int iqs269_report(struct iqs269_private *iqs269)
1193 {
1194 struct i2c_client *client = iqs269->client;
1195 struct iqs269_flags flags;
1196 unsigned int sw_code, keycode;
1197 int error, i, j;
1198 u8 slider_x[IQS269_NUM_SL];
1199 u8 dir_mask, state;
1200
1201 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags,
1202 sizeof(flags));
1203 if (error) {
1204 dev_err(&client->dev, "Failed to read device status: %d\n",
1205 error);
1206 return error;
1207 }
1208
1209
1210
1211
1212
1213
1214 if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) {
1215 dev_err(&client->dev, "Unexpected device reset\n");
1216
1217 error = iqs269_dev_init(iqs269);
1218 if (error)
1219 dev_err(&client->dev,
1220 "Failed to re-initialize device: %d\n", error);
1221
1222 return error;
1223 }
1224
1225 error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X, slider_x,
1226 sizeof(slider_x));
1227 if (error) {
1228 dev_err(&client->dev, "Failed to read slider position: %d\n",
1229 error);
1230 return error;
1231 }
1232
1233 for (i = 0; i < IQS269_NUM_SL; i++) {
1234 if (!iqs269->sys_reg.slider_select[i])
1235 continue;
1236
1237
1238
1239
1240
1241 if (flags.states[IQS269_ST_OFFS_TOUCH] &
1242 iqs269->sys_reg.slider_select[i]) {
1243 input_report_key(iqs269->slider[i], BTN_TOUCH, 1);
1244 input_report_abs(iqs269->slider[i], ABS_X, slider_x[i]);
1245 } else {
1246 input_report_key(iqs269->slider[i], BTN_TOUCH, 0);
1247 }
1248
1249 input_sync(iqs269->slider[i]);
1250 }
1251
1252 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
1253 dir_mask = flags.states[IQS269_ST_OFFS_DIR];
1254 if (!iqs269_events[i].dir_up)
1255 dir_mask = ~dir_mask;
1256
1257 state = flags.states[iqs269_events[i].st_offs] & dir_mask;
1258
1259 sw_code = iqs269->switches[i].code;
1260
1261 for (j = 0; j < IQS269_NUM_CH; j++) {
1262 keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
1263
1264 switch (j) {
1265 case IQS269_CHx_HALL_ACTIVE:
1266 if (iqs269->hall_enable &&
1267 iqs269->switches[i].enabled)
1268 input_report_switch(iqs269->keypad,
1269 sw_code,
1270 state & BIT(j));
1271 fallthrough;
1272
1273 case IQS269_CHx_HALL_INACTIVE:
1274 if (iqs269->hall_enable)
1275 continue;
1276 fallthrough;
1277
1278 default:
1279 input_report_key(iqs269->keypad, keycode,
1280 state & BIT(j));
1281 }
1282 }
1283 }
1284
1285 input_sync(iqs269->keypad);
1286
1287 return 0;
1288 }
1289
1290 static irqreturn_t iqs269_irq(int irq, void *context)
1291 {
1292 struct iqs269_private *iqs269 = context;
1293
1294 if (iqs269_report(iqs269))
1295 return IRQ_NONE;
1296
1297
1298
1299
1300
1301
1302 iqs269_irq_wait();
1303
1304 return IRQ_HANDLED;
1305 }
1306
1307 static ssize_t counts_show(struct device *dev,
1308 struct device_attribute *attr, char *buf)
1309 {
1310 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1311 struct i2c_client *client = iqs269->client;
1312 __le16 counts;
1313 int error;
1314
1315 if (!iqs269->ati_current || iqs269->hall_enable)
1316 return -EPERM;
1317
1318
1319
1320
1321
1322
1323 disable_irq(client->irq);
1324
1325 error = regmap_raw_read(iqs269->regmap,
1326 IQS269_CHx_COUNTS + iqs269->ch_num * 2,
1327 &counts, sizeof(counts));
1328
1329 iqs269_irq_wait();
1330 enable_irq(client->irq);
1331
1332 if (error)
1333 return error;
1334
1335 return scnprintf(buf, PAGE_SIZE, "%u\n", le16_to_cpu(counts));
1336 }
1337
1338 static ssize_t hall_bin_show(struct device *dev,
1339 struct device_attribute *attr, char *buf)
1340 {
1341 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1342 struct i2c_client *client = iqs269->client;
1343 unsigned int val;
1344 int error;
1345
1346 disable_irq(client->irq);
1347
1348 error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val);
1349
1350 iqs269_irq_wait();
1351 enable_irq(client->irq);
1352
1353 if (error)
1354 return error;
1355
1356 switch (iqs269->ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable &
1357 iqs269->ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) {
1358 case IQS269_HALL_PAD_R:
1359 val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK;
1360 val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT;
1361 break;
1362
1363 case IQS269_HALL_PAD_L:
1364 val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK;
1365 val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT;
1366 break;
1367
1368 default:
1369 return -EINVAL;
1370 }
1371
1372 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1373 }
1374
1375 static ssize_t hall_enable_show(struct device *dev,
1376 struct device_attribute *attr, char *buf)
1377 {
1378 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1379
1380 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->hall_enable);
1381 }
1382
1383 static ssize_t hall_enable_store(struct device *dev,
1384 struct device_attribute *attr, const char *buf,
1385 size_t count)
1386 {
1387 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1388 unsigned int val;
1389 int error;
1390
1391 error = kstrtouint(buf, 10, &val);
1392 if (error)
1393 return error;
1394
1395 mutex_lock(&iqs269->lock);
1396
1397 iqs269->hall_enable = val;
1398 iqs269->ati_current = false;
1399
1400 mutex_unlock(&iqs269->lock);
1401
1402 return count;
1403 }
1404
1405 static ssize_t ch_number_show(struct device *dev,
1406 struct device_attribute *attr, char *buf)
1407 {
1408 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1409
1410 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ch_num);
1411 }
1412
1413 static ssize_t ch_number_store(struct device *dev,
1414 struct device_attribute *attr, const char *buf,
1415 size_t count)
1416 {
1417 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1418 unsigned int val;
1419 int error;
1420
1421 error = kstrtouint(buf, 10, &val);
1422 if (error)
1423 return error;
1424
1425 if (val >= IQS269_NUM_CH)
1426 return -EINVAL;
1427
1428 iqs269->ch_num = val;
1429
1430 return count;
1431 }
1432
1433 static ssize_t rx_enable_show(struct device *dev,
1434 struct device_attribute *attr, char *buf)
1435 {
1436 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1437
1438 return scnprintf(buf, PAGE_SIZE, "%u\n",
1439 iqs269->ch_reg[iqs269->ch_num].rx_enable);
1440 }
1441
1442 static ssize_t rx_enable_store(struct device *dev,
1443 struct device_attribute *attr, const char *buf,
1444 size_t count)
1445 {
1446 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1447 unsigned int val;
1448 int error;
1449
1450 error = kstrtouint(buf, 10, &val);
1451 if (error)
1452 return error;
1453
1454 if (val > 0xFF)
1455 return -EINVAL;
1456
1457 mutex_lock(&iqs269->lock);
1458
1459 iqs269->ch_reg[iqs269->ch_num].rx_enable = val;
1460 iqs269->ati_current = false;
1461
1462 mutex_unlock(&iqs269->lock);
1463
1464 return count;
1465 }
1466
1467 static ssize_t ati_mode_show(struct device *dev,
1468 struct device_attribute *attr, char *buf)
1469 {
1470 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1471 unsigned int val;
1472 int error;
1473
1474 error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val);
1475 if (error)
1476 return error;
1477
1478 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1479 }
1480
1481 static ssize_t ati_mode_store(struct device *dev,
1482 struct device_attribute *attr, const char *buf,
1483 size_t count)
1484 {
1485 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1486 unsigned int val;
1487 int error;
1488
1489 error = kstrtouint(buf, 10, &val);
1490 if (error)
1491 return error;
1492
1493 error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val);
1494 if (error)
1495 return error;
1496
1497 return count;
1498 }
1499
1500 static ssize_t ati_base_show(struct device *dev,
1501 struct device_attribute *attr, char *buf)
1502 {
1503 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1504 unsigned int val;
1505 int error;
1506
1507 error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val);
1508 if (error)
1509 return error;
1510
1511 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1512 }
1513
1514 static ssize_t ati_base_store(struct device *dev,
1515 struct device_attribute *attr, const char *buf,
1516 size_t count)
1517 {
1518 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1519 unsigned int val;
1520 int error;
1521
1522 error = kstrtouint(buf, 10, &val);
1523 if (error)
1524 return error;
1525
1526 error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val);
1527 if (error)
1528 return error;
1529
1530 return count;
1531 }
1532
1533 static ssize_t ati_target_show(struct device *dev,
1534 struct device_attribute *attr, char *buf)
1535 {
1536 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1537 unsigned int val;
1538 int error;
1539
1540 error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val);
1541 if (error)
1542 return error;
1543
1544 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1545 }
1546
1547 static ssize_t ati_target_store(struct device *dev,
1548 struct device_attribute *attr, const char *buf,
1549 size_t count)
1550 {
1551 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1552 unsigned int val;
1553 int error;
1554
1555 error = kstrtouint(buf, 10, &val);
1556 if (error)
1557 return error;
1558
1559 error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val);
1560 if (error)
1561 return error;
1562
1563 return count;
1564 }
1565
1566 static ssize_t ati_trigger_show(struct device *dev,
1567 struct device_attribute *attr, char *buf)
1568 {
1569 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1570
1571 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ati_current);
1572 }
1573
1574 static ssize_t ati_trigger_store(struct device *dev,
1575 struct device_attribute *attr, const char *buf,
1576 size_t count)
1577 {
1578 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1579 struct i2c_client *client = iqs269->client;
1580 unsigned int val;
1581 int error;
1582
1583 error = kstrtouint(buf, 10, &val);
1584 if (error)
1585 return error;
1586
1587 if (!val)
1588 return count;
1589
1590 disable_irq(client->irq);
1591
1592 error = iqs269_dev_init(iqs269);
1593
1594 iqs269_irq_wait();
1595 enable_irq(client->irq);
1596
1597 if (error)
1598 return error;
1599
1600 return count;
1601 }
1602
1603 static DEVICE_ATTR_RO(counts);
1604 static DEVICE_ATTR_RO(hall_bin);
1605 static DEVICE_ATTR_RW(hall_enable);
1606 static DEVICE_ATTR_RW(ch_number);
1607 static DEVICE_ATTR_RW(rx_enable);
1608 static DEVICE_ATTR_RW(ati_mode);
1609 static DEVICE_ATTR_RW(ati_base);
1610 static DEVICE_ATTR_RW(ati_target);
1611 static DEVICE_ATTR_RW(ati_trigger);
1612
1613 static struct attribute *iqs269_attrs[] = {
1614 &dev_attr_counts.attr,
1615 &dev_attr_hall_bin.attr,
1616 &dev_attr_hall_enable.attr,
1617 &dev_attr_ch_number.attr,
1618 &dev_attr_rx_enable.attr,
1619 &dev_attr_ati_mode.attr,
1620 &dev_attr_ati_base.attr,
1621 &dev_attr_ati_target.attr,
1622 &dev_attr_ati_trigger.attr,
1623 NULL,
1624 };
1625
1626 static const struct attribute_group iqs269_attr_group = {
1627 .attrs = iqs269_attrs,
1628 };
1629
1630 static const struct regmap_config iqs269_regmap_config = {
1631 .reg_bits = 8,
1632 .val_bits = 16,
1633 .max_register = IQS269_MAX_REG,
1634 };
1635
1636 static int iqs269_probe(struct i2c_client *client)
1637 {
1638 struct iqs269_ver_info ver_info;
1639 struct iqs269_private *iqs269;
1640 int error;
1641
1642 iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL);
1643 if (!iqs269)
1644 return -ENOMEM;
1645
1646 i2c_set_clientdata(client, iqs269);
1647 iqs269->client = client;
1648
1649 iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config);
1650 if (IS_ERR(iqs269->regmap)) {
1651 error = PTR_ERR(iqs269->regmap);
1652 dev_err(&client->dev, "Failed to initialize register map: %d\n",
1653 error);
1654 return error;
1655 }
1656
1657 mutex_init(&iqs269->lock);
1658
1659 error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO, &ver_info,
1660 sizeof(ver_info));
1661 if (error)
1662 return error;
1663
1664 if (ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) {
1665 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
1666 ver_info.prod_num);
1667 return -EINVAL;
1668 }
1669
1670 error = iqs269_parse_prop(iqs269);
1671 if (error)
1672 return error;
1673
1674 error = iqs269_dev_init(iqs269);
1675 if (error) {
1676 dev_err(&client->dev, "Failed to initialize device: %d\n",
1677 error);
1678 return error;
1679 }
1680
1681 error = iqs269_input_init(iqs269);
1682 if (error)
1683 return error;
1684
1685 error = devm_request_threaded_irq(&client->dev, client->irq,
1686 NULL, iqs269_irq, IRQF_ONESHOT,
1687 client->name, iqs269);
1688 if (error) {
1689 dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
1690 return error;
1691 }
1692
1693 error = devm_device_add_group(&client->dev, &iqs269_attr_group);
1694 if (error)
1695 dev_err(&client->dev, "Failed to add attributes: %d\n", error);
1696
1697 return error;
1698 }
1699
1700 static int __maybe_unused iqs269_suspend(struct device *dev)
1701 {
1702 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1703 struct i2c_client *client = iqs269->client;
1704 unsigned int val;
1705 int error;
1706
1707 if (!iqs269->suspend_mode)
1708 return 0;
1709
1710 disable_irq(client->irq);
1711
1712
1713
1714
1715
1716
1717 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1718 IQS269_SYS_SETTINGS_DIS_AUTO, ~0);
1719 if (error)
1720 goto err_irq;
1721
1722
1723
1724
1725
1726 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1727 !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
1728 IQS269_PWR_MODE_POLL_SLEEP_US,
1729 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1730 if (error)
1731 goto err_irq;
1732
1733 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1734 IQS269_SYS_SETTINGS_PWR_MODE_MASK,
1735 iqs269->suspend_mode <<
1736 IQS269_SYS_SETTINGS_PWR_MODE_SHIFT);
1737 if (error)
1738 goto err_irq;
1739
1740
1741
1742
1743
1744
1745 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1746 (val & IQS269_SYS_FLAGS_PWR_MODE_MASK)
1747 == (iqs269->suspend_mode <<
1748 IQS269_SYS_FLAGS_PWR_MODE_SHIFT),
1749 IQS269_PWR_MODE_POLL_SLEEP_US,
1750 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1751
1752 err_irq:
1753 iqs269_irq_wait();
1754 enable_irq(client->irq);
1755
1756 return error;
1757 }
1758
1759 static int __maybe_unused iqs269_resume(struct device *dev)
1760 {
1761 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1762 struct i2c_client *client = iqs269->client;
1763 unsigned int val;
1764 int error;
1765
1766 if (!iqs269->suspend_mode)
1767 return 0;
1768
1769 disable_irq(client->irq);
1770
1771 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1772 IQS269_SYS_SETTINGS_PWR_MODE_MASK, 0);
1773 if (error)
1774 goto err_irq;
1775
1776
1777
1778
1779
1780 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1781 !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
1782 IQS269_PWR_MODE_POLL_SLEEP_US,
1783 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1784 if (error)
1785 goto err_irq;
1786
1787 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1788 IQS269_SYS_SETTINGS_DIS_AUTO, 0);
1789 if (error)
1790 goto err_irq;
1791
1792
1793
1794
1795
1796
1797 error = iqs269_report(iqs269);
1798
1799 err_irq:
1800 iqs269_irq_wait();
1801 enable_irq(client->irq);
1802
1803 return error;
1804 }
1805
1806 static SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume);
1807
1808 static const struct of_device_id iqs269_of_match[] = {
1809 { .compatible = "azoteq,iqs269a" },
1810 { }
1811 };
1812 MODULE_DEVICE_TABLE(of, iqs269_of_match);
1813
1814 static struct i2c_driver iqs269_i2c_driver = {
1815 .driver = {
1816 .name = "iqs269a",
1817 .of_match_table = iqs269_of_match,
1818 .pm = &iqs269_pm,
1819 },
1820 .probe_new = iqs269_probe,
1821 };
1822 module_i2c_driver(iqs269_i2c_driver);
1823
1824 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
1825 MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller");
1826 MODULE_LICENSE("GPL");