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0001 /*
0002  * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
0003  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
0004  *
0005  * This software is available to you under a choice of one of two
0006  * licenses.  You may choose to be licensed under the terms of the GNU
0007  * General Public License (GPL) Version 2, available from the file
0008  * COPYING in the main directory of this source tree, or the
0009  * OpenIB.org BSD license below:
0010  *
0011  *     Redistribution and use in source and binary forms, with or
0012  *     without modification, are permitted provided that the following
0013  *     conditions are met:
0014  *
0015  *      - Redistributions of source code must retain the above
0016  *        copyright notice, this list of conditions and the following
0017  *        disclaimer.
0018  *
0019  *      - Redistributions in binary form must reproduce the above
0020  *        copyright notice, this list of conditions and the following
0021  *        disclaimer in the documentation and/or other materials
0022  *        provided with the distribution.
0023  *
0024  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0025  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0026  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0027  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0028  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0029  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0030  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0031  * SOFTWARE.
0032  */
0033 
0034 #include <linux/delay.h>
0035 #include <linux/pci.h>
0036 #include <linux/vmalloc.h>
0037 
0038 #include "qib.h"
0039 #include "qib_qsfp.h"
0040 
0041 /*
0042  * QSFP support for ib_qib driver, using "Two Wire Serial Interface" driver
0043  * in qib_twsi.c
0044  */
0045 #define QSFP_MAX_RETRY 4
0046 
0047 static int qsfp_read(struct qib_pportdata *ppd, int addr, void *bp, int len)
0048 {
0049     struct qib_devdata *dd = ppd->dd;
0050     u32 out, mask;
0051     int ret, cnt, pass = 0;
0052     int stuck = 0;
0053     u8 *buff = bp;
0054 
0055     ret = mutex_lock_interruptible(&dd->eep_lock);
0056     if (ret)
0057         goto no_unlock;
0058 
0059     if (dd->twsi_eeprom_dev == QIB_TWSI_NO_DEV) {
0060         ret = -ENXIO;
0061         goto bail;
0062     }
0063 
0064     /*
0065      * We presume, if we are called at all, that this board has
0066      * QSFP. This is on the same i2c chain as the legacy parts,
0067      * but only responds if the module is selected via GPIO pins.
0068      * Further, there are very long setup and hold requirements
0069      * on MODSEL.
0070      */
0071     mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE;
0072     out = QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE;
0073     if (ppd->hw_pidx) {
0074         mask <<= QSFP_GPIO_PORT2_SHIFT;
0075         out <<= QSFP_GPIO_PORT2_SHIFT;
0076     }
0077 
0078     dd->f_gpio_mod(dd, out, mask, mask);
0079 
0080     /*
0081      * Module could take up to 2 Msec to respond to MOD_SEL, and there
0082      * is no way to tell if it is ready, so we must wait.
0083      */
0084     msleep(20);
0085 
0086     /* Make sure TWSI bus is in sane state. */
0087     ret = qib_twsi_reset(dd);
0088     if (ret) {
0089         qib_dev_porterr(dd, ppd->port,
0090                 "QSFP interface Reset for read failed\n");
0091         ret = -EIO;
0092         stuck = 1;
0093         goto deselect;
0094     }
0095 
0096     /* All QSFP modules are at A0 */
0097 
0098     cnt = 0;
0099     while (cnt < len) {
0100         unsigned in_page;
0101         int wlen = len - cnt;
0102 
0103         in_page = addr % QSFP_PAGESIZE;
0104         if ((in_page + wlen) > QSFP_PAGESIZE)
0105             wlen = QSFP_PAGESIZE - in_page;
0106         ret = qib_twsi_blk_rd(dd, QSFP_DEV, addr, buff + cnt, wlen);
0107         /* Some QSFP's fail first try. Retry as experiment */
0108         if (ret && cnt == 0 && ++pass < QSFP_MAX_RETRY)
0109             continue;
0110         if (ret) {
0111             /* qib_twsi_blk_rd() 1 for error, else 0 */
0112             ret = -EIO;
0113             goto deselect;
0114         }
0115         addr += wlen;
0116         cnt += wlen;
0117     }
0118     ret = cnt;
0119 
0120 deselect:
0121     /*
0122      * Module could take up to 10 uSec after transfer before
0123      * ready to respond to MOD_SEL negation, and there is no way
0124      * to tell if it is ready, so we must wait.
0125      */
0126     udelay(10);
0127     /* set QSFP MODSEL, RST. LP all high */
0128     dd->f_gpio_mod(dd, mask, mask, mask);
0129 
0130     /*
0131      * Module could take up to 2 Msec to respond to MOD_SEL
0132      * going away, and there is no way to tell if it is ready.
0133      * so we must wait.
0134      */
0135     if (stuck)
0136         qib_dev_err(dd, "QSFP interface bus stuck non-idle\n");
0137 
0138     if (pass >= QSFP_MAX_RETRY && ret)
0139         qib_dev_porterr(dd, ppd->port, "QSFP failed even retrying\n");
0140     else if (pass)
0141         qib_dev_porterr(dd, ppd->port, "QSFP retries: %d\n", pass);
0142 
0143     msleep(20);
0144 
0145 bail:
0146     mutex_unlock(&dd->eep_lock);
0147 
0148 no_unlock:
0149     return ret;
0150 }
0151 
0152 /*
0153  * qsfp_write
0154  * We do not ordinarily write the QSFP, but this is needed to select
0155  * the page on non-flat QSFPs, and possibly later unusual cases
0156  */
0157 static int qib_qsfp_write(struct qib_pportdata *ppd, int addr, void *bp,
0158               int len)
0159 {
0160     struct qib_devdata *dd = ppd->dd;
0161     u32 out, mask;
0162     int ret, cnt;
0163     u8 *buff = bp;
0164 
0165     ret = mutex_lock_interruptible(&dd->eep_lock);
0166     if (ret)
0167         goto no_unlock;
0168 
0169     if (dd->twsi_eeprom_dev == QIB_TWSI_NO_DEV) {
0170         ret = -ENXIO;
0171         goto bail;
0172     }
0173 
0174     /*
0175      * We presume, if we are called at all, that this board has
0176      * QSFP. This is on the same i2c chain as the legacy parts,
0177      * but only responds if the module is selected via GPIO pins.
0178      * Further, there are very long setup and hold requirements
0179      * on MODSEL.
0180      */
0181     mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE;
0182     out = QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE;
0183     if (ppd->hw_pidx) {
0184         mask <<= QSFP_GPIO_PORT2_SHIFT;
0185         out <<= QSFP_GPIO_PORT2_SHIFT;
0186     }
0187     dd->f_gpio_mod(dd, out, mask, mask);
0188 
0189     /*
0190      * Module could take up to 2 Msec to respond to MOD_SEL,
0191      * and there is no way to tell if it is ready, so we must wait.
0192      */
0193     msleep(20);
0194 
0195     /* Make sure TWSI bus is in sane state. */
0196     ret = qib_twsi_reset(dd);
0197     if (ret) {
0198         qib_dev_porterr(dd, ppd->port,
0199                 "QSFP interface Reset for write failed\n");
0200         ret = -EIO;
0201         goto deselect;
0202     }
0203 
0204     /* All QSFP modules are at A0 */
0205 
0206     cnt = 0;
0207     while (cnt < len) {
0208         unsigned in_page;
0209         int wlen = len - cnt;
0210 
0211         in_page = addr % QSFP_PAGESIZE;
0212         if ((in_page + wlen) > QSFP_PAGESIZE)
0213             wlen = QSFP_PAGESIZE - in_page;
0214         ret = qib_twsi_blk_wr(dd, QSFP_DEV, addr, buff + cnt, wlen);
0215         if (ret) {
0216             /* qib_twsi_blk_wr() 1 for error, else 0 */
0217             ret = -EIO;
0218             goto deselect;
0219         }
0220         addr += wlen;
0221         cnt += wlen;
0222     }
0223     ret = cnt;
0224 
0225 deselect:
0226     /*
0227      * Module could take up to 10 uSec after transfer before
0228      * ready to respond to MOD_SEL negation, and there is no way
0229      * to tell if it is ready, so we must wait.
0230      */
0231     udelay(10);
0232     /* set QSFP MODSEL, RST, LP high */
0233     dd->f_gpio_mod(dd, mask, mask, mask);
0234     /*
0235      * Module could take up to 2 Msec to respond to MOD_SEL
0236      * going away, and there is no way to tell if it is ready.
0237      * so we must wait.
0238      */
0239     msleep(20);
0240 
0241 bail:
0242     mutex_unlock(&dd->eep_lock);
0243 
0244 no_unlock:
0245     return ret;
0246 }
0247 
0248 /*
0249  * For validation, we want to check the checksums, even of the
0250  * fields we do not otherwise use. This function reads the bytes from
0251  * <first> to <next-1> and returns the 8lsbs of the sum, or <0 for errors
0252  */
0253 static int qsfp_cks(struct qib_pportdata *ppd, int first, int next)
0254 {
0255     int ret;
0256     u16 cks;
0257     u8 bval;
0258 
0259     cks = 0;
0260     while (first < next) {
0261         ret = qsfp_read(ppd, first, &bval, 1);
0262         if (ret < 0)
0263             goto bail;
0264         cks += bval;
0265         ++first;
0266     }
0267     ret = cks & 0xFF;
0268 bail:
0269     return ret;
0270 
0271 }
0272 
0273 int qib_refresh_qsfp_cache(struct qib_pportdata *ppd, struct qib_qsfp_cache *cp)
0274 {
0275     int ret;
0276     int idx;
0277     u16 cks;
0278     u8 peek[4];
0279 
0280     /* ensure sane contents on invalid reads, for cable swaps */
0281     memset(cp, 0, sizeof(*cp));
0282 
0283     if (!qib_qsfp_mod_present(ppd)) {
0284         ret = -ENODEV;
0285         goto bail;
0286     }
0287 
0288     ret = qsfp_read(ppd, 0, peek, 3);
0289     if (ret < 0)
0290         goto bail;
0291     if ((peek[0] & 0xFE) != 0x0C)
0292         qib_dev_porterr(ppd->dd, ppd->port,
0293                 "QSFP byte0 is 0x%02X, S/B 0x0C/D\n", peek[0]);
0294 
0295     if ((peek[2] & 4) == 0) {
0296         /*
0297          * If cable is paged, rather than "flat memory", we need to
0298          * set the page to zero, Even if it already appears to be zero.
0299          */
0300         u8 poke = 0;
0301 
0302         ret = qib_qsfp_write(ppd, 127, &poke, 1);
0303         udelay(50);
0304         if (ret != 1) {
0305             qib_dev_porterr(ppd->dd, ppd->port,
0306                     "Failed QSFP Page set\n");
0307             goto bail;
0308         }
0309     }
0310 
0311     ret = qsfp_read(ppd, QSFP_MOD_ID_OFFS, &cp->id, 1);
0312     if (ret < 0)
0313         goto bail;
0314     if ((cp->id & 0xFE) != 0x0C)
0315         qib_dev_porterr(ppd->dd, ppd->port,
0316                 "QSFP ID byte is 0x%02X, S/B 0x0C/D\n", cp->id);
0317     cks = cp->id;
0318 
0319     ret = qsfp_read(ppd, QSFP_MOD_PWR_OFFS, &cp->pwr, 1);
0320     if (ret < 0)
0321         goto bail;
0322     cks += cp->pwr;
0323 
0324     ret = qsfp_cks(ppd, QSFP_MOD_PWR_OFFS + 1, QSFP_MOD_LEN_OFFS);
0325     if (ret < 0)
0326         goto bail;
0327     cks += ret;
0328 
0329     ret = qsfp_read(ppd, QSFP_MOD_LEN_OFFS, &cp->len, 1);
0330     if (ret < 0)
0331         goto bail;
0332     cks += cp->len;
0333 
0334     ret = qsfp_read(ppd, QSFP_MOD_TECH_OFFS, &cp->tech, 1);
0335     if (ret < 0)
0336         goto bail;
0337     cks += cp->tech;
0338 
0339     ret = qsfp_read(ppd, QSFP_VEND_OFFS, &cp->vendor, QSFP_VEND_LEN);
0340     if (ret < 0)
0341         goto bail;
0342     for (idx = 0; idx < QSFP_VEND_LEN; ++idx)
0343         cks += cp->vendor[idx];
0344 
0345     ret = qsfp_read(ppd, QSFP_IBXCV_OFFS, &cp->xt_xcv, 1);
0346     if (ret < 0)
0347         goto bail;
0348     cks += cp->xt_xcv;
0349 
0350     ret = qsfp_read(ppd, QSFP_VOUI_OFFS, &cp->oui, QSFP_VOUI_LEN);
0351     if (ret < 0)
0352         goto bail;
0353     for (idx = 0; idx < QSFP_VOUI_LEN; ++idx)
0354         cks += cp->oui[idx];
0355 
0356     ret = qsfp_read(ppd, QSFP_PN_OFFS, &cp->partnum, QSFP_PN_LEN);
0357     if (ret < 0)
0358         goto bail;
0359     for (idx = 0; idx < QSFP_PN_LEN; ++idx)
0360         cks += cp->partnum[idx];
0361 
0362     ret = qsfp_read(ppd, QSFP_REV_OFFS, &cp->rev, QSFP_REV_LEN);
0363     if (ret < 0)
0364         goto bail;
0365     for (idx = 0; idx < QSFP_REV_LEN; ++idx)
0366         cks += cp->rev[idx];
0367 
0368     ret = qsfp_read(ppd, QSFP_ATTEN_OFFS, &cp->atten, QSFP_ATTEN_LEN);
0369     if (ret < 0)
0370         goto bail;
0371     for (idx = 0; idx < QSFP_ATTEN_LEN; ++idx)
0372         cks += cp->atten[idx];
0373 
0374     ret = qsfp_cks(ppd, QSFP_ATTEN_OFFS + QSFP_ATTEN_LEN, QSFP_CC_OFFS);
0375     if (ret < 0)
0376         goto bail;
0377     cks += ret;
0378 
0379     cks &= 0xFF;
0380     ret = qsfp_read(ppd, QSFP_CC_OFFS, &cp->cks1, 1);
0381     if (ret < 0)
0382         goto bail;
0383     if (cks != cp->cks1)
0384         qib_dev_porterr(ppd->dd, ppd->port,
0385                 "QSFP cks1 is %02X, computed %02X\n", cp->cks1,
0386                 cks);
0387 
0388     /* Second checksum covers 192 to (serial, date, lot) */
0389     ret = qsfp_cks(ppd, QSFP_CC_OFFS + 1, QSFP_SN_OFFS);
0390     if (ret < 0)
0391         goto bail;
0392     cks = ret;
0393 
0394     ret = qsfp_read(ppd, QSFP_SN_OFFS, &cp->serial, QSFP_SN_LEN);
0395     if (ret < 0)
0396         goto bail;
0397     for (idx = 0; idx < QSFP_SN_LEN; ++idx)
0398         cks += cp->serial[idx];
0399 
0400     ret = qsfp_read(ppd, QSFP_DATE_OFFS, &cp->date, QSFP_DATE_LEN);
0401     if (ret < 0)
0402         goto bail;
0403     for (idx = 0; idx < QSFP_DATE_LEN; ++idx)
0404         cks += cp->date[idx];
0405 
0406     ret = qsfp_read(ppd, QSFP_LOT_OFFS, &cp->lot, QSFP_LOT_LEN);
0407     if (ret < 0)
0408         goto bail;
0409     for (idx = 0; idx < QSFP_LOT_LEN; ++idx)
0410         cks += cp->lot[idx];
0411 
0412     ret = qsfp_cks(ppd, QSFP_LOT_OFFS + QSFP_LOT_LEN, QSFP_CC_EXT_OFFS);
0413     if (ret < 0)
0414         goto bail;
0415     cks += ret;
0416 
0417     ret = qsfp_read(ppd, QSFP_CC_EXT_OFFS, &cp->cks2, 1);
0418     if (ret < 0)
0419         goto bail;
0420     cks &= 0xFF;
0421     if (cks != cp->cks2)
0422         qib_dev_porterr(ppd->dd, ppd->port,
0423                 "QSFP cks2 is %02X, computed %02X\n", cp->cks2,
0424                 cks);
0425     return 0;
0426 
0427 bail:
0428     cp->id = 0;
0429     return ret;
0430 }
0431 
0432 const char * const qib_qsfp_devtech[16] = {
0433     "850nm VCSEL", "1310nm VCSEL", "1550nm VCSEL", "1310nm FP",
0434     "1310nm DFB", "1550nm DFB", "1310nm EML", "1550nm EML",
0435     "Cu Misc", "1490nm DFB", "Cu NoEq", "Cu Eq",
0436     "Undef", "Cu Active BothEq", "Cu FarEq", "Cu NearEq"
0437 };
0438 
0439 #define QSFP_DUMP_CHUNK 16 /* Holds longest string */
0440 #define QSFP_DEFAULT_HDR_CNT 224
0441 
0442 static const char *pwr_codes = "1.5W2.0W2.5W3.5W";
0443 
0444 int qib_qsfp_mod_present(struct qib_pportdata *ppd)
0445 {
0446     u32 mask;
0447     int ret;
0448 
0449     mask = QSFP_GPIO_MOD_PRS_N <<
0450         (ppd->hw_pidx * QSFP_GPIO_PORT2_SHIFT);
0451     ret = ppd->dd->f_gpio_mod(ppd->dd, 0, 0, 0);
0452 
0453     return !((ret & mask) >>
0454          ((ppd->hw_pidx * QSFP_GPIO_PORT2_SHIFT) + 3));
0455 }
0456 
0457 /*
0458  * Initialize structures that control access to QSFP. Called once per port
0459  * on cards that support QSFP.
0460  */
0461 void qib_qsfp_init(struct qib_qsfp_data *qd,
0462            void (*fevent)(struct work_struct *))
0463 {
0464     u32 mask, highs;
0465 
0466     struct qib_devdata *dd = qd->ppd->dd;
0467 
0468     /* Initialize work struct for later QSFP events */
0469     INIT_WORK(&qd->work, fevent);
0470 
0471     /*
0472      * Later, we may want more validation. For now, just set up pins and
0473      * blip reset. If module is present, call qib_refresh_qsfp_cache(),
0474      * to do further init.
0475      */
0476     mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE;
0477     highs = mask - QSFP_GPIO_MOD_RST_N;
0478     if (qd->ppd->hw_pidx) {
0479         mask <<= QSFP_GPIO_PORT2_SHIFT;
0480         highs <<= QSFP_GPIO_PORT2_SHIFT;
0481     }
0482     dd->f_gpio_mod(dd, highs, mask, mask);
0483     udelay(20); /* Generous RST dwell */
0484 
0485     dd->f_gpio_mod(dd, mask, mask, mask);
0486 }
0487 
0488 int qib_qsfp_dump(struct qib_pportdata *ppd, char *buf, int len)
0489 {
0490     struct qib_qsfp_cache cd;
0491     u8 bin_buff[QSFP_DUMP_CHUNK];
0492     char lenstr[6];
0493     int sofar, ret;
0494     int bidx = 0;
0495 
0496     sofar = 0;
0497     ret = qib_refresh_qsfp_cache(ppd, &cd);
0498     if (ret < 0)
0499         goto bail;
0500 
0501     lenstr[0] = ' ';
0502     lenstr[1] = '\0';
0503     if (QSFP_IS_CU(cd.tech))
0504         sprintf(lenstr, "%dM ", cd.len);
0505 
0506     sofar += scnprintf(buf + sofar, len - sofar, "PWR:%.3sW\n", pwr_codes +
0507                (QSFP_PWR(cd.pwr) * 4));
0508 
0509     sofar += scnprintf(buf + sofar, len - sofar, "TECH:%s%s\n", lenstr,
0510                qib_qsfp_devtech[cd.tech >> 4]);
0511 
0512     sofar += scnprintf(buf + sofar, len - sofar, "Vendor:%.*s\n",
0513                QSFP_VEND_LEN, cd.vendor);
0514 
0515     sofar += scnprintf(buf + sofar, len - sofar, "OUI:%06X\n",
0516                QSFP_OUI(cd.oui));
0517 
0518     sofar += scnprintf(buf + sofar, len - sofar, "Part#:%.*s\n",
0519                QSFP_PN_LEN, cd.partnum);
0520     sofar += scnprintf(buf + sofar, len - sofar, "Rev:%.*s\n",
0521                QSFP_REV_LEN, cd.rev);
0522     if (QSFP_IS_CU(cd.tech))
0523         sofar += scnprintf(buf + sofar, len - sofar, "Atten:%d, %d\n",
0524                    QSFP_ATTEN_SDR(cd.atten),
0525                    QSFP_ATTEN_DDR(cd.atten));
0526     sofar += scnprintf(buf + sofar, len - sofar, "Serial:%.*s\n",
0527                QSFP_SN_LEN, cd.serial);
0528     sofar += scnprintf(buf + sofar, len - sofar, "Date:%.*s\n",
0529                QSFP_DATE_LEN, cd.date);
0530     sofar += scnprintf(buf + sofar, len - sofar, "Lot:%.*s\n",
0531                QSFP_LOT_LEN, cd.lot);
0532 
0533     while (bidx < QSFP_DEFAULT_HDR_CNT) {
0534         int iidx;
0535 
0536         ret = qsfp_read(ppd, bidx, bin_buff, QSFP_DUMP_CHUNK);
0537         if (ret < 0)
0538             goto bail;
0539         for (iidx = 0; iidx < ret; ++iidx) {
0540             sofar += scnprintf(buf + sofar, len-sofar, " %02X",
0541                 bin_buff[iidx]);
0542         }
0543         sofar += scnprintf(buf + sofar, len - sofar, "\n");
0544         bidx += QSFP_DUMP_CHUNK;
0545     }
0546     ret = sofar;
0547 bail:
0548     return ret;
0549 }
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