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0001 /*
0002  * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
0003  * All rights reserved.
0004  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
0005  *
0006  * This software is available to you under a choice of one of two
0007  * licenses.  You may choose to be licensed under the terms of the GNU
0008  * General Public License (GPL) Version 2, available from the file
0009  * COPYING in the main directory of this source tree, or the
0010  * OpenIB.org BSD license below:
0011  *
0012  *     Redistribution and use in source and binary forms, with or
0013  *     without modification, are permitted provided that the following
0014  *     conditions are met:
0015  *
0016  *      - Redistributions of source code must retain the above
0017  *        copyright notice, this list of conditions and the following
0018  *        disclaimer.
0019  *
0020  *      - Redistributions in binary form must reproduce the above
0021  *        copyright notice, this list of conditions and the following
0022  *        disclaimer in the documentation and/or other materials
0023  *        provided with the distribution.
0024  *
0025  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0026  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0027  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0028  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0029  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0030  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0031  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0032  * SOFTWARE.
0033  */
0034 
0035 #include <linux/pci.h>
0036 #include <linux/delay.h>
0037 
0038 #include "qib.h"
0039 #include "qib_common.h"
0040 
0041 /**
0042  * qib_format_hwmsg - format a single hwerror message
0043  * @msg: message buffer
0044  * @msgl: length of message buffer
0045  * @hwmsg: message to add to message buffer
0046  */
0047 static void qib_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
0048 {
0049     strlcat(msg, "[", msgl);
0050     strlcat(msg, hwmsg, msgl);
0051     strlcat(msg, "]", msgl);
0052 }
0053 
0054 /**
0055  * qib_format_hwerrors - format hardware error messages for display
0056  * @hwerrs: hardware errors bit vector
0057  * @hwerrmsgs: hardware error descriptions
0058  * @nhwerrmsgs: number of hwerrmsgs
0059  * @msg: message buffer
0060  * @msgl: message buffer length
0061  */
0062 void qib_format_hwerrors(u64 hwerrs, const struct qib_hwerror_msgs *hwerrmsgs,
0063              size_t nhwerrmsgs, char *msg, size_t msgl)
0064 {
0065     int i;
0066 
0067     for (i = 0; i < nhwerrmsgs; i++)
0068         if (hwerrs & hwerrmsgs[i].mask)
0069             qib_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
0070 }
0071 
0072 static void signal_ib_event(struct qib_pportdata *ppd, enum ib_event_type ev)
0073 {
0074     struct ib_event event;
0075     struct qib_devdata *dd = ppd->dd;
0076 
0077     event.device = &dd->verbs_dev.rdi.ibdev;
0078     event.element.port_num = ppd->port;
0079     event.event = ev;
0080     ib_dispatch_event(&event);
0081 }
0082 
0083 void qib_handle_e_ibstatuschanged(struct qib_pportdata *ppd, u64 ibcs)
0084 {
0085     struct qib_devdata *dd = ppd->dd;
0086     unsigned long flags;
0087     u32 lstate;
0088     u8 ltstate;
0089     enum ib_event_type ev = 0;
0090 
0091     lstate = dd->f_iblink_state(ibcs); /* linkstate */
0092     ltstate = dd->f_ibphys_portstate(ibcs);
0093 
0094     /*
0095      * If linkstate transitions into INIT from any of the various down
0096      * states, or if it transitions from any of the up (INIT or better)
0097      * states into any of the down states (except link recovery), then
0098      * call the chip-specific code to take appropriate actions.
0099      *
0100      * ppd->lflags could be 0 if this is the first time the interrupt
0101      * handlers has been called but the link is already up.
0102      */
0103     if (lstate >= IB_PORT_INIT &&
0104         (!ppd->lflags || (ppd->lflags & QIBL_LINKDOWN)) &&
0105         ltstate == IB_PHYSPORTSTATE_LINKUP) {
0106         /* transitioned to UP */
0107         if (dd->f_ib_updown(ppd, 1, ibcs))
0108             goto skip_ibchange; /* chip-code handled */
0109     } else if (ppd->lflags & (QIBL_LINKINIT | QIBL_LINKARMED |
0110            QIBL_LINKACTIVE | QIBL_IB_FORCE_NOTIFY)) {
0111         if (ltstate != IB_PHYSPORTSTATE_LINKUP &&
0112             ltstate <= IB_PHYSPORTSTATE_CFG_TRAIN &&
0113             dd->f_ib_updown(ppd, 0, ibcs))
0114             goto skip_ibchange; /* chip-code handled */
0115         qib_set_uevent_bits(ppd, _QIB_EVENT_LINKDOWN_BIT);
0116     }
0117 
0118     if (lstate != IB_PORT_DOWN) {
0119         /* lstate is INIT, ARMED, or ACTIVE */
0120         if (lstate != IB_PORT_ACTIVE) {
0121             *ppd->statusp &= ~QIB_STATUS_IB_READY;
0122             if (ppd->lflags & QIBL_LINKACTIVE)
0123                 ev = IB_EVENT_PORT_ERR;
0124             spin_lock_irqsave(&ppd->lflags_lock, flags);
0125             if (lstate == IB_PORT_ARMED) {
0126                 ppd->lflags |= QIBL_LINKARMED | QIBL_LINKV;
0127                 ppd->lflags &= ~(QIBL_LINKINIT |
0128                     QIBL_LINKDOWN | QIBL_LINKACTIVE);
0129             } else {
0130                 ppd->lflags |= QIBL_LINKINIT | QIBL_LINKV;
0131                 ppd->lflags &= ~(QIBL_LINKARMED |
0132                     QIBL_LINKDOWN | QIBL_LINKACTIVE);
0133             }
0134             spin_unlock_irqrestore(&ppd->lflags_lock, flags);
0135             /* start a 75msec timer to clear symbol errors */
0136             mod_timer(&ppd->symerr_clear_timer,
0137                   msecs_to_jiffies(75));
0138         } else if (ltstate == IB_PHYSPORTSTATE_LINKUP &&
0139                !(ppd->lflags & QIBL_LINKACTIVE)) {
0140             /* active, but not active defered */
0141             qib_hol_up(ppd); /* useful only for 6120 now */
0142             *ppd->statusp |=
0143                 QIB_STATUS_IB_READY | QIB_STATUS_IB_CONF;
0144             qib_clear_symerror_on_linkup(&ppd->symerr_clear_timer);
0145             spin_lock_irqsave(&ppd->lflags_lock, flags);
0146             ppd->lflags |= QIBL_LINKACTIVE | QIBL_LINKV;
0147             ppd->lflags &= ~(QIBL_LINKINIT |
0148                 QIBL_LINKDOWN | QIBL_LINKARMED);
0149             spin_unlock_irqrestore(&ppd->lflags_lock, flags);
0150             if (dd->flags & QIB_HAS_SEND_DMA)
0151                 qib_sdma_process_event(ppd,
0152                     qib_sdma_event_e30_go_running);
0153             ev = IB_EVENT_PORT_ACTIVE;
0154             dd->f_setextled(ppd, 1);
0155         }
0156     } else { /* down */
0157         if (ppd->lflags & QIBL_LINKACTIVE)
0158             ev = IB_EVENT_PORT_ERR;
0159         spin_lock_irqsave(&ppd->lflags_lock, flags);
0160         ppd->lflags |= QIBL_LINKDOWN | QIBL_LINKV;
0161         ppd->lflags &= ~(QIBL_LINKINIT |
0162                  QIBL_LINKACTIVE | QIBL_LINKARMED);
0163         spin_unlock_irqrestore(&ppd->lflags_lock, flags);
0164         *ppd->statusp &= ~QIB_STATUS_IB_READY;
0165     }
0166 
0167 skip_ibchange:
0168     ppd->lastibcstat = ibcs;
0169     if (ev)
0170         signal_ib_event(ppd, ev);
0171 }
0172 
0173 void qib_clear_symerror_on_linkup(struct timer_list *t)
0174 {
0175     struct qib_pportdata *ppd = from_timer(ppd, t, symerr_clear_timer);
0176 
0177     if (ppd->lflags & QIBL_LINKACTIVE)
0178         return;
0179 
0180     ppd->ibport_data.z_symbol_error_counter =
0181         ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBSYMBOLERR);
0182 }
0183 
0184 /*
0185  * Handle receive interrupts for user ctxts; this means a user
0186  * process was waiting for a packet to arrive, and didn't want
0187  * to poll.
0188  */
0189 void qib_handle_urcv(struct qib_devdata *dd, u64 ctxtr)
0190 {
0191     struct qib_ctxtdata *rcd;
0192     unsigned long flags;
0193     int i;
0194 
0195     spin_lock_irqsave(&dd->uctxt_lock, flags);
0196     for (i = dd->first_user_ctxt; dd->rcd && i < dd->cfgctxts; i++) {
0197         if (!(ctxtr & (1ULL << i)))
0198             continue;
0199         rcd = dd->rcd[i];
0200         if (!rcd || !rcd->cnt)
0201             continue;
0202 
0203         if (test_and_clear_bit(QIB_CTXT_WAITING_RCV, &rcd->flag)) {
0204             wake_up_interruptible(&rcd->wait);
0205             dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_DIS,
0206                       rcd->ctxt);
0207         } else if (test_and_clear_bit(QIB_CTXT_WAITING_URG,
0208                           &rcd->flag)) {
0209             rcd->urgent++;
0210             wake_up_interruptible(&rcd->wait);
0211         }
0212     }
0213     spin_unlock_irqrestore(&dd->uctxt_lock, flags);
0214 }
0215 
0216 void qib_bad_intrstatus(struct qib_devdata *dd)
0217 {
0218     static int allbits;
0219 
0220     /* separate routine, for better optimization of qib_intr() */
0221 
0222     /*
0223      * We print the message and disable interrupts, in hope of
0224      * having a better chance of debugging the problem.
0225      */
0226     qib_dev_err(dd,
0227         "Read of chip interrupt status failed disabling interrupts\n");
0228     if (allbits++) {
0229         /* disable interrupt delivery, something is very wrong */
0230         if (allbits == 2)
0231             dd->f_set_intr_state(dd, 0);
0232         if (allbits == 3) {
0233             qib_dev_err(dd,
0234                 "2nd bad interrupt status, unregistering interrupts\n");
0235             dd->flags |= QIB_BADINTR;
0236             dd->flags &= ~QIB_INITTED;
0237             dd->f_free_irq(dd);
0238         }
0239     }
0240 }