hw/mthca/mthca_wqe.h

0001 /*
0002  * Copyright (c) 2005 Cisco Systems. All rights reserved.
0003  *
0004  * This software is available to you under a choice of one of two
0005  * licenses.  You may choose to be licensed under the terms of the GNU
0006  * General Public License (GPL) Version 2, available from the file
0007  * COPYING in the main directory of this source tree, or the
0008  * OpenIB.org BSD license below:
0009  *
0010  *     Redistribution and use in source and binary forms, with or
0011  *     without modification, are permitted provided that the following
0012  *     conditions are met:
0013  *
0014  *      - Redistributions of source code must retain the above
0015  *        copyright notice, this list of conditions and the following
0016  *        disclaimer.
0017  *
0018  *      - Redistributions in binary form must reproduce the above
0019  *        copyright notice, this list of conditions and the following
0020  *        disclaimer in the documentation and/or other materials
0021  *        provided with the distribution.
0022  *
0023  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0024  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0025  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0026  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0027  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0028  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0029  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0030  * SOFTWARE.
0031  */
0032
0033 #ifndef MTHCA_WQE_H
0034 #define MTHCA_WQE_H
0035
0036 #include <linux/types.h>
0037
0038 enum {
0039     MTHCA_NEXT_DBD      = 1 << 7,
0040     MTHCA_NEXT_FENCE    = 1 << 6,
0041     MTHCA_NEXT_CQ_UPDATE    = 1 << 3,
0042     MTHCA_NEXT_EVENT_GEN    = 1 << 2,
0043     MTHCA_NEXT_SOLICIT  = 1 << 1,
0044     MTHCA_NEXT_IP_CSUM  = 1 << 4,
0045     MTHCA_NEXT_TCP_UDP_CSUM = 1 << 5,
0046
0047     MTHCA_MLX_VL15      = 1 << 17,
0048     MTHCA_MLX_SLR       = 1 << 16
0049 };
0050
0051 enum {
0052     MTHCA_INVAL_LKEY            = 0x100,
0053     MTHCA_TAVOR_MAX_WQES_PER_RECV_DB    = 256,
0054     MTHCA_ARBEL_MAX_WQES_PER_SEND_DB    = 255
0055 };
0056
0057 struct mthca_next_seg {
0058     __be32 nda_op;      /* [31:6] next WQE [4:0] next opcode */
0059     __be32 ee_nds;      /* [31:8] next EE  [7] DBD [6] F [5:0] next WQE size */
0060     __be32 flags;       /* [3] CQ [2] Event [1] Solicit */
0061     __be32 imm;     /* immediate data */
0062 };
0063
0064 struct mthca_tavor_ud_seg {
0065     u32    reserved1;
0066     __be32 lkey;
0067     __be64 av_addr;
0068     u32    reserved2[4];
0069     __be32 dqpn;
0070     __be32 qkey;
0071     u32    reserved3[2];
0072 };
0073
0074 struct mthca_arbel_ud_seg {
0075     __be32 av[8];
0076     __be32 dqpn;
0077     __be32 qkey;
0078     u32    reserved[2];
0079 };
0080
0081 struct mthca_bind_seg {
0082     __be32 flags;       /* [31] Atomic [30] rem write [29] rem read */
0083     u32    reserved;
0084     __be32 new_rkey;
0085     __be32 lkey;
0086     __be64 addr;
0087     __be64 length;
0088 };
0089
0090 struct mthca_raddr_seg {
0091     __be64 raddr;
0092     __be32 rkey;
0093     u32    reserved;
0094 };
0095
0096 struct mthca_atomic_seg {
0097     __be64 swap_add;
0098     __be64 compare;
0099 };
0100
0101 struct mthca_data_seg {
0102     __be32 byte_count;
0103     __be32 lkey;
0104     __be64 addr;
0105 };
0106
0107 struct mthca_mlx_seg {
0108     __be32 nda_op;
0109     __be32 nds;
0110     __be32 flags;       /* [17] VL15 [16] SLR [14:12] static rate
0111                    [11:8] SL [3] C [2] E */
0112     __be16 rlid;
0113     __be16 vcrc;
0114 };
0115
0116 static __always_inline void mthca_set_data_seg(struct mthca_data_seg *dseg,
0117                            struct ib_sge *sg)
0118 {
0119     dseg->byte_count = cpu_to_be32(sg->length);
0120     dseg->lkey       = cpu_to_be32(sg->lkey);
0121     dseg->addr       = cpu_to_be64(sg->addr);
0122 }
0123
0124 static __always_inline void mthca_set_data_seg_inval(struct mthca_data_seg *dseg)
0125 {
0126     dseg->byte_count = 0;
0127     dseg->lkey       = cpu_to_be32(MTHCA_INVAL_LKEY);
0128     dseg->addr       = 0;
0129 }
0130
0131 #endif /* MTHCA_WQE_H */