hw/irdma/puda.h

0001 /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
0002 /* Copyright (c) 2015 - 2020 Intel Corporation */
0003 #ifndef IRDMA_PUDA_H
0004 #define IRDMA_PUDA_H
0005
0006 #define IRDMA_IEQ_MPA_FRAMING   6
0007 #define IRDMA_TCP_OFFSET    40
0008 #define IRDMA_IPV4_PAD      20
0009 #define IRDMA_MRK_BLK_SZ    512
0010
0011 enum puda_rsrc_type {
0012     IRDMA_PUDA_RSRC_TYPE_ILQ = 1,
0013     IRDMA_PUDA_RSRC_TYPE_IEQ,
0014     IRDMA_PUDA_RSRC_TYPE_MAX, /* Must be last entry */
0015 };
0016
0017 enum puda_rsrc_complete {
0018     PUDA_CQ_CREATED = 1,
0019     PUDA_QP_CREATED,
0020     PUDA_TX_COMPLETE,
0021     PUDA_RX_COMPLETE,
0022     PUDA_HASH_CRC_COMPLETE,
0023 };
0024
0025 struct irdma_sc_dev;
0026 struct irdma_sc_qp;
0027 struct irdma_sc_cq;
0028
0029 struct irdma_puda_cmpl_info {
0030     struct irdma_qp_uk *qp;
0031     u8 q_type;
0032     u8 l3proto;
0033     u8 l4proto;
0034     u16 vlan;
0035     u32 payload_len;
0036     u32 compl_error; /* No_err=0, else major and minor err code */
0037     u32 qp_id;
0038     u32 wqe_idx;
0039     bool ipv4:1;
0040     bool smac_valid:1;
0041     bool vlan_valid:1;
0042     u8 smac[ETH_ALEN];
0043 };
0044
0045 struct irdma_puda_send_info {
0046     u64 paddr; /* Physical address */
0047     u32 len;
0048     u32 ah_id;
0049     u8 tcplen;
0050     u8 maclen;
0051     bool ipv4:1;
0052     bool do_lpb:1;
0053     void *scratch;
0054 };
0055
0056 struct irdma_puda_buf {
0057     struct list_head list; /* MUST be first entry */
0058     struct irdma_dma_mem mem; /* DMA memory for the buffer */
0059     struct irdma_puda_buf *next; /* for alloclist in rsrc struct */
0060     struct irdma_virt_mem buf_mem; /* Buffer memory for this buffer */
0061     void *scratch;
0062     u8 *iph;
0063     u8 *tcph;
0064     u8 *data;
0065     u16 datalen;
0066     u16 vlan_id;
0067     u8 tcphlen; /* tcp length in bytes */
0068     u8 maclen; /* mac length in bytes */
0069     u32 totallen; /* machlen+iphlen+tcphlen+datalen */
0070     refcount_t refcount;
0071     u8 hdrlen;
0072     bool ipv4:1;
0073     bool vlan_valid:1;
0074     bool do_lpb:1; /* Loopback buffer */
0075     bool smac_valid:1;
0076     u32 seqnum;
0077     u32 ah_id;
0078     u8 smac[ETH_ALEN];
0079     struct irdma_sc_vsi *vsi;
0080 };
0081
0082 struct irdma_puda_rsrc_info {
0083     void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf);
0084     void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid);
0085     enum puda_rsrc_type type; /* ILQ or IEQ */
0086     u32 count;
0087     u32 pd_id;
0088     u32 cq_id;
0089     u32 qp_id;
0090     u32 sq_size;
0091     u32 rq_size;
0092     u32 tx_buf_cnt; /* total bufs allocated will be rq_size + tx_buf_cnt */
0093     u16 buf_size;
0094     u8 stats_idx;
0095     bool stats_idx_valid:1;
0096     int abi_ver;
0097 };
0098
0099 struct irdma_puda_rsrc {
0100     struct irdma_sc_cq cq;
0101     struct irdma_sc_qp qp;
0102     struct irdma_sc_pd sc_pd;
0103     struct irdma_sc_dev *dev;
0104     struct irdma_sc_vsi *vsi;
0105     struct irdma_dma_mem cqmem;
0106     struct irdma_dma_mem qpmem;
0107     struct irdma_virt_mem ilq_mem;
0108     enum puda_rsrc_complete cmpl;
0109     enum puda_rsrc_type type;
0110     u16 buf_size; /*buf must be max datalen + tcpip hdr + mac */
0111     u32 cq_id;
0112     u32 qp_id;
0113     u32 sq_size;
0114     u32 rq_size;
0115     u32 cq_size;
0116     struct irdma_sq_uk_wr_trk_info *sq_wrtrk_array;
0117     u64 *rq_wrid_array;
0118     u32 compl_rxwqe_idx;
0119     u32 rx_wqe_idx;
0120     u32 rxq_invalid_cnt;
0121     u32 tx_wqe_avail_cnt;
0122     struct shash_desc *hash_desc;
0123     struct list_head txpend;
0124     struct list_head bufpool; /* free buffers pool list for recv and xmit */
0125     u32 alloc_buf_count;
0126     u32 avail_buf_count; /* snapshot of currently available buffers */
0127     spinlock_t bufpool_lock;
0128     struct irdma_puda_buf *alloclist;
0129     void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf);
0130     void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid);
0131     /* puda stats */
0132     u64 stats_buf_alloc_fail;
0133     u64 stats_pkt_rcvd;
0134     u64 stats_pkt_sent;
0135     u64 stats_rcvd_pkt_err;
0136     u64 stats_sent_pkt_q;
0137     u64 stats_bad_qp_id;
0138     /* IEQ stats */
0139     u64 fpdu_processed;
0140     u64 bad_seq_num;
0141     u64 crc_err;
0142     u64 pmode_count;
0143     u64 partials_handled;
0144     u8 stats_idx;
0145     bool check_crc:1;
0146     bool stats_idx_valid:1;
0147 };
0148
0149 struct irdma_puda_buf *irdma_puda_get_bufpool(struct irdma_puda_rsrc *rsrc);
0150 void irdma_puda_ret_bufpool(struct irdma_puda_rsrc *rsrc,
0151                 struct irdma_puda_buf *buf);
0152 void irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc,
0153              struct irdma_puda_buf *buf);
0154 int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info);
0155 int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi,
0156                struct irdma_puda_rsrc_info *info);
0157 void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type,
0158               bool reset);
0159 int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq,
0160              u32 *compl_err);
0161
0162 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev,
0163                      struct irdma_puda_buf *buf);
0164 int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
0165                   struct irdma_puda_buf *buf);
0166 int irdma_ieq_check_mpacrc(struct shash_desc *desc, void *addr, u32 len, u32 val);
0167 int irdma_init_hash_desc(struct shash_desc **desc);
0168 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
0169 void irdma_free_hash_desc(struct shash_desc *desc);
0170 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum);
0171 int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
0172 int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq);
0173 int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
0174 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq);
0175 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp,
0176                 struct irdma_ah_info *ah_info);
0177 int irdma_puda_create_ah(struct irdma_sc_dev *dev,
0178              struct irdma_ah_info *ah_info, bool wait,
0179              enum puda_rsrc_type type, void *cb_param,
0180              struct irdma_sc_ah **ah);
0181 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah);
0182 void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp,
0183                  struct irdma_puda_rsrc *ieq);
0184 void irdma_ieq_cleanup_qp(struct irdma_puda_rsrc *ieq, struct irdma_sc_qp *qp);
0185 #endif /*IRDMA_PROTOS_H */