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0001 /*
0002  * Copyright (c) 2016-2017 Hisilicon Limited.
0003  *
0004  * This software is available to you under a choice of one of two
0005  * licenses.  You may choose to be licensed under the terms of the GNU
0006  * General Public License (GPL) Version 2, available from the file
0007  * COPYING in the main directory of this source tree, or the
0008  * OpenIB.org BSD license below:
0009  *
0010  *     Redistribution and use in source and binary forms, with or
0011  *     without modification, are permitted provided that the following
0012  *     conditions are met:
0013  *
0014  *      - Redistributions of source code must retain the above
0015  *        copyright notice, this list of conditions and the following
0016  *        disclaimer.
0017  *
0018  *      - Redistributions in binary form must reproduce the above
0019  *        copyright notice, this list of conditions and the following
0020  *        disclaimer in the documentation and/or other materials
0021  *        provided with the distribution.
0022  *
0023  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0024  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0025  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0026  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0027  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0028  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0029  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0030  * SOFTWARE.
0031  */
0032 
0033 #ifndef _HNS_ROCE_HW_V2_H
0034 #define _HNS_ROCE_HW_V2_H
0035 
0036 #include <linux/bitops.h>
0037 
0038 #define HNS_ROCE_V2_MAX_QP_NUM          0x1000
0039 #define HNS_ROCE_V2_MAX_WQE_NUM         0x8000
0040 #define HNS_ROCE_V2_MAX_SRQ_WR          0x8000
0041 #define HNS_ROCE_V2_MAX_SRQ_SGE         64
0042 #define HNS_ROCE_V2_MAX_CQ_NUM          0x100000
0043 #define HNS_ROCE_V2_MAX_QPC_TIMER_BT_NUM    0x100
0044 #define HNS_ROCE_V2_MAX_CQC_TIMER_BT_NUM    0x100
0045 #define HNS_ROCE_V2_MAX_SRQ_NUM         0x100000
0046 #define HNS_ROCE_V2_MAX_CQE_NUM         0x400000
0047 #define HNS_ROCE_V2_MAX_RQ_SGE_NUM      64
0048 #define HNS_ROCE_V2_MAX_SQ_SGE_NUM      64
0049 #define HNS_ROCE_V2_MAX_EXTEND_SGE_NUM      0x200000
0050 #define HNS_ROCE_V2_MAX_SQ_INLINE       0x20
0051 #define HNS_ROCE_V3_MAX_SQ_INLINE       0x400
0052 #define HNS_ROCE_V2_MAX_RC_INL_INN_SZ       32
0053 #define HNS_ROCE_V2_UAR_NUM         256
0054 #define HNS_ROCE_V2_PHY_UAR_NUM         1
0055 #define HNS_ROCE_V2_AEQE_VEC_NUM        1
0056 #define HNS_ROCE_V2_ABNORMAL_VEC_NUM        1
0057 #define HNS_ROCE_V2_MAX_MTPT_NUM        0x100000
0058 #define HNS_ROCE_V2_MAX_MTT_SEGS        0x1000000
0059 #define HNS_ROCE_V2_MAX_SRQWQE_SEGS     0x1000000
0060 #define HNS_ROCE_V2_MAX_IDX_SEGS        0x1000000
0061 #define HNS_ROCE_V2_MAX_PD_NUM          0x1000000
0062 #define HNS_ROCE_V2_MAX_XRCD_NUM        0x1000000
0063 #define HNS_ROCE_V2_RSV_XRCD_NUM        0
0064 #define HNS_ROCE_V2_MAX_QP_INIT_RDMA        128
0065 #define HNS_ROCE_V2_MAX_QP_DEST_RDMA        128
0066 #define HNS_ROCE_V2_MAX_SQ_DESC_SZ      64
0067 #define HNS_ROCE_V2_MAX_RQ_DESC_SZ      16
0068 #define HNS_ROCE_V2_MAX_SRQ_DESC_SZ     64
0069 #define HNS_ROCE_V2_IRRL_ENTRY_SZ       64
0070 #define HNS_ROCE_V2_EXT_ATOMIC_TRRL_ENTRY_SZ    100
0071 #define HNS_ROCE_V2_CQC_ENTRY_SZ        64
0072 #define HNS_ROCE_V2_SRQC_ENTRY_SZ       64
0073 #define HNS_ROCE_V2_MTPT_ENTRY_SZ       64
0074 #define HNS_ROCE_V2_MTT_ENTRY_SZ        64
0075 #define HNS_ROCE_V2_IDX_ENTRY_SZ        4
0076 
0077 #define HNS_ROCE_V2_SCCC_SZ         32
0078 #define HNS_ROCE_V3_SCCC_SZ         64
0079 #define HNS_ROCE_V3_GMV_ENTRY_SZ        32
0080 
0081 #define HNS_ROCE_V2_EXT_LLM_ENTRY_SZ        8
0082 #define HNS_ROCE_V2_EXT_LLM_MAX_DEPTH       4096
0083 
0084 #define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ      PAGE_SIZE
0085 #define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ      PAGE_SIZE
0086 #define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED     0xFFFF000
0087 #define HNS_ROCE_V2_MAX_INNER_MTPT_NUM      2
0088 #define HNS_ROCE_INVALID_LKEY           0x0
0089 #define HNS_ROCE_INVALID_SGE_LENGTH     0x80000000
0090 #define HNS_ROCE_CMQ_TX_TIMEOUT         30000
0091 #define HNS_ROCE_V2_RSV_QPS         8
0092 
0093 #define HNS_ROCE_V2_HW_RST_TIMEOUT      1000
0094 #define HNS_ROCE_V2_HW_RST_UNINT_DELAY      100
0095 
0096 #define HNS_ROCE_V2_HW_RST_COMPLETION_WAIT  20
0097 
0098 #define HNS_ROCE_CONTEXT_HOP_NUM        1
0099 #define HNS_ROCE_SCCC_HOP_NUM           1
0100 #define HNS_ROCE_MTT_HOP_NUM            1
0101 #define HNS_ROCE_CQE_HOP_NUM            1
0102 #define HNS_ROCE_SRQWQE_HOP_NUM         1
0103 #define HNS_ROCE_PBL_HOP_NUM            2
0104 #define HNS_ROCE_IDX_HOP_NUM            1
0105 #define HNS_ROCE_SQWQE_HOP_NUM          2
0106 #define HNS_ROCE_EXT_SGE_HOP_NUM        1
0107 #define HNS_ROCE_RQWQE_HOP_NUM          2
0108 
0109 #define HNS_ROCE_V2_EQE_HOP_NUM         2
0110 #define HNS_ROCE_V3_EQE_HOP_NUM         1
0111 
0112 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_256K    6
0113 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_16K     2
0114 #define HNS_ROCE_V2_GID_INDEX_NUM       16
0115 
0116 #define HNS_ROCE_V2_TABLE_CHUNK_SIZE        (1 << 18)
0117 
0118 enum {
0119     HNS_ROCE_CMD_FLAG_IN = BIT(0),
0120     HNS_ROCE_CMD_FLAG_OUT = BIT(1),
0121     HNS_ROCE_CMD_FLAG_NEXT = BIT(2),
0122     HNS_ROCE_CMD_FLAG_WR = BIT(3),
0123     HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5),
0124 };
0125 
0126 #define HNS_ROCE_CMQ_DESC_NUM_S     3
0127 
0128 #define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT       5
0129 
0130 #define HNS_ROCE_CONG_SIZE 64
0131 
0132 #define check_whether_last_step(hop_num, step_idx) \
0133     ((step_idx == 0 && hop_num == HNS_ROCE_HOP_NUM_0) || \
0134     (step_idx == 1 && hop_num == 1) || \
0135     (step_idx == 2 && hop_num == 2))
0136 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT  0
0137 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL    BIT(HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT)
0138 
0139 #define CMD_CSQ_DESC_NUM        1024
0140 #define CMD_CRQ_DESC_NUM        1024
0141 
0142 /* Free mr used parameters */
0143 #define HNS_ROCE_FREE_MR_USED_CQE_NUM       128
0144 #define HNS_ROCE_FREE_MR_USED_QP_NUM        0x8
0145 #define HNS_ROCE_FREE_MR_USED_PSN       0x0808
0146 #define HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT  0x7
0147 #define HNS_ROCE_FREE_MR_USED_QP_TIMEOUT    0x12
0148 #define HNS_ROCE_FREE_MR_USED_SQWQE_NUM     128
0149 #define HNS_ROCE_FREE_MR_USED_SQSGE_NUM     0x2
0150 #define HNS_ROCE_FREE_MR_USED_RQWQE_NUM     128
0151 #define HNS_ROCE_FREE_MR_USED_RQSGE_NUM     0x2
0152 #define HNS_ROCE_V2_FREE_MR_TIMEOUT     4500
0153 
0154 enum {
0155     NO_ARMED = 0x0,
0156     REG_NXT_CEQE = 0x2,
0157     REG_NXT_SE_CEQE = 0x3
0158 };
0159 
0160 enum {
0161     CQE_SIZE_32B = 0x0,
0162     CQE_SIZE_64B = 0x1
0163 };
0164 
0165 #define V2_CQ_DB_REQ_NOT_SOL            0
0166 #define V2_CQ_DB_REQ_NOT            1
0167 
0168 #define V2_CQ_STATE_VALID           1
0169 #define V2_QKEY_VAL             0x80010000
0170 
0171 #define GID_LEN_V2              16
0172 
0173 enum {
0174     HNS_ROCE_V2_WQE_OP_SEND             = 0x0,
0175     HNS_ROCE_V2_WQE_OP_SEND_WITH_INV        = 0x1,
0176     HNS_ROCE_V2_WQE_OP_SEND_WITH_IMM        = 0x2,
0177     HNS_ROCE_V2_WQE_OP_RDMA_WRITE           = 0x3,
0178     HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM      = 0x4,
0179     HNS_ROCE_V2_WQE_OP_RDMA_READ            = 0x5,
0180     HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP        = 0x6,
0181     HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD       = 0x7,
0182     HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP    = 0x8,
0183     HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD   = 0x9,
0184     HNS_ROCE_V2_WQE_OP_FAST_REG_PMR         = 0xa,
0185     HNS_ROCE_V2_WQE_OP_LOCAL_INV            = 0xb,
0186     HNS_ROCE_V2_WQE_OP_BIND_MW          = 0xc,
0187     HNS_ROCE_V2_WQE_OP_MASK             = 0x1f,
0188 };
0189 
0190 enum {
0191     /* rq operations */
0192     HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM = 0x0,
0193     HNS_ROCE_V2_OPCODE_SEND = 0x1,
0194     HNS_ROCE_V2_OPCODE_SEND_WITH_IMM = 0x2,
0195     HNS_ROCE_V2_OPCODE_SEND_WITH_INV = 0x3,
0196 };
0197 
0198 enum {
0199     HNS_ROCE_V2_SQ_DB,
0200     HNS_ROCE_V2_RQ_DB,
0201     HNS_ROCE_V2_SRQ_DB,
0202     HNS_ROCE_V2_CQ_DB,
0203     HNS_ROCE_V2_CQ_DB_NOTIFY
0204 };
0205 
0206 enum {
0207     HNS_ROCE_CQE_V2_SUCCESS             = 0x00,
0208     HNS_ROCE_CQE_V2_LOCAL_LENGTH_ERR        = 0x01,
0209     HNS_ROCE_CQE_V2_LOCAL_QP_OP_ERR         = 0x02,
0210     HNS_ROCE_CQE_V2_LOCAL_PROT_ERR          = 0x04,
0211     HNS_ROCE_CQE_V2_WR_FLUSH_ERR            = 0x05,
0212     HNS_ROCE_CQE_V2_MW_BIND_ERR         = 0x06,
0213     HNS_ROCE_CQE_V2_BAD_RESP_ERR            = 0x10,
0214     HNS_ROCE_CQE_V2_LOCAL_ACCESS_ERR        = 0x11,
0215     HNS_ROCE_CQE_V2_REMOTE_INVAL_REQ_ERR        = 0x12,
0216     HNS_ROCE_CQE_V2_REMOTE_ACCESS_ERR       = 0x13,
0217     HNS_ROCE_CQE_V2_REMOTE_OP_ERR           = 0x14,
0218     HNS_ROCE_CQE_V2_TRANSPORT_RETRY_EXC_ERR     = 0x15,
0219     HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR       = 0x16,
0220     HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR        = 0x22,
0221     HNS_ROCE_CQE_V2_GENERAL_ERR         = 0x23,
0222 
0223     HNS_ROCE_V2_CQE_STATUS_MASK         = 0xff,
0224 };
0225 
0226 /* CMQ command */
0227 enum hns_roce_opcode_type {
0228     HNS_QUERY_FW_VER                = 0x0001,
0229     HNS_ROCE_OPC_QUERY_HW_VER           = 0x8000,
0230     HNS_ROCE_OPC_CFG_GLOBAL_PARAM           = 0x8001,
0231     HNS_ROCE_OPC_ALLOC_PF_RES           = 0x8004,
0232     HNS_ROCE_OPC_QUERY_PF_RES           = 0x8400,
0233     HNS_ROCE_OPC_ALLOC_VF_RES           = 0x8401,
0234     HNS_ROCE_OPC_CFG_EXT_LLM            = 0x8403,
0235     HNS_ROCE_OPC_QUERY_PF_TIMER_RES         = 0x8406,
0236     HNS_ROCE_OPC_QUERY_FUNC_INFO            = 0x8407,
0237     HNS_ROCE_OPC_QUERY_PF_CAPS_NUM                  = 0x8408,
0238     HNS_ROCE_OPC_CFG_ENTRY_SIZE         = 0x8409,
0239     HNS_ROCE_OPC_CFG_SGID_TB            = 0x8500,
0240     HNS_ROCE_OPC_CFG_SMAC_TB            = 0x8501,
0241     HNS_ROCE_OPC_POST_MB                = 0x8504,
0242     HNS_ROCE_OPC_QUERY_MB_ST            = 0x8505,
0243     HNS_ROCE_OPC_CFG_BT_ATTR            = 0x8506,
0244     HNS_ROCE_OPC_FUNC_CLEAR             = 0x8508,
0245     HNS_ROCE_OPC_CLR_SCCC               = 0x8509,
0246     HNS_ROCE_OPC_QUERY_SCCC             = 0x850a,
0247     HNS_ROCE_OPC_RESET_SCCC             = 0x850b,
0248     HNS_ROCE_OPC_CLEAR_EXTDB_LIST_INFO      = 0x850d,
0249     HNS_ROCE_OPC_QUERY_VF_RES           = 0x850e,
0250     HNS_ROCE_OPC_CFG_GMV_TBL            = 0x850f,
0251     HNS_ROCE_OPC_CFG_GMV_BT             = 0x8510,
0252     HNS_ROCE_OPC_EXT_CFG                = 0x8512,
0253     HNS_ROCE_QUERY_RAM_ECC              = 0x8513,
0254     HNS_SWITCH_PARAMETER_CFG            = 0x1033,
0255 };
0256 
0257 enum {
0258     TYPE_CRQ,
0259     TYPE_CSQ,
0260 };
0261 
0262 enum hns_roce_cmd_return_status {
0263     CMD_EXEC_SUCCESS,
0264     CMD_NO_AUTH,
0265     CMD_NOT_EXIST,
0266     CMD_CRQ_FULL,
0267     CMD_NEXT_ERR,
0268     CMD_NOT_EXEC,
0269     CMD_PARA_ERR,
0270     CMD_RESULT_ERR,
0271     CMD_TIMEOUT,
0272     CMD_HILINK_ERR,
0273     CMD_INFO_ILLEGAL,
0274     CMD_INVALID,
0275     CMD_ROH_CHECK_FAIL,
0276     CMD_OTHER_ERR = 0xff
0277 };
0278 
0279 enum hns_roce_sgid_type {
0280     GID_TYPE_FLAG_ROCE_V1 = 0,
0281     GID_TYPE_FLAG_ROCE_V2_IPV4,
0282     GID_TYPE_FLAG_ROCE_V2_IPV6,
0283 };
0284 
0285 struct hns_roce_v2_cq_context {
0286     __le32 byte_4_pg_ceqn;
0287     __le32 byte_8_cqn;
0288     __le32 cqe_cur_blk_addr;
0289     __le32 byte_16_hop_addr;
0290     __le32 cqe_nxt_blk_addr;
0291     __le32 byte_24_pgsz_addr;
0292     __le32 byte_28_cq_pi;
0293     __le32 byte_32_cq_ci;
0294     __le32 cqe_ba;
0295     __le32 byte_40_cqe_ba;
0296     __le32 byte_44_db_record;
0297     __le32 db_record_addr;
0298     __le32 byte_52_cqe_cnt;
0299     __le32 byte_56_cqe_period_maxcnt;
0300     __le32 cqe_report_timer;
0301     __le32 byte_64_se_cqe_idx;
0302 };
0303 
0304 #define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0
0305 #define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0
0306 
0307 #define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l)
0308 
0309 #define CQC_CQ_ST CQC_FIELD_LOC(1, 0)
0310 #define CQC_POLL CQC_FIELD_LOC(2, 2)
0311 #define CQC_SE CQC_FIELD_LOC(3, 3)
0312 #define CQC_OVER_IGNORE CQC_FIELD_LOC(4, 4)
0313 #define CQC_ARM_ST CQC_FIELD_LOC(7, 6)
0314 #define CQC_SHIFT CQC_FIELD_LOC(12, 8)
0315 #define CQC_CMD_SN CQC_FIELD_LOC(14, 13)
0316 #define CQC_CEQN CQC_FIELD_LOC(23, 15)
0317 #define CQC_CQN CQC_FIELD_LOC(55, 32)
0318 #define CQC_POE_EN CQC_FIELD_LOC(56, 56)
0319 #define CQC_POE_NUM CQC_FIELD_LOC(58, 57)
0320 #define CQC_CQE_SIZE CQC_FIELD_LOC(60, 59)
0321 #define CQC_CQ_CNT_MODE CQC_FIELD_LOC(61, 61)
0322 #define CQC_STASH CQC_FIELD_LOC(63, 63)
0323 #define CQC_CQE_CUR_BLK_ADDR_L CQC_FIELD_LOC(95, 64)
0324 #define CQC_CQE_CUR_BLK_ADDR_H CQC_FIELD_LOC(115, 96)
0325 #define CQC_POE_QID CQC_FIELD_LOC(125, 116)
0326 #define CQC_CQE_HOP_NUM CQC_FIELD_LOC(127, 126)
0327 #define CQC_CQE_NEX_BLK_ADDR_L CQC_FIELD_LOC(159, 128)
0328 #define CQC_CQE_NEX_BLK_ADDR_H CQC_FIELD_LOC(179, 160)
0329 #define CQC_CQE_BAR_PG_SZ CQC_FIELD_LOC(187, 184)
0330 #define CQC_CQE_BUF_PG_SZ CQC_FIELD_LOC(191, 188)
0331 #define CQC_CQ_PRODUCER_IDX CQC_FIELD_LOC(215, 192)
0332 #define CQC_CQ_CONSUMER_IDX CQC_FIELD_LOC(247, 224)
0333 #define CQC_CQE_BA_L CQC_FIELD_LOC(287, 256)
0334 #define CQC_CQE_BA_H CQC_FIELD_LOC(316, 288)
0335 #define CQC_POE_QID_H_0 CQC_FIELD_LOC(319, 317)
0336 #define CQC_DB_RECORD_EN CQC_FIELD_LOC(320, 320)
0337 #define CQC_CQE_DB_RECORD_ADDR_L CQC_FIELD_LOC(351, 321)
0338 #define CQC_CQE_DB_RECORD_ADDR_H CQC_FIELD_LOC(383, 352)
0339 #define CQC_CQE_CNT CQC_FIELD_LOC(407, 384)
0340 #define CQC_CQ_MAX_CNT CQC_FIELD_LOC(431, 416)
0341 #define CQC_CQ_PERIOD CQC_FIELD_LOC(447, 432)
0342 #define CQC_CQE_REPORT_TIMER CQC_FIELD_LOC(471, 448)
0343 #define CQC_WR_CQE_IDX CQC_FIELD_LOC(479, 472)
0344 #define CQC_SE_CQE_IDX CQC_FIELD_LOC(503, 480)
0345 #define CQC_POE_QID_H_1 CQC_FIELD_LOC(511, 511)
0346 
0347 struct hns_roce_srq_context {
0348     __le32 data[16];
0349 };
0350 
0351 #define SRQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_srq_context, h, l)
0352 
0353 #define SRQC_SRQ_ST SRQC_FIELD_LOC(1, 0)
0354 #define SRQC_WQE_HOP_NUM SRQC_FIELD_LOC(3, 2)
0355 #define SRQC_SHIFT SRQC_FIELD_LOC(7, 4)
0356 #define SRQC_SRQN SRQC_FIELD_LOC(31, 8)
0357 #define SRQC_LIMIT_WL SRQC_FIELD_LOC(47, 32)
0358 #define SRQC_RSV0 SRQC_FIELD_LOC(63, 48)
0359 #define SRQC_XRCD SRQC_FIELD_LOC(87, 64)
0360 #define SRQC_RSV1 SRQC_FIELD_LOC(95, 88)
0361 #define SRQC_PRODUCER_IDX SRQC_FIELD_LOC(111, 96)
0362 #define SRQC_CONSUMER_IDX SRQC_FIELD_LOC(127, 112)
0363 #define SRQC_WQE_BT_BA_L SRQC_FIELD_LOC(159, 128)
0364 #define SRQC_WQE_BT_BA_H SRQC_FIELD_LOC(188, 160)
0365 #define SRQC_RSV2 SRQC_FIELD_LOC(190, 189)
0366 #define SRQC_SRQ_TYPE SRQC_FIELD_LOC(191, 191)
0367 #define SRQC_PD SRQC_FIELD_LOC(215, 192)
0368 #define SRQC_RQWS SRQC_FIELD_LOC(219, 216)
0369 #define SRQC_RSV3 SRQC_FIELD_LOC(223, 220)
0370 #define SRQC_IDX_BT_BA_L SRQC_FIELD_LOC(255, 224)
0371 #define SRQC_IDX_BT_BA_H SRQC_FIELD_LOC(284, 256)
0372 #define SRQC_RSV4 SRQC_FIELD_LOC(287, 285)
0373 #define SRQC_IDX_CUR_BLK_ADDR_L SRQC_FIELD_LOC(319, 288)
0374 #define SRQC_IDX_CUR_BLK_ADDR_H SRQC_FIELD_LOC(339, 320)
0375 #define SRQC_RSV5 SRQC_FIELD_LOC(341, 340)
0376 #define SRQC_IDX_HOP_NUM SRQC_FIELD_LOC(343, 342)
0377 #define SRQC_IDX_BA_PG_SZ SRQC_FIELD_LOC(347, 344)
0378 #define SRQC_IDX_BUF_PG_SZ SRQC_FIELD_LOC(351, 348)
0379 #define SRQC_IDX_NXT_BLK_ADDR_L SRQC_FIELD_LOC(383, 352)
0380 #define SRQC_IDX_NXT_BLK_ADDR_H SRQC_FIELD_LOC(403, 384)
0381 #define SRQC_RSV6 SRQC_FIELD_LOC(415, 404)
0382 #define SRQC_XRC_CQN SRQC_FIELD_LOC(439, 416)
0383 #define SRQC_WQE_BA_PG_SZ SRQC_FIELD_LOC(443, 440)
0384 #define SRQC_WQE_BUF_PG_SZ SRQC_FIELD_LOC(447, 444)
0385 #define SRQC_DB_RECORD_EN SRQC_FIELD_LOC(448, 448)
0386 #define SRQC_DB_RECORD_ADDR_L SRQC_FIELD_LOC(479, 449)
0387 #define SRQC_DB_RECORD_ADDR_H SRQC_FIELD_LOC(511, 480)
0388 
0389 enum {
0390     V2_MPT_ST_VALID = 0x1,
0391     V2_MPT_ST_FREE  = 0x2,
0392 };
0393 
0394 enum hns_roce_v2_qp_state {
0395     HNS_ROCE_QP_ST_RST,
0396     HNS_ROCE_QP_ST_INIT,
0397     HNS_ROCE_QP_ST_RTR,
0398     HNS_ROCE_QP_ST_RTS,
0399     HNS_ROCE_QP_ST_SQD,
0400     HNS_ROCE_QP_ST_SQER,
0401     HNS_ROCE_QP_ST_ERR,
0402     HNS_ROCE_QP_ST_SQ_DRAINING,
0403     HNS_ROCE_QP_NUM_ST
0404 };
0405 
0406 struct hns_roce_v2_qp_context_ex {
0407     __le32 data[64];
0408 };
0409 struct hns_roce_v2_qp_context {
0410     __le32 byte_4_sqpn_tst;
0411     __le32 wqe_sge_ba;
0412     __le32 byte_12_sq_hop;
0413     __le32 byte_16_buf_ba_pg_sz;
0414     __le32 byte_20_smac_sgid_idx;
0415     __le32 byte_24_mtu_tc;
0416     __le32 byte_28_at_fl;
0417     u8 dgid[GID_LEN_V2];
0418     __le32 dmac;
0419     __le32 byte_52_udpspn_dmac;
0420     __le32 byte_56_dqpn_err;
0421     __le32 byte_60_qpst_tempid;
0422     __le32 qkey_xrcd;
0423     __le32 byte_68_rq_db;
0424     __le32 rq_db_record_addr;
0425     __le32 byte_76_srqn_op_en;
0426     __le32 byte_80_rnr_rx_cqn;
0427     __le32 byte_84_rq_ci_pi;
0428     __le32 rq_cur_blk_addr;
0429     __le32 byte_92_srq_info;
0430     __le32 byte_96_rx_reqmsn;
0431     __le32 rq_nxt_blk_addr;
0432     __le32 byte_104_rq_sge;
0433     __le32 byte_108_rx_reqepsn;
0434     __le32 rq_rnr_timer;
0435     __le32 rx_msg_len;
0436     __le32 rx_rkey_pkt_info;
0437     __le64 rx_va;
0438     __le32 byte_132_trrl;
0439     __le32 trrl_ba;
0440     __le32 byte_140_raq;
0441     __le32 byte_144_raq;
0442     __le32 byte_148_raq;
0443     __le32 byte_152_raq;
0444     __le32 byte_156_raq;
0445     __le32 byte_160_sq_ci_pi;
0446     __le32 sq_cur_blk_addr;
0447     __le32 byte_168_irrl_idx;
0448     __le32 byte_172_sq_psn;
0449     __le32 byte_176_msg_pktn;
0450     __le32 sq_cur_sge_blk_addr;
0451     __le32 byte_184_irrl_idx;
0452     __le32 cur_sge_offset;
0453     __le32 byte_192_ext_sge;
0454     __le32 byte_196_sq_psn;
0455     __le32 byte_200_sq_max;
0456     __le32 irrl_ba;
0457     __le32 byte_208_irrl;
0458     __le32 byte_212_lsn;
0459     __le32 sq_timer;
0460     __le32 byte_220_retry_psn_msn;
0461     __le32 byte_224_retry_msg;
0462     __le32 rx_sq_cur_blk_addr;
0463     __le32 byte_232_irrl_sge;
0464     __le32 irrl_cur_sge_offset;
0465     __le32 byte_240_irrl_tail;
0466     __le32 byte_244_rnr_rxack;
0467     __le32 byte_248_ack_psn;
0468     __le32 byte_252_err_txcqn;
0469     __le32 byte_256_sqflush_rqcqe;
0470 
0471     struct hns_roce_v2_qp_context_ex ext;
0472 };
0473 
0474 #define QPC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context, h, l)
0475 
0476 #define QPC_TST QPC_FIELD_LOC(2, 0)
0477 #define QPC_SGE_SHIFT QPC_FIELD_LOC(7, 3)
0478 #define QPC_CNP_TIMER QPC_FIELD_LOC(31, 8)
0479 #define QPC_WQE_SGE_BA_L QPC_FIELD_LOC(63, 32)
0480 #define QPC_WQE_SGE_BA_H QPC_FIELD_LOC(92, 64)
0481 #define QPC_SQ_HOP_NUM QPC_FIELD_LOC(94, 93)
0482 #define QPC_CIRE_EN QPC_FIELD_LOC(95, 95)
0483 #define QPC_WQE_SGE_BA_PG_SZ QPC_FIELD_LOC(99, 96)
0484 #define QPC_WQE_SGE_BUF_PG_SZ QPC_FIELD_LOC(103, 100)
0485 #define QPC_PD QPC_FIELD_LOC(127, 104)
0486 #define QPC_RQ_HOP_NUM QPC_FIELD_LOC(129, 128)
0487 #define QPC_SGE_HOP_NUM QPC_FIELD_LOC(131, 130)
0488 #define QPC_RQWS QPC_FIELD_LOC(135, 132)
0489 #define QPC_SQ_SHIFT QPC_FIELD_LOC(139, 136)
0490 #define QPC_RQ_SHIFT QPC_FIELD_LOC(143, 140)
0491 #define QPC_GMV_IDX QPC_FIELD_LOC(159, 144)
0492 #define QPC_HOPLIMIT QPC_FIELD_LOC(167, 160)
0493 #define QPC_TC QPC_FIELD_LOC(175, 168)
0494 #define QPC_VLAN_ID QPC_FIELD_LOC(187, 176)
0495 #define QPC_MTU QPC_FIELD_LOC(191, 188)
0496 #define QPC_FL QPC_FIELD_LOC(211, 192)
0497 #define QPC_SL QPC_FIELD_LOC(215, 212)
0498 #define QPC_CNP_TX_FLAG QPC_FIELD_LOC(216, 216)
0499 #define QPC_CE_FLAG QPC_FIELD_LOC(217, 217)
0500 #define QPC_LBI QPC_FIELD_LOC(218, 218)
0501 #define QPC_AT QPC_FIELD_LOC(223, 219)
0502 #define QPC_DGID QPC_FIELD_LOC(351, 224)
0503 #define QPC_DMAC_L QPC_FIELD_LOC(383, 352)
0504 #define QPC_DMAC_H QPC_FIELD_LOC(399, 384)
0505 #define QPC_UDPSPN QPC_FIELD_LOC(415, 400)
0506 #define QPC_DQPN QPC_FIELD_LOC(439, 416)
0507 #define QPC_SQ_TX_ERR QPC_FIELD_LOC(440, 440)
0508 #define QPC_SQ_RX_ERR QPC_FIELD_LOC(441, 441)
0509 #define QPC_RQ_TX_ERR QPC_FIELD_LOC(442, 442)
0510 #define QPC_RQ_RX_ERR QPC_FIELD_LOC(443, 443)
0511 #define QPC_LP_PKTN_INI QPC_FIELD_LOC(447, 444)
0512 #define QPC_CONG_ALGO_TMPL_ID QPC_FIELD_LOC(455, 448)
0513 #define QPC_SCC_TOKEN QPC_FIELD_LOC(474, 456)
0514 #define QPC_SQ_DB_DOING QPC_FIELD_LOC(475, 475)
0515 #define QPC_RQ_DB_DOING QPC_FIELD_LOC(476, 476)
0516 #define QPC_QP_ST QPC_FIELD_LOC(479, 477)
0517 #define QPC_QKEY_XRCD QPC_FIELD_LOC(511, 480)
0518 #define QPC_RQ_RECORD_EN QPC_FIELD_LOC(512, 512)
0519 #define QPC_RQ_DB_RECORD_ADDR_L QPC_FIELD_LOC(543, 513)
0520 #define QPC_RQ_DB_RECORD_ADDR_H QPC_FIELD_LOC(575, 544)
0521 #define QPC_SRQN QPC_FIELD_LOC(599, 576)
0522 #define QPC_SRQ_EN QPC_FIELD_LOC(600, 600)
0523 #define QPC_RRE QPC_FIELD_LOC(601, 601)
0524 #define QPC_RWE QPC_FIELD_LOC(602, 602)
0525 #define QPC_ATE QPC_FIELD_LOC(603, 603)
0526 #define QPC_RQIE QPC_FIELD_LOC(604, 604)
0527 #define QPC_EXT_ATE QPC_FIELD_LOC(605, 605)
0528 #define QPC_RQ_VLAN_EN QPC_FIELD_LOC(606, 606)
0529 #define QPC_RQ_RTY_TX_ERR QPC_FIELD_LOC(607, 607)
0530 #define QPC_RX_CQN QPC_FIELD_LOC(631, 608)
0531 #define QPC_XRC_QP_TYPE QPC_FIELD_LOC(632, 632)
0532 #define QPC_RSV3 QPC_FIELD_LOC(634, 633)
0533 #define QPC_MIN_RNR_TIME QPC_FIELD_LOC(639, 635)
0534 #define QPC_RQ_PRODUCER_IDX QPC_FIELD_LOC(655, 640)
0535 #define QPC_RQ_CONSUMER_IDX QPC_FIELD_LOC(671, 656)
0536 #define QPC_RQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(703, 672)
0537 #define QPC_RQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(723, 704)
0538 #define QPC_SRQ_INFO QPC_FIELD_LOC(735, 724)
0539 #define QPC_RX_REQ_MSN QPC_FIELD_LOC(759, 736)
0540 #define QPC_REDUCE_CODE QPC_FIELD_LOC(766, 760)
0541 #define QPC_RX_XRC_PKT_CQE_FLG QPC_FIELD_LOC(767, 767)
0542 #define QPC_RQ_NXT_BLK_ADDR_L QPC_FIELD_LOC(799, 768)
0543 #define QPC_RQ_NXT_BLK_ADDR_H QPC_FIELD_LOC(819, 800)
0544 #define QPC_REDUCE_EN QPC_FIELD_LOC(820, 820)
0545 #define QPC_FLUSH_EN QPC_FIELD_LOC(821, 821)
0546 #define QPC_AW_EN QPC_FIELD_LOC(822, 822)
0547 #define QPC_WN_EN QPC_FIELD_LOC(823, 823)
0548 #define QPC_RQ_CUR_WQE_SGE_NUM QPC_FIELD_LOC(831, 824)
0549 #define QPC_INV_CREDIT QPC_FIELD_LOC(832, 832)
0550 #define QPC_LAST_WRITE_TYPE QPC_FIELD_LOC(834, 833)
0551 #define QPC_RX_REQ_PSN_ERR QPC_FIELD_LOC(835, 835)
0552 #define QPC_RX_REQ_LAST_OPTYPE QPC_FIELD_LOC(838, 836)
0553 #define QPC_RX_REQ_RNR QPC_FIELD_LOC(839, 839)
0554 #define QPC_RX_REQ_EPSN QPC_FIELD_LOC(863, 840)
0555 #define QPC_RQ_RNR_TIMER QPC_FIELD_LOC(895, 864)
0556 #define QPC_RX_MSG_LEN QPC_FIELD_LOC(927, 896)
0557 #define QPC_RX_RKEY_PKT_INFO QPC_FIELD_LOC(959, 928)
0558 #define QPC_RX_VA QPC_FIELD_LOC(1023, 960)
0559 #define QPC_TRRL_HEAD_MAX QPC_FIELD_LOC(1031, 1024)
0560 #define QPC_TRRL_TAIL_MAX QPC_FIELD_LOC(1039, 1032)
0561 #define QPC_TRRL_BA_L QPC_FIELD_LOC(1055, 1040)
0562 #define QPC_TRRL_BA_M QPC_FIELD_LOC(1087, 1056)
0563 #define QPC_TRRL_BA_H QPC_FIELD_LOC(1099, 1088)
0564 #define QPC_RR_MAX QPC_FIELD_LOC(1102, 1100)
0565 #define QPC_RQ_RTY_WAIT_DO QPC_FIELD_LOC(1103, 1103)
0566 #define QPC_RAQ_TRRL_HEAD QPC_FIELD_LOC(1111, 1104)
0567 #define QPC_RAQ_TRRL_TAIL QPC_FIELD_LOC(1119, 1112)
0568 #define QPC_RAQ_RTY_INI_PSN QPC_FIELD_LOC(1143, 1120)
0569 #define QPC_CIRE_SLV_RQ_EN QPC_FIELD_LOC(1144, 1144)
0570 #define QPC_RAQ_CREDIT QPC_FIELD_LOC(1149, 1145)
0571 #define QPC_RQ_DB_IN_EXT QPC_FIELD_LOC(1150, 1150)
0572 #define QPC_RESP_RTY_FLG QPC_FIELD_LOC(1151, 1151)
0573 #define QPC_RAQ_MSN QPC_FIELD_LOC(1175, 1152)
0574 #define QPC_RAQ_SYNDROME QPC_FIELD_LOC(1183, 1176)
0575 #define QPC_RAQ_PSN QPC_FIELD_LOC(1207, 1184)
0576 #define QPC_RAQ_TRRL_RTY_HEAD QPC_FIELD_LOC(1215, 1208)
0577 #define QPC_RAQ_USE_PKTN QPC_FIELD_LOC(1239, 1216)
0578 #define QPC_RQ_SCC_TOKEN QPC_FIELD_LOC(1245, 1240)
0579 #define QPC_RVD10 QPC_FIELD_LOC(1247, 1246)
0580 #define QPC_SQ_PRODUCER_IDX QPC_FIELD_LOC(1263, 1248)
0581 #define QPC_SQ_CONSUMER_IDX QPC_FIELD_LOC(1279, 1264)
0582 #define QPC_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1311, 1280)
0583 #define QPC_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1331, 1312)
0584 #define QPC_MSG_RTY_LP_FLG QPC_FIELD_LOC(1332, 1332)
0585 #define QPC_SQ_INVLD_FLG QPC_FIELD_LOC(1333, 1333)
0586 #define QPC_LP_SGEN_INI QPC_FIELD_LOC(1335, 1334)
0587 #define QPC_SQ_VLAN_EN QPC_FIELD_LOC(1336, 1336)
0588 #define QPC_POLL_DB_WAIT_DO QPC_FIELD_LOC(1337, 1337)
0589 #define QPC_SCC_TOKEN_FORBID_SQ_DEQ QPC_FIELD_LOC(1338, 1338)
0590 #define QPC_WAIT_ACK_TIMEOUT QPC_FIELD_LOC(1339, 1339)
0591 #define QPC_IRRL_IDX_LSB QPC_FIELD_LOC(1343, 1340)
0592 #define QPC_ACK_REQ_FREQ QPC_FIELD_LOC(1349, 1344)
0593 #define QPC_MSG_RNR_FLG QPC_FIELD_LOC(1350, 1350)
0594 #define QPC_FRE QPC_FIELD_LOC(1351, 1351)
0595 #define QPC_SQ_CUR_PSN QPC_FIELD_LOC(1375, 1352)
0596 #define QPC_MSG_USE_PKTN QPC_FIELD_LOC(1399, 1376)
0597 #define QPC_IRRL_HEAD_PRE QPC_FIELD_LOC(1407, 1400)
0598 #define QPC_SQ_CUR_SGE_BLK_ADDR_L QPC_FIELD_LOC(1439, 1408)
0599 #define QPC_SQ_CUR_SGE_BLK_ADDR_H QPC_FIELD_LOC(1459, 1440)
0600 #define QPC_IRRL_IDX_MSB QPC_FIELD_LOC(1471, 1460)
0601 #define QPC_CUR_SGE_OFFSET QPC_FIELD_LOC(1503, 1472)
0602 #define QPC_CUR_SGE_IDX QPC_FIELD_LOC(1527, 1504)
0603 #define QPC_EXT_SGE_NUM_LEFT QPC_FIELD_LOC(1535, 1528)
0604 #define QPC_OWNER_MODE QPC_FIELD_LOC(1536, 1536)
0605 #define QPC_CIRE_SLV_SQ_EN QPC_FIELD_LOC(1537, 1537)
0606 #define QPC_CIRE_DOING QPC_FIELD_LOC(1538, 1538)
0607 #define QPC_CIRE_RESULT QPC_FIELD_LOC(1539, 1539)
0608 #define QPC_OWNER_DB_WAIT_DO QPC_FIELD_LOC(1540, 1540)
0609 #define QPC_SQ_WQE_INVLD QPC_FIELD_LOC(1541, 1541)
0610 #define QPC_DCA_MODE QPC_FIELD_LOC(1542, 1542)
0611 #define QPC_RTY_OWNER_NOCHK QPC_FIELD_LOC(1543, 1543)
0612 #define QPC_V2_IRRL_HEAD QPC_FIELD_LOC(1543, 1536)
0613 #define QPC_SQ_MAX_PSN QPC_FIELD_LOC(1567, 1544)
0614 #define QPC_SQ_MAX_IDX QPC_FIELD_LOC(1583, 1568)
0615 #define QPC_LCL_OPERATED_CNT QPC_FIELD_LOC(1599, 1584)
0616 #define QPC_IRRL_BA_L QPC_FIELD_LOC(1631, 1600)
0617 #define QPC_IRRL_BA_H QPC_FIELD_LOC(1657, 1632)
0618 #define QPC_PKT_RNR_FLG QPC_FIELD_LOC(1658, 1658)
0619 #define QPC_PKT_RTY_FLG QPC_FIELD_LOC(1659, 1659)
0620 #define QPC_RMT_E2E QPC_FIELD_LOC(1660, 1660)
0621 #define QPC_SR_MAX QPC_FIELD_LOC(1663, 1661)
0622 #define QPC_LSN QPC_FIELD_LOC(1687, 1664)
0623 #define QPC_RETRY_NUM_INIT QPC_FIELD_LOC(1690, 1688)
0624 #define QPC_CHECK_FLG QPC_FIELD_LOC(1692, 1691)
0625 #define QPC_RETRY_CNT QPC_FIELD_LOC(1695, 1693)
0626 #define QPC_SQ_TIMER QPC_FIELD_LOC(1727, 1696)
0627 #define QPC_RETRY_MSG_MSN QPC_FIELD_LOC(1743, 1728)
0628 #define QPC_RETRY_MSG_PSN_L QPC_FIELD_LOC(1759, 1744)
0629 #define QPC_RETRY_MSG_PSN_H QPC_FIELD_LOC(1767, 1760)
0630 #define QPC_RETRY_MSG_FPKT_PSN QPC_FIELD_LOC(1791, 1768)
0631 #define QPC_RX_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1823, 1792)
0632 #define QPC_RX_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1843, 1824)
0633 #define QPC_IRRL_SGE_IDX QPC_FIELD_LOC(1851, 1844)
0634 #define QPC_LSAN_EN QPC_FIELD_LOC(1852, 1852)
0635 #define QPC_SO_LP_VLD QPC_FIELD_LOC(1853, 1853)
0636 #define QPC_FENCE_LP_VLD QPC_FIELD_LOC(1854, 1854)
0637 #define QPC_IRRL_LP_VLD QPC_FIELD_LOC(1855, 1855)
0638 #define QPC_IRRL_CUR_SGE_OFFSET QPC_FIELD_LOC(1887, 1856)
0639 #define QPC_IRRL_TAIL_REAL QPC_FIELD_LOC(1895, 1888)
0640 #define QPC_IRRL_TAIL_RD QPC_FIELD_LOC(1903, 1896)
0641 #define QPC_RX_ACK_MSN QPC_FIELD_LOC(1919, 1904)
0642 #define QPC_RX_ACK_EPSN QPC_FIELD_LOC(1943, 1920)
0643 #define QPC_RNR_NUM_INIT QPC_FIELD_LOC(1946, 1944)
0644 #define QPC_RNR_CNT QPC_FIELD_LOC(1949, 1947)
0645 #define QPC_LCL_OP_FLG QPC_FIELD_LOC(1950, 1950)
0646 #define QPC_IRRL_RD_FLG QPC_FIELD_LOC(1951, 1951)
0647 #define QPC_IRRL_PSN QPC_FIELD_LOC(1975, 1952)
0648 #define QPC_ACK_PSN_ERR QPC_FIELD_LOC(1976, 1976)
0649 #define QPC_ACK_LAST_OPTYPE QPC_FIELD_LOC(1978, 1977)
0650 #define QPC_IRRL_PSN_VLD QPC_FIELD_LOC(1979, 1979)
0651 #define QPC_RNR_RETRY_FLAG QPC_FIELD_LOC(1980, 1980)
0652 #define QPC_SQ_RTY_TX_ERR QPC_FIELD_LOC(1981, 1981)
0653 #define QPC_LAST_IND QPC_FIELD_LOC(1982, 1982)
0654 #define QPC_CQ_ERR_IND QPC_FIELD_LOC(1983, 1983)
0655 #define QPC_TX_CQN QPC_FIELD_LOC(2007, 1984)
0656 #define QPC_SIG_TYPE QPC_FIELD_LOC(2008, 2008)
0657 #define QPC_ERR_TYPE QPC_FIELD_LOC(2015, 2009)
0658 #define QPC_RQ_CQE_IDX QPC_FIELD_LOC(2031, 2016)
0659 #define QPC_SQ_FLUSH_IDX QPC_FIELD_LOC(2047, 2032)
0660 
0661 #define RETRY_MSG_PSN_SHIFT 16
0662 
0663 #define QPCEX_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context_ex, h, l)
0664 
0665 #define QPCEX_CONG_ALG_SEL QPCEX_FIELD_LOC(0, 0)
0666 #define QPCEX_CONG_ALG_SUB_SEL QPCEX_FIELD_LOC(1, 1)
0667 #define QPCEX_DIP_CTX_IDX_VLD QPCEX_FIELD_LOC(2, 2)
0668 #define QPCEX_DIP_CTX_IDX QPCEX_FIELD_LOC(22, 3)
0669 #define QPCEX_SQ_RQ_NOT_FORBID_EN QPCEX_FIELD_LOC(23, 23)
0670 #define QPCEX_STASH QPCEX_FIELD_LOC(82, 82)
0671 
0672 #define V2_QP_RWE_S 1 /* rdma write enable */
0673 #define V2_QP_RRE_S 2 /* rdma read enable */
0674 #define V2_QP_ATE_S 3 /* rdma atomic enable */
0675 
0676 struct hns_roce_v2_cqe {
0677     __le32  byte_4;
0678     union {
0679         __le32 rkey;
0680         __le32 immtdata;
0681     };
0682     __le32  byte_12;
0683     __le32  byte_16;
0684     __le32  byte_cnt;
0685     u8  smac[4];
0686     __le32  byte_28;
0687     __le32  byte_32;
0688     __le32  rsv[8];
0689 };
0690 
0691 #define CQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cqe, h, l)
0692 
0693 #define CQE_OPCODE CQE_FIELD_LOC(4, 0)
0694 #define CQE_RQ_INLINE CQE_FIELD_LOC(5, 5)
0695 #define CQE_S_R CQE_FIELD_LOC(6, 6)
0696 #define CQE_OWNER CQE_FIELD_LOC(7, 7)
0697 #define CQE_STATUS CQE_FIELD_LOC(15, 8)
0698 #define CQE_WQE_IDX CQE_FIELD_LOC(31, 16)
0699 #define CQE_RKEY_IMMTDATA CQE_FIELD_LOC(63, 32)
0700 #define CQE_XRC_SRQN CQE_FIELD_LOC(87, 64)
0701 #define CQE_RSV0 CQE_FIELD_LOC(95, 88)
0702 #define CQE_LCL_QPN CQE_FIELD_LOC(119, 96)
0703 #define CQE_SUB_STATUS CQE_FIELD_LOC(127, 120)
0704 #define CQE_BYTE_CNT CQE_FIELD_LOC(159, 128)
0705 #define CQE_SMAC CQE_FIELD_LOC(207, 160)
0706 #define CQE_PORT_TYPE CQE_FIELD_LOC(209, 208)
0707 #define CQE_VID CQE_FIELD_LOC(221, 210)
0708 #define CQE_VID_VLD CQE_FIELD_LOC(222, 222)
0709 #define CQE_RSV2 CQE_FIELD_LOC(223, 223)
0710 #define CQE_RMT_QPN CQE_FIELD_LOC(247, 224)
0711 #define CQE_SL CQE_FIELD_LOC(250, 248)
0712 #define CQE_PORTN CQE_FIELD_LOC(253, 251)
0713 #define CQE_GRH CQE_FIELD_LOC(254, 254)
0714 #define CQE_LPK CQE_FIELD_LOC(255, 255)
0715 #define CQE_RSV3 CQE_FIELD_LOC(511, 256)
0716 
0717 struct hns_roce_v2_mpt_entry {
0718     __le32  byte_4_pd_hop_st;
0719     __le32  byte_8_mw_cnt_en;
0720     __le32  byte_12_mw_pa;
0721     __le32  bound_lkey;
0722     __le32  len_l;
0723     __le32  len_h;
0724     __le32  lkey;
0725     __le32  va_l;
0726     __le32  va_h;
0727     __le32  pbl_size;
0728     __le32  pbl_ba_l;
0729     __le32  byte_48_mode_ba;
0730     __le32  pa0_l;
0731     __le32  byte_56_pa0_h;
0732     __le32  pa1_l;
0733     __le32  byte_64_buf_pa1;
0734 };
0735 
0736 #define MPT_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_mpt_entry, h, l)
0737 
0738 #define MPT_ST MPT_FIELD_LOC(1, 0)
0739 #define MPT_PBL_HOP_NUM MPT_FIELD_LOC(3, 2)
0740 #define MPT_PBL_BA_PG_SZ MPT_FIELD_LOC(7, 4)
0741 #define MPT_PD MPT_FIELD_LOC(31, 8)
0742 #define MPT_RA_EN MPT_FIELD_LOC(32, 32)
0743 #define MPT_R_INV_EN MPT_FIELD_LOC(33, 33)
0744 #define MPT_L_INV_EN MPT_FIELD_LOC(34, 34)
0745 #define MPT_BIND_EN MPT_FIELD_LOC(35, 35)
0746 #define MPT_ATOMIC_EN MPT_FIELD_LOC(36, 36)
0747 #define MPT_RR_EN MPT_FIELD_LOC(37, 37)
0748 #define MPT_RW_EN MPT_FIELD_LOC(38, 38)
0749 #define MPT_LW_EN MPT_FIELD_LOC(39, 39)
0750 #define MPT_MW_CNT MPT_FIELD_LOC(63, 40)
0751 #define MPT_FRE MPT_FIELD_LOC(64, 64)
0752 #define MPT_PA MPT_FIELD_LOC(65, 65)
0753 #define MPT_ZBVA MPT_FIELD_LOC(66, 66)
0754 #define MPT_SHARE MPT_FIELD_LOC(67, 67)
0755 #define MPT_MR_MW MPT_FIELD_LOC(68, 68)
0756 #define MPT_BPD MPT_FIELD_LOC(69, 69)
0757 #define MPT_BQP MPT_FIELD_LOC(70, 70)
0758 #define MPT_INNER_PA_VLD MPT_FIELD_LOC(71, 71)
0759 #define MPT_MW_BIND_QPN MPT_FIELD_LOC(95, 72)
0760 #define MPT_BOUND_LKEY MPT_FIELD_LOC(127, 96)
0761 #define MPT_LEN MPT_FIELD_LOC(191, 128)
0762 #define MPT_LKEY MPT_FIELD_LOC(223, 192)
0763 #define MPT_VA MPT_FIELD_LOC(287, 224)
0764 #define MPT_PBL_SIZE MPT_FIELD_LOC(319, 288)
0765 #define MPT_PBL_BA_L MPT_FIELD_LOC(351, 320)
0766 #define MPT_PBL_BA_H MPT_FIELD_LOC(380, 352)
0767 #define MPT_BLK_MODE MPT_FIELD_LOC(381, 381)
0768 #define MPT_RSV0 MPT_FIELD_LOC(383, 382)
0769 #define MPT_PA0_L MPT_FIELD_LOC(415, 384)
0770 #define MPT_PA0_H MPT_FIELD_LOC(441, 416)
0771 #define MPT_BOUND_VA MPT_FIELD_LOC(447, 442)
0772 #define MPT_PA1_L MPT_FIELD_LOC(479, 448)
0773 #define MPT_PA1_H MPT_FIELD_LOC(505, 480)
0774 #define MPT_PERSIST_EN MPT_FIELD_LOC(506, 506)
0775 #define MPT_RSV2 MPT_FIELD_LOC(507, 507)
0776 #define MPT_PBL_BUF_PG_SZ MPT_FIELD_LOC(511, 508)
0777 
0778 #define V2_MPT_BYTE_4_MPT_ST_S 0
0779 #define V2_MPT_BYTE_4_MPT_ST_M GENMASK(1, 0)
0780 
0781 #define V2_MPT_BYTE_4_PBL_HOP_NUM_S 2
0782 #define V2_MPT_BYTE_4_PBL_HOP_NUM_M GENMASK(3, 2)
0783 
0784 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_S 4
0785 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_M GENMASK(7, 4)
0786 
0787 #define V2_MPT_BYTE_4_PD_S 8
0788 #define V2_MPT_BYTE_4_PD_M GENMASK(31, 8)
0789 
0790 #define V2_MPT_BYTE_8_RA_EN_S 0
0791 
0792 #define V2_MPT_BYTE_8_R_INV_EN_S 1
0793 
0794 #define V2_MPT_BYTE_8_L_INV_EN_S 2
0795 
0796 #define V2_MPT_BYTE_8_BIND_EN_S 3
0797 
0798 #define V2_MPT_BYTE_8_ATOMIC_EN_S 4
0799 
0800 #define V2_MPT_BYTE_8_RR_EN_S 5
0801 
0802 #define V2_MPT_BYTE_8_RW_EN_S 6
0803 
0804 #define V2_MPT_BYTE_8_LW_EN_S 7
0805 
0806 #define V2_MPT_BYTE_8_MW_CNT_S 8
0807 #define V2_MPT_BYTE_8_MW_CNT_M GENMASK(31, 8)
0808 
0809 #define V2_MPT_BYTE_12_FRE_S 0
0810 
0811 #define V2_MPT_BYTE_12_PA_S 1
0812 
0813 #define V2_MPT_BYTE_12_MR_MW_S 4
0814 
0815 #define V2_MPT_BYTE_12_BPD_S 5
0816 
0817 #define V2_MPT_BYTE_12_BQP_S 6
0818 
0819 #define V2_MPT_BYTE_12_INNER_PA_VLD_S 7
0820 
0821 #define V2_MPT_BYTE_12_MW_BIND_QPN_S 8
0822 #define V2_MPT_BYTE_12_MW_BIND_QPN_M GENMASK(31, 8)
0823 
0824 #define V2_MPT_BYTE_48_PBL_BA_H_S 0
0825 #define V2_MPT_BYTE_48_PBL_BA_H_M GENMASK(28, 0)
0826 
0827 #define V2_MPT_BYTE_48_BLK_MODE_S 29
0828 
0829 #define V2_MPT_BYTE_56_PA0_H_S 0
0830 #define V2_MPT_BYTE_56_PA0_H_M GENMASK(25, 0)
0831 
0832 #define V2_MPT_BYTE_64_PA1_H_S 0
0833 #define V2_MPT_BYTE_64_PA1_H_M GENMASK(25, 0)
0834 
0835 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_S 28
0836 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_M GENMASK(31, 28)
0837 
0838 struct hns_roce_v2_db {
0839     __le32  data[2];
0840 };
0841 
0842 #define DB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_db, h, l)
0843 
0844 #define DB_TAG DB_FIELD_LOC(23, 0)
0845 #define DB_CMD DB_FIELD_LOC(27, 24)
0846 #define DB_FLAG DB_FIELD_LOC(31, 31)
0847 #define DB_PI DB_FIELD_LOC(47, 32)
0848 #define DB_SL DB_FIELD_LOC(50, 48)
0849 #define DB_CQ_CI DB_FIELD_LOC(55, 32)
0850 #define DB_CQ_NOTIFY DB_FIELD_LOC(56, 56)
0851 #define DB_CQ_CMD_SN DB_FIELD_LOC(58, 57)
0852 #define EQ_DB_TAG DB_FIELD_LOC(7, 0)
0853 #define EQ_DB_CMD DB_FIELD_LOC(17, 16)
0854 #define EQ_DB_CI DB_FIELD_LOC(55, 32)
0855 
0856 #define V2_DB_PRODUCER_IDX_S 0
0857 #define V2_DB_PRODUCER_IDX_M GENMASK(15, 0)
0858 
0859 #define V2_CQ_DB_CONS_IDX_S 0
0860 #define V2_CQ_DB_CONS_IDX_M GENMASK(23, 0)
0861 
0862 struct hns_roce_v2_ud_send_wqe {
0863     __le32  byte_4;
0864     __le32  msg_len;
0865     __le32  immtdata;
0866     __le32  byte_16;
0867     __le32  byte_20;
0868     __le32  byte_24;
0869     __le32  qkey;
0870     __le32  byte_32;
0871     __le32  byte_36;
0872     __le32  byte_40;
0873     u8  dmac[ETH_ALEN];
0874     u8  sgid_index;
0875     u8  smac_index;
0876     u8  dgid[GID_LEN_V2];
0877 };
0878 
0879 #define UD_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_ud_send_wqe, h, l)
0880 
0881 #define UD_SEND_WQE_OPCODE UD_SEND_WQE_FIELD_LOC(4, 0)
0882 #define UD_SEND_WQE_OWNER UD_SEND_WQE_FIELD_LOC(7, 7)
0883 #define UD_SEND_WQE_CQE UD_SEND_WQE_FIELD_LOC(8, 8)
0884 #define UD_SEND_WQE_SE UD_SEND_WQE_FIELD_LOC(11, 11)
0885 #define UD_SEND_WQE_PD UD_SEND_WQE_FIELD_LOC(119, 96)
0886 #define UD_SEND_WQE_SGE_NUM UD_SEND_WQE_FIELD_LOC(127, 120)
0887 #define UD_SEND_WQE_MSG_START_SGE_IDX UD_SEND_WQE_FIELD_LOC(151, 128)
0888 #define UD_SEND_WQE_UDPSPN UD_SEND_WQE_FIELD_LOC(191, 176)
0889 #define UD_SEND_WQE_DQPN UD_SEND_WQE_FIELD_LOC(247, 224)
0890 #define UD_SEND_WQE_VLAN UD_SEND_WQE_FIELD_LOC(271, 256)
0891 #define UD_SEND_WQE_HOPLIMIT UD_SEND_WQE_FIELD_LOC(279, 272)
0892 #define UD_SEND_WQE_TCLASS UD_SEND_WQE_FIELD_LOC(287, 280)
0893 #define UD_SEND_WQE_FLOW_LABEL UD_SEND_WQE_FIELD_LOC(307, 288)
0894 #define UD_SEND_WQE_SL UD_SEND_WQE_FIELD_LOC(311, 308)
0895 #define UD_SEND_WQE_VLAN_EN UD_SEND_WQE_FIELD_LOC(318, 318)
0896 #define UD_SEND_WQE_LBI UD_SEND_WQE_FIELD_LOC(319, 319)
0897 
0898 struct hns_roce_v2_rc_send_wqe {
0899     __le32      byte_4;
0900     __le32      msg_len;
0901     union {
0902         __le32  inv_key;
0903         __le32  immtdata;
0904     };
0905     __le32      byte_16;
0906     __le32      byte_20;
0907     __le32      rkey;
0908     __le64      va;
0909 };
0910 
0911 #define RC_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_rc_send_wqe, h, l)
0912 
0913 #define RC_SEND_WQE_OPCODE RC_SEND_WQE_FIELD_LOC(4, 0)
0914 #define RC_SEND_WQE_DB_SL_L RC_SEND_WQE_FIELD_LOC(6, 5)
0915 #define RC_SEND_WQE_DB_SL_H RC_SEND_WQE_FIELD_LOC(14, 13)
0916 #define RC_SEND_WQE_OWNER RC_SEND_WQE_FIELD_LOC(7, 7)
0917 #define RC_SEND_WQE_CQE RC_SEND_WQE_FIELD_LOC(8, 8)
0918 #define RC_SEND_WQE_FENCE RC_SEND_WQE_FIELD_LOC(9, 9)
0919 #define RC_SEND_WQE_SO RC_SEND_WQE_FIELD_LOC(10, 10)
0920 #define RC_SEND_WQE_SE RC_SEND_WQE_FIELD_LOC(11, 11)
0921 #define RC_SEND_WQE_INLINE RC_SEND_WQE_FIELD_LOC(12, 12)
0922 #define RC_SEND_WQE_WQE_INDEX RC_SEND_WQE_FIELD_LOC(30, 15)
0923 #define RC_SEND_WQE_FLAG RC_SEND_WQE_FIELD_LOC(31, 31)
0924 #define RC_SEND_WQE_XRC_SRQN RC_SEND_WQE_FIELD_LOC(119, 96)
0925 #define RC_SEND_WQE_SGE_NUM RC_SEND_WQE_FIELD_LOC(127, 120)
0926 #define RC_SEND_WQE_MSG_START_SGE_IDX RC_SEND_WQE_FIELD_LOC(151, 128)
0927 #define RC_SEND_WQE_INL_TYPE RC_SEND_WQE_FIELD_LOC(159, 159)
0928 
0929 struct hns_roce_wqe_frmr_seg {
0930     __le32  pbl_size;
0931     __le32  byte_40;
0932 };
0933 
0934 #define FRMR_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_wqe_frmr_seg, h, l)
0935 
0936 #define FRMR_PBL_SIZE FRMR_WQE_FIELD_LOC(31, 0)
0937 #define FRMR_BLOCK_SIZE FRMR_WQE_FIELD_LOC(35, 32)
0938 #define FRMR_PBL_BUF_PG_SZ FRMR_WQE_FIELD_LOC(39, 36)
0939 #define FRMR_BLK_MODE FRMR_WQE_FIELD_LOC(40, 40)
0940 #define FRMR_ZBVA FRMR_WQE_FIELD_LOC(41, 41)
0941 #define FRMR_BIND_EN FRMR_WQE_FIELD_LOC(42, 42)
0942 #define FRMR_ATOMIC FRMR_WQE_FIELD_LOC(43, 43)
0943 #define FRMR_RR FRMR_WQE_FIELD_LOC(44, 44)
0944 #define FRMR_RW FRMR_WQE_FIELD_LOC(45, 45)
0945 #define FRMR_LW FRMR_WQE_FIELD_LOC(46, 46)
0946 
0947 struct hns_roce_v2_wqe_data_seg {
0948     __le32    len;
0949     __le32    lkey;
0950     __le64    addr;
0951 };
0952 
0953 struct hns_roce_query_version {
0954     __le16 rocee_vendor_id;
0955     __le16 rocee_hw_version;
0956     __le32 rsv[5];
0957 };
0958 
0959 struct hns_roce_query_fw_info {
0960     __le32 fw_ver;
0961     __le32 rsv[5];
0962 };
0963 
0964 struct hns_roce_func_clear {
0965     __le32 rst_funcid_en;
0966     __le32 func_done;
0967     __le32 rsv[4];
0968 };
0969 
0970 #define FUNC_CLEAR_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_func_clear, h, l)
0971 
0972 #define FUNC_CLEAR_RST_FUN_DONE FUNC_CLEAR_FIELD_LOC(32, 32)
0973 
0974 /* Each physical function manages up to 248 virtual functions, it takes up to
0975  * 100ms for each function to execute clear. If an abnormal reset occurs, it is
0976  * executed twice at most, so it takes up to 249 * 2 * 100ms.
0977  */
0978 #define HNS_ROCE_V2_FUNC_CLEAR_TIMEOUT_MSECS    (249 * 2 * 100)
0979 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_INTERVAL   40
0980 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_FAIL_WAIT  20
0981 
0982 /* Fields of HNS_ROCE_OPC_EXT_CFG */
0983 #define EXT_CFG_VF_ID CMQ_REQ_FIELD_LOC(31, 0)
0984 #define EXT_CFG_QP_PI_IDX CMQ_REQ_FIELD_LOC(45, 32)
0985 #define EXT_CFG_QP_PI_NUM CMQ_REQ_FIELD_LOC(63, 48)
0986 #define EXT_CFG_QP_NUM CMQ_REQ_FIELD_LOC(87, 64)
0987 #define EXT_CFG_QP_IDX CMQ_REQ_FIELD_LOC(119, 96)
0988 #define EXT_CFG_LLM_IDX CMQ_REQ_FIELD_LOC(139, 128)
0989 #define EXT_CFG_LLM_NUM CMQ_REQ_FIELD_LOC(156, 144)
0990 
0991 #define CFG_LLM_A_BA_L CMQ_REQ_FIELD_LOC(31, 0)
0992 #define CFG_LLM_A_BA_H CMQ_REQ_FIELD_LOC(63, 32)
0993 #define CFG_LLM_A_DEPTH CMQ_REQ_FIELD_LOC(76, 64)
0994 #define CFG_LLM_A_PGSZ CMQ_REQ_FIELD_LOC(83, 80)
0995 #define CFG_LLM_A_INIT_EN CMQ_REQ_FIELD_LOC(84, 84)
0996 #define CFG_LLM_A_HEAD_BA_L CMQ_REQ_FIELD_LOC(127, 96)
0997 #define CFG_LLM_A_HEAD_BA_H CMQ_REQ_FIELD_LOC(147, 128)
0998 #define CFG_LLM_A_HEAD_NXTPTR CMQ_REQ_FIELD_LOC(159, 148)
0999 #define CFG_LLM_A_HEAD_PTR CMQ_REQ_FIELD_LOC(171, 160)
1000 #define CFG_LLM_B_TAIL_BA_L CMQ_REQ_FIELD_LOC(31, 0)
1001 #define CFG_LLM_B_TAIL_BA_H CMQ_REQ_FIELD_LOC(63, 32)
1002 #define CFG_LLM_B_TAIL_PTR CMQ_REQ_FIELD_LOC(75, 64)
1003 
1004 /* Fields of HNS_ROCE_OPC_CFG_GLOBAL_PARAM */
1005 #define CFG_GLOBAL_PARAM_1US_CYCLES CMQ_REQ_FIELD_LOC(9, 0)
1006 #define CFG_GLOBAL_PARAM_UDP_PORT CMQ_REQ_FIELD_LOC(31, 16)
1007 
1008 /*
1009  * Fields of HNS_ROCE_OPC_QUERY_PF_RES, HNS_ROCE_OPC_QUERY_VF_RES
1010  * and HNS_ROCE_OPC_ALLOC_VF_RES
1011  */
1012 #define FUNC_RES_A_VF_ID CMQ_REQ_FIELD_LOC(7, 0)
1013 #define FUNC_RES_A_QPC_BT_IDX CMQ_REQ_FIELD_LOC(42, 32)
1014 #define FUNC_RES_A_QPC_BT_NUM CMQ_REQ_FIELD_LOC(59, 48)
1015 #define FUNC_RES_A_SRQC_BT_IDX CMQ_REQ_FIELD_LOC(72, 64)
1016 #define FUNC_RES_A_SRQC_BT_NUM CMQ_REQ_FIELD_LOC(89, 80)
1017 #define FUNC_RES_A_CQC_BT_IDX CMQ_REQ_FIELD_LOC(104, 96)
1018 #define FUNC_RES_A_CQC_BT_NUM CMQ_REQ_FIELD_LOC(121, 112)
1019 #define FUNC_RES_A_MPT_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1020 #define FUNC_RES_A_MPT_BT_NUM CMQ_REQ_FIELD_LOC(153, 144)
1021 #define FUNC_RES_A_EQC_BT_IDX CMQ_REQ_FIELD_LOC(168, 160)
1022 #define FUNC_RES_A_EQC_BT_NUM CMQ_REQ_FIELD_LOC(185, 176)
1023 #define FUNC_RES_B_SMAC_IDX CMQ_REQ_FIELD_LOC(39, 32)
1024 #define FUNC_RES_B_SMAC_NUM CMQ_REQ_FIELD_LOC(48, 40)
1025 #define FUNC_RES_B_SGID_IDX CMQ_REQ_FIELD_LOC(71, 64)
1026 #define FUNC_RES_B_SGID_NUM CMQ_REQ_FIELD_LOC(80, 72)
1027 #define FUNC_RES_B_QID_IDX CMQ_REQ_FIELD_LOC(105, 96)
1028 #define FUNC_RES_B_QID_NUM CMQ_REQ_FIELD_LOC(122, 112)
1029 #define FUNC_RES_V_QID_NUM CMQ_REQ_FIELD_LOC(115, 112)
1030 
1031 #define FUNC_RES_B_SCCC_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1032 #define FUNC_RES_B_SCCC_BT_NUM CMQ_REQ_FIELD_LOC(145, 137)
1033 #define FUNC_RES_B_GMV_BT_IDX CMQ_REQ_FIELD_LOC(167, 160)
1034 #define FUNC_RES_B_GMV_BT_NUM CMQ_REQ_FIELD_LOC(176, 168)
1035 #define FUNC_RES_V_GMV_BT_NUM CMQ_REQ_FIELD_LOC(184, 176)
1036 
1037 /* Fields of HNS_ROCE_OPC_QUERY_PF_TIMER_RES */
1038 #define PF_TIMER_RES_QPC_ITEM_IDX CMQ_REQ_FIELD_LOC(43, 32)
1039 #define PF_TIMER_RES_QPC_ITEM_NUM CMQ_REQ_FIELD_LOC(60, 48)
1040 #define PF_TIMER_RES_CQC_ITEM_IDX CMQ_REQ_FIELD_LOC(74, 64)
1041 #define PF_TIMER_RES_CQC_ITEM_NUM CMQ_REQ_FIELD_LOC(91, 80)
1042 
1043 struct hns_roce_vf_switch {
1044     __le32 rocee_sel;
1045     __le32 fun_id;
1046     __le32 cfg;
1047     __le32 resv1;
1048     __le32 resv2;
1049     __le32 resv3;
1050 };
1051 
1052 #define VF_SWITCH_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_vf_switch, h, l)
1053 
1054 #define VF_SWITCH_VF_ID VF_SWITCH_FIELD_LOC(42, 35)
1055 #define VF_SWITCH_ALW_LPBK VF_SWITCH_FIELD_LOC(65, 65)
1056 #define VF_SWITCH_ALW_LCL_LPBK VF_SWITCH_FIELD_LOC(66, 66)
1057 #define VF_SWITCH_ALW_DST_OVRD VF_SWITCH_FIELD_LOC(67, 67)
1058 
1059 struct hns_roce_post_mbox {
1060     __le32  in_param_l;
1061     __le32  in_param_h;
1062     __le32  out_param_l;
1063     __le32  out_param_h;
1064     __le32  cmd_tag;
1065     __le32  token_event_en;
1066 };
1067 
1068 struct hns_roce_mbox_status {
1069     __le32  mb_status_hw_run;
1070     __le32  rsv[5];
1071 };
1072 
1073 #define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS 10000
1074 
1075 #define MB_ST_HW_RUN_M BIT(31)
1076 #define MB_ST_COMPLETE_M GENMASK(7, 0)
1077 
1078 #define MB_ST_COMPLETE_SUCC 1
1079 
1080 /* Fields of HNS_ROCE_OPC_CFG_BT_ATTR */
1081 #define CFG_BT_ATTR_QPC_BA_PGSZ CMQ_REQ_FIELD_LOC(3, 0)
1082 #define CFG_BT_ATTR_QPC_BUF_PGSZ CMQ_REQ_FIELD_LOC(7, 4)
1083 #define CFG_BT_ATTR_QPC_HOPNUM CMQ_REQ_FIELD_LOC(9, 8)
1084 #define CFG_BT_ATTR_SRQC_BA_PGSZ CMQ_REQ_FIELD_LOC(35, 32)
1085 #define CFG_BT_ATTR_SRQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(39, 36)
1086 #define CFG_BT_ATTR_SRQC_HOPNUM CMQ_REQ_FIELD_LOC(41, 40)
1087 #define CFG_BT_ATTR_CQC_BA_PGSZ CMQ_REQ_FIELD_LOC(67, 64)
1088 #define CFG_BT_ATTR_CQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(71, 68)
1089 #define CFG_BT_ATTR_CQC_HOPNUM CMQ_REQ_FIELD_LOC(73, 72)
1090 #define CFG_BT_ATTR_MPT_BA_PGSZ CMQ_REQ_FIELD_LOC(99, 96)
1091 #define CFG_BT_ATTR_MPT_BUF_PGSZ CMQ_REQ_FIELD_LOC(103, 100)
1092 #define CFG_BT_ATTR_MPT_HOPNUM CMQ_REQ_FIELD_LOC(105, 104)
1093 #define CFG_BT_ATTR_SCCC_BA_PGSZ CMQ_REQ_FIELD_LOC(131, 128)
1094 #define CFG_BT_ATTR_SCCC_BUF_PGSZ CMQ_REQ_FIELD_LOC(135, 132)
1095 #define CFG_BT_ATTR_SCCC_HOPNUM CMQ_REQ_FIELD_LOC(137, 136)
1096 
1097 /* Fields of HNS_ROCE_OPC_CFG_ENTRY_SIZE */
1098 #define CFG_HEM_ENTRY_SIZE_TYPE CMQ_REQ_FIELD_LOC(31, 0)
1099 enum {
1100     HNS_ROCE_CFG_QPC_SIZE = BIT(0),
1101     HNS_ROCE_CFG_SCCC_SIZE = BIT(1),
1102 };
1103 
1104 #define CFG_HEM_ENTRY_SIZE_VALUE CMQ_REQ_FIELD_LOC(191, 160)
1105 
1106 /* Fields of HNS_ROCE_OPC_CFG_GMV_BT */
1107 #define CFG_GMV_BT_BA_L CMQ_REQ_FIELD_LOC(31, 0)
1108 #define CFG_GMV_BT_BA_H CMQ_REQ_FIELD_LOC(51, 32)
1109 #define CFG_GMV_BT_IDX CMQ_REQ_FIELD_LOC(95, 64)
1110 
1111 /* Fields of HNS_ROCE_QUERY_RAM_ECC */
1112 #define QUERY_RAM_ECC_1BIT_ERR CMQ_REQ_FIELD_LOC(31, 0)
1113 #define QUERY_RAM_ECC_RES_TYPE CMQ_REQ_FIELD_LOC(63, 32)
1114 #define QUERY_RAM_ECC_TAG CMQ_REQ_FIELD_LOC(95, 64)
1115 
1116 struct hns_roce_cfg_sgid_tb {
1117     __le32  table_idx_rsv;
1118     __le32  vf_sgid_l;
1119     __le32  vf_sgid_ml;
1120     __le32  vf_sgid_mh;
1121     __le32  vf_sgid_h;
1122     __le32  vf_sgid_type_rsv;
1123 };
1124 
1125 #define SGID_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_sgid_tb, h, l)
1126 
1127 #define CFG_SGID_TB_TABLE_IDX SGID_TB_FIELD_LOC(7, 0)
1128 #define CFG_SGID_TB_VF_SGID_TYPE SGID_TB_FIELD_LOC(161, 160)
1129 
1130 struct hns_roce_cfg_smac_tb {
1131     __le32  tb_idx_rsv;
1132     __le32  vf_smac_l;
1133     __le32  vf_smac_h_rsv;
1134     __le32  rsv[3];
1135 };
1136 
1137 #define SMAC_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_smac_tb, h, l)
1138 
1139 #define CFG_SMAC_TB_IDX SMAC_TB_FIELD_LOC(7, 0)
1140 #define CFG_SMAC_TB_VF_SMAC_H SMAC_TB_FIELD_LOC(79, 64)
1141 
1142 struct hns_roce_cfg_gmv_tb_a {
1143     __le32 vf_sgid_l;
1144     __le32 vf_sgid_ml;
1145     __le32 vf_sgid_mh;
1146     __le32 vf_sgid_h;
1147     __le32 vf_sgid_type_vlan;
1148     __le32 resv;
1149 };
1150 
1151 #define GMV_TB_A_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_a, h, l)
1152 
1153 #define GMV_TB_A_VF_SGID_TYPE GMV_TB_A_FIELD_LOC(129, 128)
1154 #define GMV_TB_A_VF_VLAN_EN GMV_TB_A_FIELD_LOC(130, 130)
1155 #define GMV_TB_A_VF_VLAN_ID GMV_TB_A_FIELD_LOC(155, 144)
1156 
1157 struct hns_roce_cfg_gmv_tb_b {
1158     __le32  vf_smac_l;
1159     __le32  vf_smac_h;
1160     __le32  table_idx_rsv;
1161     __le32  resv[3];
1162 };
1163 
1164 #define GMV_TB_B_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_b, h, l)
1165 
1166 #define GMV_TB_B_SMAC_H GMV_TB_B_FIELD_LOC(47, 32)
1167 #define GMV_TB_B_SGID_IDX GMV_TB_B_FIELD_LOC(71, 64)
1168 
1169 #define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 5
1170 struct hns_roce_query_pf_caps_a {
1171     u8 number_ports;
1172     u8 local_ca_ack_delay;
1173     __le16 max_sq_sg;
1174     __le16 max_sq_inline;
1175     __le16 max_rq_sg;
1176     __le32 max_extend_sg;
1177     __le16 num_qpc_timer;
1178     __le16 num_cqc_timer;
1179     __le16 max_srq_sges;
1180     u8 num_aeq_vectors;
1181     u8 num_other_vectors;
1182     u8 max_sq_desc_sz;
1183     u8 max_rq_desc_sz;
1184     u8 max_srq_desc_sz;
1185     u8 cqe_sz;
1186 };
1187 
1188 struct hns_roce_query_pf_caps_b {
1189     u8 mtpt_entry_sz;
1190     u8 irrl_entry_sz;
1191     u8 trrl_entry_sz;
1192     u8 cqc_entry_sz;
1193     u8 srqc_entry_sz;
1194     u8 idx_entry_sz;
1195     u8 sccc_sz;
1196     u8 max_mtu;
1197     __le16 qpc_sz;
1198     __le16 qpc_timer_entry_sz;
1199     __le16 cqc_timer_entry_sz;
1200     u8 min_cqes;
1201     u8 min_wqes;
1202     __le32 page_size_cap;
1203     u8 pkey_table_len;
1204     u8 phy_num_uars;
1205     u8 ctx_hop_num;
1206     u8 pbl_hop_num;
1207 };
1208 
1209 struct hns_roce_query_pf_caps_c {
1210     __le32 cap_flags_num_pds;
1211     __le32 max_gid_num_cqs;
1212     __le32 cq_depth;
1213     __le32 num_mrws;
1214     __le32 ord_num_qps;
1215     __le16 sq_depth;
1216     __le16 rq_depth;
1217 };
1218 
1219 #define PF_CAPS_C_FIELD_LOC(h, l) \
1220     FIELD_LOC(struct hns_roce_query_pf_caps_c, h, l)
1221 
1222 #define PF_CAPS_C_NUM_PDS PF_CAPS_C_FIELD_LOC(19, 0)
1223 #define PF_CAPS_C_CAP_FLAGS PF_CAPS_C_FIELD_LOC(31, 20)
1224 #define PF_CAPS_C_NUM_CQS PF_CAPS_C_FIELD_LOC(51, 32)
1225 #define PF_CAPS_C_MAX_GID PF_CAPS_C_FIELD_LOC(60, 52)
1226 #define PF_CAPS_C_CQ_DEPTH PF_CAPS_C_FIELD_LOC(86, 64)
1227 #define PF_CAPS_C_NUM_MRWS PF_CAPS_C_FIELD_LOC(115, 96)
1228 #define PF_CAPS_C_NUM_QPS PF_CAPS_C_FIELD_LOC(147, 128)
1229 #define PF_CAPS_C_MAX_ORD PF_CAPS_C_FIELD_LOC(155, 148)
1230 
1231 struct hns_roce_query_pf_caps_d {
1232     __le32 wq_hop_num_max_srqs;
1233     __le16 srq_depth;
1234     __le16 cap_flags_ex;
1235     __le32 num_ceqs_ceq_depth;
1236     __le32 arm_st_aeq_depth;
1237     __le32 num_uars_rsv_pds;
1238     __le32 rsv_uars_rsv_qps;
1239 };
1240 
1241 #define PF_CAPS_D_FIELD_LOC(h, l) \
1242     FIELD_LOC(struct hns_roce_query_pf_caps_d, h, l)
1243 
1244 #define PF_CAPS_D_NUM_SRQS PF_CAPS_D_FIELD_LOC(19, 0)
1245 #define PF_CAPS_D_RQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(21, 20)
1246 #define PF_CAPS_D_EX_SGE_HOP_NUM PF_CAPS_D_FIELD_LOC(23, 22)
1247 #define PF_CAPS_D_SQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(25, 24)
1248 #define PF_CAPS_D_CONG_TYPE PF_CAPS_D_FIELD_LOC(29, 26)
1249 #define PF_CAPS_D_CEQ_DEPTH PF_CAPS_D_FIELD_LOC(85, 64)
1250 #define PF_CAPS_D_NUM_CEQS PF_CAPS_D_FIELD_LOC(95, 86)
1251 #define PF_CAPS_D_AEQ_DEPTH PF_CAPS_D_FIELD_LOC(117, 96)
1252 #define PF_CAPS_D_AEQ_ARM_ST PF_CAPS_D_FIELD_LOC(119, 118)
1253 #define PF_CAPS_D_CEQ_ARM_ST PF_CAPS_D_FIELD_LOC(121, 120)
1254 #define PF_CAPS_D_RSV_PDS PF_CAPS_D_FIELD_LOC(147, 128)
1255 #define PF_CAPS_D_NUM_UARS PF_CAPS_D_FIELD_LOC(155, 148)
1256 #define PF_CAPS_D_RSV_QPS PF_CAPS_D_FIELD_LOC(179, 160)
1257 #define PF_CAPS_D_RSV_UARS PF_CAPS_D_FIELD_LOC(187, 180)
1258 
1259 #define HNS_ROCE_CAP_FLAGS_EX_SHIFT 12
1260 
1261 struct hns_roce_congestion_algorithm {
1262     u8 alg_sel;
1263     u8 alg_sub_sel;
1264     u8 dip_vld;
1265     u8 wnd_mode_sel;
1266 };
1267 
1268 struct hns_roce_query_pf_caps_e {
1269     __le32 chunk_size_shift_rsv_mrws;
1270     __le32 rsv_cqs;
1271     __le32 rsv_srqs;
1272     __le32 rsv_lkey;
1273     __le16 ceq_max_cnt;
1274     __le16 ceq_period;
1275     __le16 aeq_max_cnt;
1276     __le16 aeq_period;
1277 };
1278 
1279 #define PF_CAPS_E_FIELD_LOC(h, l) \
1280     FIELD_LOC(struct hns_roce_query_pf_caps_e, h, l)
1281 
1282 #define PF_CAPS_E_RSV_MRWS PF_CAPS_E_FIELD_LOC(19, 0)
1283 #define PF_CAPS_E_CHUNK_SIZE_SHIFT PF_CAPS_E_FIELD_LOC(31, 20)
1284 #define PF_CAPS_E_RSV_CQS PF_CAPS_E_FIELD_LOC(51, 32)
1285 #define PF_CAPS_E_RSV_SRQS PF_CAPS_E_FIELD_LOC(83, 64)
1286 #define PF_CAPS_E_RSV_LKEYS PF_CAPS_E_FIELD_LOC(115, 96)
1287 
1288 struct hns_roce_cmq_req {
1289     __le32 data[6];
1290 };
1291 
1292 #define CMQ_REQ_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cmq_req, h, l)
1293 
1294 struct hns_roce_cmq_desc {
1295     __le16 opcode;
1296     __le16 flag;
1297     __le16 retval;
1298     __le16 rsv;
1299     union {
1300         __le32 data[6];
1301         struct {
1302             __le32 own_func_num;
1303             __le32 own_mac_id;
1304             __le32 rsv[4];
1305         } func_info;
1306     };
1307 };
1308 
1309 struct hns_roce_v2_cmq_ring {
1310     dma_addr_t desc_dma_addr;
1311     struct hns_roce_cmq_desc *desc;
1312     u32 head;
1313     u16 buf_size;
1314     u16 desc_num;
1315     u8 flag;
1316     spinlock_t lock; /* command queue lock */
1317 };
1318 
1319 struct hns_roce_v2_cmq {
1320     struct hns_roce_v2_cmq_ring csq;
1321     u16 tx_timeout;
1322 };
1323 
1324 struct hns_roce_link_table {
1325     struct hns_roce_buf_list table;
1326     struct hns_roce_buf *buf;
1327 };
1328 
1329 #define HNS_ROCE_EXT_LLM_ENTRY(addr, id) (((id) << (64 - 12)) | ((addr) >> 12))
1330 #define HNS_ROCE_EXT_LLM_MIN_PAGES(que_num) ((que_num) * 4 + 2)
1331 
1332 struct hns_roce_v2_free_mr {
1333     struct ib_qp *rsv_qp[HNS_ROCE_FREE_MR_USED_QP_NUM];
1334     struct ib_cq *rsv_cq;
1335     struct ib_pd *rsv_pd;
1336     struct mutex mutex;
1337 };
1338 
1339 struct hns_roce_v2_priv {
1340     struct hnae3_handle *handle;
1341     struct hns_roce_v2_cmq cmq;
1342     struct hns_roce_link_table ext_llm;
1343     struct hns_roce_v2_free_mr free_mr;
1344 };
1345 
1346 struct hns_roce_dip {
1347     u8 dgid[GID_LEN_V2];
1348     u32 dip_idx;
1349     struct list_head node; /* all dips are on a list */
1350 };
1351 
1352 struct fmea_ram_ecc {
1353     u32 is_ecc_err;
1354     u32 res_type;
1355     u32 index;
1356 };
1357 
1358 /* only for RNR timeout issue of HIP08 */
1359 #define HNS_ROCE_CLOCK_ADJUST 1000
1360 #define HNS_ROCE_MAX_CQ_PERIOD 65
1361 #define HNS_ROCE_MAX_EQ_PERIOD 65
1362 #define HNS_ROCE_RNR_TIMER_10NS 1
1363 #define HNS_ROCE_1US_CFG 999
1364 #define HNS_ROCE_1NS_CFG 0
1365 
1366 #define HNS_ROCE_AEQ_DEFAULT_BURST_NUM  0x0
1367 #define HNS_ROCE_AEQ_DEFAULT_INTERVAL   0x0
1368 #define HNS_ROCE_CEQ_DEFAULT_BURST_NUM  0x0
1369 #define HNS_ROCE_CEQ_DEFAULT_INTERVAL   0x0
1370 
1371 #define HNS_ROCE_V2_EQ_STATE_INVALID        0
1372 #define HNS_ROCE_V2_EQ_STATE_VALID      1
1373 #define HNS_ROCE_V2_EQ_STATE_OVERFLOW       2
1374 #define HNS_ROCE_V2_EQ_STATE_FAILURE        3
1375 
1376 #define HNS_ROCE_V2_EQ_OVER_IGNORE_0        0
1377 #define HNS_ROCE_V2_EQ_OVER_IGNORE_1        1
1378 
1379 #define HNS_ROCE_V2_EQ_COALESCE_0       0
1380 #define HNS_ROCE_V2_EQ_COALESCE_1       1
1381 
1382 #define HNS_ROCE_V2_EQ_FIRED            0
1383 #define HNS_ROCE_V2_EQ_ARMED            1
1384 #define HNS_ROCE_V2_EQ_ALWAYS_ARMED     3
1385 
1386 #define HNS_ROCE_EQ_INIT_EQE_CNT        0
1387 #define HNS_ROCE_EQ_INIT_PROD_IDX       0
1388 #define HNS_ROCE_EQ_INIT_REPORT_TIMER       0
1389 #define HNS_ROCE_EQ_INIT_MSI_IDX        0
1390 #define HNS_ROCE_EQ_INIT_CONS_IDX       0
1391 #define HNS_ROCE_EQ_INIT_NXT_EQE_BA     0
1392 
1393 #define HNS_ROCE_V2_COMP_EQE_NUM        0x1000
1394 #define HNS_ROCE_V2_ASYNC_EQE_NUM       0x1000
1395 
1396 #define HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S    0
1397 
1398 #define HNS_ROCE_EQ_DB_CMD_AEQ          0x0
1399 #define HNS_ROCE_EQ_DB_CMD_AEQ_ARMED        0x1
1400 #define HNS_ROCE_EQ_DB_CMD_CEQ          0x2
1401 #define HNS_ROCE_EQ_DB_CMD_CEQ_ARMED        0x3
1402 
1403 #define EQ_ENABLE               1
1404 #define EQ_DISABLE              0
1405 
1406 #define EQ_REG_OFFSET               0x4
1407 
1408 #define HNS_ROCE_INT_NAME_LEN           32
1409 #define HNS_ROCE_V2_EQN_M GENMASK(23, 0)
1410 
1411 #define HNS_ROCE_V2_VF_ABN_INT_EN_S 0
1412 #define HNS_ROCE_V2_VF_ABN_INT_EN_M GENMASK(0, 0)
1413 #define HNS_ROCE_V2_VF_ABN_INT_ST_M GENMASK(2, 0)
1414 #define HNS_ROCE_V2_VF_ABN_INT_CFG_M GENMASK(2, 0)
1415 #define HNS_ROCE_V2_VF_EVENT_INT_EN_M GENMASK(0, 0)
1416 
1417 struct hns_roce_eq_context {
1418     __le32  data[16];
1419 };
1420 
1421 #define EQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_eq_context, h, l)
1422 
1423 #define EQC_EQ_ST EQC_FIELD_LOC(1, 0)
1424 #define EQC_EQE_HOP_NUM EQC_FIELD_LOC(3, 2)
1425 #define EQC_OVER_IGNORE EQC_FIELD_LOC(4, 4)
1426 #define EQC_COALESCE EQC_FIELD_LOC(5, 5)
1427 #define EQC_ARM_ST EQC_FIELD_LOC(7, 6)
1428 #define EQC_EQN EQC_FIELD_LOC(15, 8)
1429 #define EQC_EQE_CNT EQC_FIELD_LOC(31, 16)
1430 #define EQC_EQE_BA_PG_SZ EQC_FIELD_LOC(35, 32)
1431 #define EQC_EQE_BUF_PG_SZ EQC_FIELD_LOC(39, 36)
1432 #define EQC_EQ_PROD_INDX EQC_FIELD_LOC(63, 40)
1433 #define EQC_EQ_MAX_CNT EQC_FIELD_LOC(79, 64)
1434 #define EQC_EQ_PERIOD EQC_FIELD_LOC(95, 80)
1435 #define EQC_EQE_REPORT_TIMER EQC_FIELD_LOC(127, 96)
1436 #define EQC_EQE_BA_L EQC_FIELD_LOC(159, 128)
1437 #define EQC_EQE_BA_H EQC_FIELD_LOC(188, 160)
1438 #define EQC_SHIFT EQC_FIELD_LOC(199, 192)
1439 #define EQC_MSI_INDX EQC_FIELD_LOC(207, 200)
1440 #define EQC_CUR_EQE_BA_L EQC_FIELD_LOC(223, 208)
1441 #define EQC_CUR_EQE_BA_M EQC_FIELD_LOC(255, 224)
1442 #define EQC_CUR_EQE_BA_H EQC_FIELD_LOC(259, 256)
1443 #define EQC_EQ_CONS_INDX EQC_FIELD_LOC(287, 264)
1444 #define EQC_NEX_EQE_BA_L EQC_FIELD_LOC(319, 288)
1445 #define EQC_NEX_EQE_BA_H EQC_FIELD_LOC(339, 320)
1446 #define EQC_EQE_SIZE EQC_FIELD_LOC(341, 340)
1447 
1448 #define MAX_SERVICE_LEVEL 0x7
1449 
1450 struct hns_roce_wqe_atomic_seg {
1451     __le64          fetchadd_swap_data;
1452     __le64          cmp_data;
1453 };
1454 
1455 struct hns_roce_sccc_clr {
1456     __le32 qpn;
1457     __le32 rsv[5];
1458 };
1459 
1460 struct hns_roce_sccc_clr_done {
1461     __le32 clr_done;
1462     __le32 rsv[5];
1463 };
1464 
1465 int hns_roce_v2_query_cqc_info(struct hns_roce_dev *hr_dev, u32 cqn,
1466                    int *buffer);
1467 
1468 static inline void hns_roce_write64(struct hns_roce_dev *hr_dev, __le32 val[2],
1469                     void __iomem *dest)
1470 {
1471     struct hns_roce_v2_priv *priv = hr_dev->priv;
1472     struct hnae3_handle *handle = priv->handle;
1473     const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
1474 
1475     if (!hr_dev->dis_db && !ops->get_hw_reset_stat(handle))
1476         hns_roce_write64_k(val, dest);
1477 }
1478 
1479 #endif
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