iio/resolver/ad2s90.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ad2s90.c simple support for the ADI Resolver to Digital Converters: AD2S90
0004  *
0005  * Copyright (c) 2010-2010 Analog Devices Inc.
0006  */
0007 #include <linux/types.h>
0008 #include <linux/mutex.h>
0009 #include <linux/device.h>
0010 #include <linux/spi/spi.h>
0011 #include <linux/slab.h>
0012 #include <linux/sysfs.h>
0013 #include <linux/module.h>
0014
0015 #include <linux/iio/iio.h>
0016 #include <linux/iio/sysfs.h>
0017
0018 /*
0019  * Although chip's max frequency is 2Mhz, it needs 600ns between CS and the
0020  * first falling edge of SCLK, so frequency should be at most 1 / (2 * 6e-7)
0021  */
0022 #define AD2S90_MAX_SPI_FREQ_HZ  830000
0023
0024 struct ad2s90_state {
0025     struct mutex lock; /* lock to protect rx buffer */
0026     struct spi_device *sdev;
0027     u8 rx[2] __aligned(IIO_DMA_MINALIGN);
0028 };
0029
0030 static int ad2s90_read_raw(struct iio_dev *indio_dev,
0031                struct iio_chan_spec const *chan,
0032                int *val,
0033                int *val2,
0034                long m)
0035 {
0036     int ret;
0037     struct ad2s90_state *st = iio_priv(indio_dev);
0038
0039     if (chan->type != IIO_ANGL)
0040         return -EINVAL;
0041
0042     switch (m) {
0043     case IIO_CHAN_INFO_SCALE:
0044         /* 2 * Pi / 2^12 */
0045         *val = 6283; /* mV */
0046         *val2 = 12;
0047         return IIO_VAL_FRACTIONAL_LOG2;
0048     case IIO_CHAN_INFO_RAW:
0049         mutex_lock(&st->lock);
0050         ret = spi_read(st->sdev, st->rx, 2);
0051         if (ret < 0) {
0052             mutex_unlock(&st->lock);
0053             return ret;
0054         }
0055         *val = (((u16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
0056
0057         mutex_unlock(&st->lock);
0058
0059         return IIO_VAL_INT;
0060     default:
0061         break;
0062     }
0063
0064     return -EINVAL;
0065 }
0066
0067 static const struct iio_info ad2s90_info = {
0068     .read_raw = ad2s90_read_raw,
0069 };
0070
0071 static const struct iio_chan_spec ad2s90_chan = {
0072     .type = IIO_ANGL,
0073     .indexed = 1,
0074     .channel = 0,
0075     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
0076 };
0077
0078 static int ad2s90_probe(struct spi_device *spi)
0079 {
0080     struct iio_dev *indio_dev;
0081     struct ad2s90_state *st;
0082
0083     if (spi->max_speed_hz > AD2S90_MAX_SPI_FREQ_HZ) {
0084         dev_err(&spi->dev, "SPI CLK, %d Hz exceeds %d Hz\n",
0085             spi->max_speed_hz, AD2S90_MAX_SPI_FREQ_HZ);
0086         return -EINVAL;
0087     }
0088
0089     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0090     if (!indio_dev)
0091         return -ENOMEM;
0092     st = iio_priv(indio_dev);
0093     spi_set_drvdata(spi, indio_dev);
0094
0095     mutex_init(&st->lock);
0096     st->sdev = spi;
0097     indio_dev->info = &ad2s90_info;
0098     indio_dev->modes = INDIO_DIRECT_MODE;
0099     indio_dev->channels = &ad2s90_chan;
0100     indio_dev->num_channels = 1;
0101     indio_dev->name = spi_get_device_id(spi)->name;
0102
0103     return devm_iio_device_register(indio_dev->dev.parent, indio_dev);
0104 }
0105
0106 static const struct of_device_id ad2s90_of_match[] = {
0107     { .compatible = "adi,ad2s90", },
0108     {}
0109 };
0110 MODULE_DEVICE_TABLE(of, ad2s90_of_match);
0111
0112 static const struct spi_device_id ad2s90_id[] = {
0113     { "ad2s90" },
0114     {}
0115 };
0116 MODULE_DEVICE_TABLE(spi, ad2s90_id);
0117
0118 static struct spi_driver ad2s90_driver = {
0119     .driver = {
0120         .name = "ad2s90",
0121         .of_match_table = ad2s90_of_match,
0122     },
0123     .probe = ad2s90_probe,
0124     .id_table = ad2s90_id,
0125 };
0126 module_spi_driver(ad2s90_driver);
0127
0128 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
0129 MODULE_DESCRIPTION("Analog Devices AD2S90 Resolver to Digital SPI driver");
0130 MODULE_LICENSE("GPL v2");