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0053
0054 #include <linux/module.h>
0055 #include <linux/kernel.h>
0056 #include <linux/delay.h>
0057 #include <linux/interrupt.h>
0058 #include <linux/regulator/consumer.h>
0059 #include <linux/pm_runtime.h>
0060 #include <linux/regmap.h>
0061 #include <linux/iio/iio.h>
0062 #include <linux/iio/sysfs.h>
0063 #include <linux/iio/buffer.h>
0064 #include <linux/iio/trigger.h>
0065 #include <linux/iio/trigger_consumer.h>
0066 #include <linux/iio/triggered_buffer.h>
0067 #include <asm/unaligned.h>
0068 #include "zpa2326.h"
0069
0070
0071 #define ZPA2326_CONVERSION_JIFFIES (HZ / 5)
0072
0073
0074 #define ZPA2326_TPUP_USEC_MIN (1000)
0075 #define ZPA2326_TPUP_USEC_MAX (2000)
0076
0077
0078
0079
0080
0081
0082 struct zpa2326_frequency {
0083 int hz;
0084 u16 odr;
0085 };
0086
0087
0088
0089
0090
0091 static const struct zpa2326_frequency zpa2326_sampling_frequencies[] = {
0092 { .hz = 1, .odr = 1 << ZPA2326_CTRL_REG3_ODR_SHIFT },
0093 { .hz = 5, .odr = 5 << ZPA2326_CTRL_REG3_ODR_SHIFT },
0094 { .hz = 11, .odr = 6 << ZPA2326_CTRL_REG3_ODR_SHIFT },
0095 { .hz = 23, .odr = 7 << ZPA2326_CTRL_REG3_ODR_SHIFT },
0096 };
0097
0098
0099 static const struct zpa2326_frequency *zpa2326_highest_frequency(void)
0100 {
0101 return &zpa2326_sampling_frequencies[
0102 ARRAY_SIZE(zpa2326_sampling_frequencies) - 1];
0103 }
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124 struct zpa2326_private {
0125 s64 timestamp;
0126 struct regmap *regmap;
0127 int result;
0128 struct completion data_ready;
0129 struct iio_trigger *trigger;
0130 bool waken;
0131 int irq;
0132 const struct zpa2326_frequency *frequency;
0133 struct regulator *vref;
0134 struct regulator *vdd;
0135 };
0136
0137 #define zpa2326_err(idev, fmt, ...) \
0138 dev_err(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
0139
0140 #define zpa2326_warn(idev, fmt, ...) \
0141 dev_warn(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
0142
0143 #define zpa2326_dbg(idev, fmt, ...) \
0144 dev_dbg(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
0145
0146 bool zpa2326_isreg_writeable(struct device *dev, unsigned int reg)
0147 {
0148 switch (reg) {
0149 case ZPA2326_REF_P_XL_REG:
0150 case ZPA2326_REF_P_L_REG:
0151 case ZPA2326_REF_P_H_REG:
0152 case ZPA2326_RES_CONF_REG:
0153 case ZPA2326_CTRL_REG0_REG:
0154 case ZPA2326_CTRL_REG1_REG:
0155 case ZPA2326_CTRL_REG2_REG:
0156 case ZPA2326_CTRL_REG3_REG:
0157 case ZPA2326_THS_P_LOW_REG:
0158 case ZPA2326_THS_P_HIGH_REG:
0159 return true;
0160
0161 default:
0162 return false;
0163 }
0164 }
0165 EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_writeable, IIO_ZPA2326);
0166
0167 bool zpa2326_isreg_readable(struct device *dev, unsigned int reg)
0168 {
0169 switch (reg) {
0170 case ZPA2326_REF_P_XL_REG:
0171 case ZPA2326_REF_P_L_REG:
0172 case ZPA2326_REF_P_H_REG:
0173 case ZPA2326_DEVICE_ID_REG:
0174 case ZPA2326_RES_CONF_REG:
0175 case ZPA2326_CTRL_REG0_REG:
0176 case ZPA2326_CTRL_REG1_REG:
0177 case ZPA2326_CTRL_REG2_REG:
0178 case ZPA2326_CTRL_REG3_REG:
0179 case ZPA2326_INT_SOURCE_REG:
0180 case ZPA2326_THS_P_LOW_REG:
0181 case ZPA2326_THS_P_HIGH_REG:
0182 case ZPA2326_STATUS_REG:
0183 case ZPA2326_PRESS_OUT_XL_REG:
0184 case ZPA2326_PRESS_OUT_L_REG:
0185 case ZPA2326_PRESS_OUT_H_REG:
0186 case ZPA2326_TEMP_OUT_L_REG:
0187 case ZPA2326_TEMP_OUT_H_REG:
0188 return true;
0189
0190 default:
0191 return false;
0192 }
0193 }
0194 EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_readable, IIO_ZPA2326);
0195
0196 bool zpa2326_isreg_precious(struct device *dev, unsigned int reg)
0197 {
0198 switch (reg) {
0199 case ZPA2326_INT_SOURCE_REG:
0200 case ZPA2326_PRESS_OUT_H_REG:
0201 return true;
0202
0203 default:
0204 return false;
0205 }
0206 }
0207 EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_precious, IIO_ZPA2326);
0208
0209
0210
0211
0212
0213
0214
0215
0216
0217
0218 static int zpa2326_enable_device(const struct iio_dev *indio_dev)
0219 {
0220 int err;
0221
0222 err = regmap_write(((struct zpa2326_private *)
0223 iio_priv(indio_dev))->regmap,
0224 ZPA2326_CTRL_REG0_REG, ZPA2326_CTRL_REG0_ENABLE);
0225 if (err) {
0226 zpa2326_err(indio_dev, "failed to enable device (%d)", err);
0227 return err;
0228 }
0229
0230 zpa2326_dbg(indio_dev, "enabled");
0231
0232 return 0;
0233 }
0234
0235
0236
0237
0238
0239
0240
0241
0242
0243
0244 static int zpa2326_sleep(const struct iio_dev *indio_dev)
0245 {
0246 int err;
0247
0248 err = regmap_write(((struct zpa2326_private *)
0249 iio_priv(indio_dev))->regmap,
0250 ZPA2326_CTRL_REG0_REG, 0);
0251 if (err) {
0252 zpa2326_err(indio_dev, "failed to sleep (%d)", err);
0253 return err;
0254 }
0255
0256 zpa2326_dbg(indio_dev, "sleeping");
0257
0258 return 0;
0259 }
0260
0261
0262
0263
0264
0265
0266
0267
0268
0269
0270 static int zpa2326_reset_device(const struct iio_dev *indio_dev)
0271 {
0272 int err;
0273
0274 err = regmap_write(((struct zpa2326_private *)
0275 iio_priv(indio_dev))->regmap,
0276 ZPA2326_CTRL_REG2_REG, ZPA2326_CTRL_REG2_SWRESET);
0277 if (err) {
0278 zpa2326_err(indio_dev, "failed to reset device (%d)", err);
0279 return err;
0280 }
0281
0282 usleep_range(ZPA2326_TPUP_USEC_MIN, ZPA2326_TPUP_USEC_MAX);
0283
0284 zpa2326_dbg(indio_dev, "reset");
0285
0286 return 0;
0287 }
0288
0289
0290
0291
0292
0293
0294
0295
0296
0297
0298
0299 static int zpa2326_start_oneshot(const struct iio_dev *indio_dev)
0300 {
0301 int err;
0302
0303 err = regmap_write(((struct zpa2326_private *)
0304 iio_priv(indio_dev))->regmap,
0305 ZPA2326_CTRL_REG0_REG,
0306 ZPA2326_CTRL_REG0_ENABLE |
0307 ZPA2326_CTRL_REG0_ONE_SHOT);
0308 if (err) {
0309 zpa2326_err(indio_dev, "failed to start one shot cycle (%d)",
0310 err);
0311 return err;
0312 }
0313
0314 zpa2326_dbg(indio_dev, "one shot cycle started");
0315
0316 return 0;
0317 }
0318
0319
0320
0321
0322
0323
0324
0325
0326
0327
0328
0329
0330
0331 static int zpa2326_power_on(const struct iio_dev *indio_dev,
0332 const struct zpa2326_private *private)
0333 {
0334 int err;
0335
0336 err = regulator_enable(private->vref);
0337 if (err)
0338 return err;
0339
0340 err = regulator_enable(private->vdd);
0341 if (err)
0342 goto vref;
0343
0344 zpa2326_dbg(indio_dev, "powered on");
0345
0346 err = zpa2326_enable_device(indio_dev);
0347 if (err)
0348 goto vdd;
0349
0350 err = zpa2326_reset_device(indio_dev);
0351 if (err)
0352 goto sleep;
0353
0354 return 0;
0355
0356 sleep:
0357 zpa2326_sleep(indio_dev);
0358 vdd:
0359 regulator_disable(private->vdd);
0360 vref:
0361 regulator_disable(private->vref);
0362
0363 zpa2326_dbg(indio_dev, "powered off");
0364
0365 return err;
0366 }
0367
0368
0369
0370
0371
0372
0373
0374
0375
0376 static void zpa2326_power_off(const struct iio_dev *indio_dev,
0377 const struct zpa2326_private *private)
0378 {
0379 regulator_disable(private->vdd);
0380 regulator_disable(private->vref);
0381
0382 zpa2326_dbg(indio_dev, "powered off");
0383 }
0384
0385
0386
0387
0388
0389
0390
0391
0392
0393
0394
0395
0396
0397
0398
0399
0400
0401
0402 static int zpa2326_config_oneshot(const struct iio_dev *indio_dev,
0403 int irq)
0404 {
0405 struct regmap *regs = ((struct zpa2326_private *)
0406 iio_priv(indio_dev))->regmap;
0407 const struct zpa2326_frequency *freq = zpa2326_highest_frequency();
0408 int err;
0409
0410
0411 err = regmap_write(regs, ZPA2326_CTRL_REG3_REG, freq->odr);
0412 if (err)
0413 return err;
0414
0415 if (irq > 0) {
0416
0417 err = regmap_write(regs, ZPA2326_CTRL_REG1_REG,
0418 (u8)~ZPA2326_CTRL_REG1_MASK_DATA_READY);
0419
0420 if (err) {
0421 dev_err(indio_dev->dev.parent,
0422 "failed to setup one shot mode (%d)", err);
0423 return err;
0424 }
0425 }
0426
0427 zpa2326_dbg(indio_dev, "one shot mode setup @%dHz", freq->hz);
0428
0429 return 0;
0430 }
0431
0432
0433
0434
0435
0436
0437
0438
0439
0440
0441
0442
0443
0444 static int zpa2326_clear_fifo(const struct iio_dev *indio_dev,
0445 unsigned int min_count)
0446 {
0447 struct regmap *regs = ((struct zpa2326_private *)
0448 iio_priv(indio_dev))->regmap;
0449 int err;
0450 unsigned int val;
0451
0452 if (!min_count) {
0453
0454
0455
0456
0457 err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
0458
0459 if (err < 0)
0460 goto err;
0461
0462 if (val & ZPA2326_STATUS_FIFO_E)
0463
0464 return 0;
0465 }
0466
0467
0468 do {
0469
0470
0471
0472
0473 err = regmap_read(regs, ZPA2326_PRESS_OUT_H_REG, &val);
0474 if (err < 0)
0475 goto err;
0476
0477 if (min_count) {
0478
0479
0480
0481
0482 min_count--;
0483 continue;
0484 }
0485
0486 err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
0487 if (err < 0)
0488 goto err;
0489
0490 } while (!(val & ZPA2326_STATUS_FIFO_E));
0491
0492 zpa2326_dbg(indio_dev, "FIFO cleared");
0493
0494 return 0;
0495
0496 err:
0497 zpa2326_err(indio_dev, "failed to clear FIFO (%d)", err);
0498
0499 return err;
0500 }
0501
0502
0503
0504
0505
0506
0507
0508
0509
0510
0511
0512 static int zpa2326_dequeue_pressure(const struct iio_dev *indio_dev,
0513 u32 *pressure)
0514 {
0515 struct regmap *regs = ((struct zpa2326_private *)
0516 iio_priv(indio_dev))->regmap;
0517 unsigned int val;
0518 int err;
0519 int cleared = -1;
0520
0521 err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
0522 if (err < 0)
0523 return err;
0524
0525 *pressure = 0;
0526
0527 if (val & ZPA2326_STATUS_P_OR) {
0528
0529
0530
0531
0532 zpa2326_warn(indio_dev, "FIFO overflow");
0533
0534 err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, pressure,
0535 3);
0536 if (err)
0537 return err;
0538
0539 #define ZPA2326_FIFO_DEPTH (16U)
0540
0541 return zpa2326_clear_fifo(indio_dev, ZPA2326_FIFO_DEPTH - 1);
0542 }
0543
0544
0545
0546
0547
0548
0549 do {
0550 err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, pressure,
0551 3);
0552 if (err)
0553 return err;
0554
0555 err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
0556 if (err < 0)
0557 return err;
0558
0559 cleared++;
0560 } while (!(val & ZPA2326_STATUS_FIFO_E));
0561
0562 if (cleared)
0563
0564
0565
0566
0567 zpa2326_dbg(indio_dev, "cleared %d FIFO entries", cleared);
0568
0569 return 0;
0570 }
0571
0572
0573
0574
0575
0576
0577
0578
0579 static int zpa2326_fill_sample_buffer(struct iio_dev *indio_dev,
0580 const struct zpa2326_private *private)
0581 {
0582 struct {
0583 u32 pressure;
0584 u16 temperature;
0585 u64 timestamp;
0586 } sample;
0587 int err;
0588
0589 if (test_bit(0, indio_dev->active_scan_mask)) {
0590
0591 err = zpa2326_dequeue_pressure(indio_dev, &sample.pressure);
0592 if (err) {
0593 zpa2326_warn(indio_dev, "failed to fetch pressure (%d)",
0594 err);
0595 return err;
0596 }
0597 }
0598
0599 if (test_bit(1, indio_dev->active_scan_mask)) {
0600
0601 err = regmap_bulk_read(private->regmap, ZPA2326_TEMP_OUT_L_REG,
0602 &sample.temperature, 2);
0603 if (err) {
0604 zpa2326_warn(indio_dev,
0605 "failed to fetch temperature (%d)", err);
0606 return err;
0607 }
0608 }
0609
0610
0611
0612
0613
0614
0615
0616
0617 zpa2326_dbg(indio_dev, "filling raw samples buffer");
0618
0619 iio_push_to_buffers_with_timestamp(indio_dev, &sample,
0620 private->timestamp);
0621
0622 return 0;
0623 }
0624
0625 #ifdef CONFIG_PM
0626 static int zpa2326_runtime_suspend(struct device *parent)
0627 {
0628 const struct iio_dev *indio_dev = dev_get_drvdata(parent);
0629
0630 if (pm_runtime_autosuspend_expiration(parent))
0631
0632 return -EAGAIN;
0633
0634 zpa2326_power_off(indio_dev, iio_priv(indio_dev));
0635
0636 return 0;
0637 }
0638
0639 static int zpa2326_runtime_resume(struct device *parent)
0640 {
0641 const struct iio_dev *indio_dev = dev_get_drvdata(parent);
0642
0643 return zpa2326_power_on(indio_dev, iio_priv(indio_dev));
0644 }
0645
0646 const struct dev_pm_ops zpa2326_pm_ops = {
0647 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0648 pm_runtime_force_resume)
0649 SET_RUNTIME_PM_OPS(zpa2326_runtime_suspend, zpa2326_runtime_resume,
0650 NULL)
0651 };
0652 EXPORT_SYMBOL_NS_GPL(zpa2326_pm_ops, IIO_ZPA2326);
0653
0654
0655
0656
0657
0658
0659
0660
0661
0662
0663 static int zpa2326_resume(const struct iio_dev *indio_dev)
0664 {
0665 int err;
0666
0667 err = pm_runtime_get_sync(indio_dev->dev.parent);
0668 if (err < 0) {
0669 pm_runtime_put(indio_dev->dev.parent);
0670 return err;
0671 }
0672
0673 if (err > 0) {
0674
0675
0676
0677
0678 zpa2326_enable_device(indio_dev);
0679 return 1;
0680 }
0681
0682
0683 return 0;
0684 }
0685
0686
0687
0688
0689
0690
0691
0692
0693
0694 static void zpa2326_suspend(struct iio_dev *indio_dev)
0695 {
0696 struct device *parent = indio_dev->dev.parent;
0697
0698 zpa2326_sleep(indio_dev);
0699
0700 pm_runtime_mark_last_busy(parent);
0701 pm_runtime_put_autosuspend(parent);
0702 }
0703
0704 static void zpa2326_init_runtime(struct device *parent)
0705 {
0706 pm_runtime_get_noresume(parent);
0707 pm_runtime_set_active(parent);
0708 pm_runtime_enable(parent);
0709 pm_runtime_set_autosuspend_delay(parent, 1000);
0710 pm_runtime_use_autosuspend(parent);
0711 pm_runtime_mark_last_busy(parent);
0712 pm_runtime_put_autosuspend(parent);
0713 }
0714
0715 static void zpa2326_fini_runtime(struct device *parent)
0716 {
0717 pm_runtime_disable(parent);
0718 pm_runtime_set_suspended(parent);
0719 }
0720 #else
0721 static int zpa2326_resume(const struct iio_dev *indio_dev)
0722 {
0723 zpa2326_enable_device(indio_dev);
0724
0725 return 0;
0726 }
0727
0728 static void zpa2326_suspend(struct iio_dev *indio_dev)
0729 {
0730 zpa2326_sleep(indio_dev);
0731 }
0732
0733 #define zpa2326_init_runtime(_parent)
0734 #define zpa2326_fini_runtime(_parent)
0735 #endif
0736
0737
0738
0739
0740
0741
0742
0743
0744
0745
0746
0747 static irqreturn_t zpa2326_handle_irq(int irq, void *data)
0748 {
0749 struct iio_dev *indio_dev = data;
0750
0751 if (iio_buffer_enabled(indio_dev)) {
0752
0753 ((struct zpa2326_private *)
0754 iio_priv(indio_dev))->timestamp = iio_get_time_ns(indio_dev);
0755 }
0756
0757 return IRQ_WAKE_THREAD;
0758 }
0759
0760
0761
0762
0763
0764
0765
0766
0767
0768
0769
0770
0771
0772
0773
0774
0775
0776
0777
0778
0779
0780
0781
0782
0783
0784
0785
0786 static irqreturn_t zpa2326_handle_threaded_irq(int irq, void *data)
0787 {
0788 struct iio_dev *indio_dev = data;
0789 struct zpa2326_private *priv = iio_priv(indio_dev);
0790 unsigned int val;
0791 bool cont;
0792 irqreturn_t ret = IRQ_NONE;
0793
0794
0795
0796
0797
0798 cont = (iio_buffer_enabled(indio_dev) &&
0799 iio_trigger_using_own(indio_dev));
0800
0801
0802
0803
0804
0805 priv->result = regmap_read(priv->regmap, ZPA2326_INT_SOURCE_REG, &val);
0806 if (priv->result < 0) {
0807 if (cont)
0808 return IRQ_NONE;
0809
0810 goto complete;
0811 }
0812
0813
0814 if (!(val & ZPA2326_INT_SOURCE_DATA_READY)) {
0815
0816
0817
0818
0819
0820
0821 zpa2326_warn(indio_dev, "unexpected interrupt status %02x",
0822 val);
0823
0824 if (cont)
0825 return IRQ_NONE;
0826
0827 priv->result = -ENODATA;
0828 goto complete;
0829 }
0830
0831
0832 iio_trigger_poll_chained(priv->trigger);
0833
0834 if (cont)
0835
0836
0837
0838
0839 return IRQ_HANDLED;
0840
0841 ret = IRQ_HANDLED;
0842
0843 complete:
0844
0845
0846
0847
0848 complete(&priv->data_ready);
0849
0850 return ret;
0851 }
0852
0853
0854
0855
0856
0857
0858
0859
0860 static int zpa2326_wait_oneshot_completion(const struct iio_dev *indio_dev,
0861 struct zpa2326_private *private)
0862 {
0863 unsigned int val;
0864 long timeout;
0865
0866 zpa2326_dbg(indio_dev, "waiting for one shot completion interrupt");
0867
0868 timeout = wait_for_completion_interruptible_timeout(
0869 &private->data_ready, ZPA2326_CONVERSION_JIFFIES);
0870 if (timeout > 0)
0871
0872
0873
0874
0875 return private->result;
0876
0877
0878 regmap_read(private->regmap, ZPA2326_INT_SOURCE_REG, &val);
0879
0880 if (!timeout) {
0881
0882 zpa2326_warn(indio_dev, "no one shot interrupt occurred (%ld)",
0883 timeout);
0884 return -ETIME;
0885 }
0886
0887 zpa2326_warn(indio_dev, "wait for one shot interrupt cancelled");
0888 return -ERESTARTSYS;
0889 }
0890
0891 static int zpa2326_init_managed_irq(struct device *parent,
0892 struct iio_dev *indio_dev,
0893 struct zpa2326_private *private,
0894 int irq)
0895 {
0896 int err;
0897
0898 private->irq = irq;
0899
0900 if (irq <= 0) {
0901
0902
0903
0904
0905 dev_info(parent, "no interrupt found, running in polling mode");
0906 return 0;
0907 }
0908
0909 init_completion(&private->data_ready);
0910
0911
0912 err = devm_request_threaded_irq(parent, irq, zpa2326_handle_irq,
0913 zpa2326_handle_threaded_irq,
0914 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
0915 dev_name(parent), indio_dev);
0916 if (err) {
0917 dev_err(parent, "failed to request interrupt %d (%d)", irq,
0918 err);
0919 return err;
0920 }
0921
0922 dev_info(parent, "using interrupt %d", irq);
0923
0924 return 0;
0925 }
0926
0927
0928
0929
0930
0931
0932
0933
0934
0935
0936 static int zpa2326_poll_oneshot_completion(const struct iio_dev *indio_dev)
0937 {
0938 unsigned long tmout = jiffies + ZPA2326_CONVERSION_JIFFIES;
0939 struct regmap *regs = ((struct zpa2326_private *)
0940 iio_priv(indio_dev))->regmap;
0941 unsigned int val;
0942 int err;
0943
0944 zpa2326_dbg(indio_dev, "polling for one shot completion");
0945
0946
0947
0948
0949
0950 if (msleep_interruptible(100))
0951 return -ERESTARTSYS;
0952
0953
0954 while (true) {
0955 err = regmap_read(regs, ZPA2326_CTRL_REG0_REG, &val);
0956 if (err < 0)
0957 goto err;
0958
0959 if (!(val & ZPA2326_CTRL_REG0_ONE_SHOT))
0960
0961 break;
0962
0963 if (time_after(jiffies, tmout)) {
0964
0965 err = -ETIME;
0966 goto err;
0967 }
0968
0969 usleep_range(10000, 20000);
0970 }
0971
0972
0973
0974
0975
0976
0977 err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
0978 if (err < 0)
0979 goto err;
0980
0981 if (!(val & ZPA2326_STATUS_P_DA)) {
0982
0983 err = -ENODATA;
0984 goto err;
0985 }
0986
0987 return 0;
0988
0989 err:
0990 zpa2326_warn(indio_dev, "failed to poll one shot completion (%d)", err);
0991
0992 return err;
0993 }
0994
0995
0996
0997
0998
0999
1000
1001
1002
1003
1004 static int zpa2326_fetch_raw_sample(const struct iio_dev *indio_dev,
1005 enum iio_chan_type type,
1006 int *value)
1007 {
1008 struct regmap *regs = ((struct zpa2326_private *)
1009 iio_priv(indio_dev))->regmap;
1010 int err;
1011 u8 v[3];
1012
1013 switch (type) {
1014 case IIO_PRESSURE:
1015 zpa2326_dbg(indio_dev, "fetching raw pressure sample");
1016
1017 err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, v, sizeof(v));
1018 if (err) {
1019 zpa2326_warn(indio_dev, "failed to fetch pressure (%d)",
1020 err);
1021 return err;
1022 }
1023
1024 *value = get_unaligned_le24(&v[0]);
1025
1026 return IIO_VAL_INT;
1027
1028 case IIO_TEMP:
1029 zpa2326_dbg(indio_dev, "fetching raw temperature sample");
1030
1031 err = regmap_bulk_read(regs, ZPA2326_TEMP_OUT_L_REG, value, 2);
1032 if (err) {
1033 zpa2326_warn(indio_dev,
1034 "failed to fetch temperature (%d)", err);
1035 return err;
1036 }
1037
1038
1039 *value = (int)le16_to_cpup((__le16 *)value);
1040
1041 return IIO_VAL_INT;
1042
1043 default:
1044 return -EINVAL;
1045 }
1046 }
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056 static int zpa2326_sample_oneshot(struct iio_dev *indio_dev,
1057 enum iio_chan_type type,
1058 int *value)
1059 {
1060 int ret;
1061 struct zpa2326_private *priv;
1062
1063 ret = iio_device_claim_direct_mode(indio_dev);
1064 if (ret)
1065 return ret;
1066
1067 ret = zpa2326_resume(indio_dev);
1068 if (ret < 0)
1069 goto release;
1070
1071 priv = iio_priv(indio_dev);
1072
1073 if (ret > 0) {
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085 if (type == IIO_PRESSURE) {
1086 ret = zpa2326_clear_fifo(indio_dev, 0);
1087 if (ret)
1088 goto suspend;
1089 }
1090 } else {
1091
1092
1093
1094
1095
1096 ret = zpa2326_config_oneshot(indio_dev, priv->irq);
1097 if (ret)
1098 goto suspend;
1099 }
1100
1101
1102 ret = zpa2326_start_oneshot(indio_dev);
1103 if (ret)
1104 goto suspend;
1105
1106
1107 if (priv->irq > 0)
1108 ret = zpa2326_wait_oneshot_completion(indio_dev, priv);
1109 else
1110 ret = zpa2326_poll_oneshot_completion(indio_dev);
1111
1112 if (ret)
1113 goto suspend;
1114
1115
1116 ret = zpa2326_fetch_raw_sample(indio_dev, type, value);
1117
1118 suspend:
1119 zpa2326_suspend(indio_dev);
1120 release:
1121 iio_device_release_direct_mode(indio_dev);
1122
1123 return ret;
1124 }
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153 static irqreturn_t zpa2326_trigger_handler(int irq, void *data)
1154 {
1155 struct iio_dev *indio_dev = ((struct iio_poll_func *)
1156 data)->indio_dev;
1157 struct zpa2326_private *priv = iio_priv(indio_dev);
1158 bool cont;
1159
1160
1161
1162
1163
1164
1165 cont = iio_trigger_using_own(indio_dev);
1166
1167 if (!cont) {
1168
1169 if (zpa2326_start_oneshot(indio_dev))
1170 goto out;
1171
1172
1173 if (priv->irq <= 0) {
1174
1175 if (zpa2326_poll_oneshot_completion(indio_dev))
1176 goto out;
1177
1178
1179 priv->timestamp = iio_get_time_ns(indio_dev);
1180 } else {
1181
1182 if (zpa2326_wait_oneshot_completion(indio_dev, priv))
1183 goto out;
1184 }
1185 }
1186
1187
1188 zpa2326_fill_sample_buffer(indio_dev, priv);
1189
1190 out:
1191 if (!cont)
1192
1193 zpa2326_sleep(indio_dev);
1194
1195
1196 iio_trigger_notify_done(indio_dev->trig);
1197
1198 return IRQ_HANDLED;
1199 }
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212 static int zpa2326_preenable_buffer(struct iio_dev *indio_dev)
1213 {
1214 int ret = zpa2326_resume(indio_dev);
1215
1216 if (ret < 0)
1217 return ret;
1218
1219
1220 ((struct zpa2326_private *)
1221 iio_priv(indio_dev))->waken = iio_priv(indio_dev);
1222
1223 return 0;
1224 }
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242 static int zpa2326_postenable_buffer(struct iio_dev *indio_dev)
1243 {
1244 const struct zpa2326_private *priv = iio_priv(indio_dev);
1245 int err;
1246
1247 if (!priv->waken) {
1248
1249
1250
1251
1252 err = zpa2326_clear_fifo(indio_dev, 0);
1253 if (err) {
1254 zpa2326_err(indio_dev,
1255 "failed to enable buffering (%d)", err);
1256 return err;
1257 }
1258 }
1259
1260 if (!iio_trigger_using_own(indio_dev) && priv->waken) {
1261
1262
1263
1264
1265 err = zpa2326_config_oneshot(indio_dev, priv->irq);
1266 if (err) {
1267 zpa2326_err(indio_dev,
1268 "failed to enable buffering (%d)", err);
1269 return err;
1270 }
1271 }
1272
1273 return 0;
1274 }
1275
1276 static int zpa2326_postdisable_buffer(struct iio_dev *indio_dev)
1277 {
1278 zpa2326_suspend(indio_dev);
1279
1280 return 0;
1281 }
1282
1283 static const struct iio_buffer_setup_ops zpa2326_buffer_setup_ops = {
1284 .preenable = zpa2326_preenable_buffer,
1285 .postenable = zpa2326_postenable_buffer,
1286 .postdisable = zpa2326_postdisable_buffer
1287 };
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301 static int zpa2326_set_trigger_state(struct iio_trigger *trig, bool state)
1302 {
1303 const struct iio_dev *indio_dev = dev_get_drvdata(
1304 trig->dev.parent);
1305 const struct zpa2326_private *priv = iio_priv(indio_dev);
1306 int err;
1307
1308 if (!state) {
1309
1310
1311
1312
1313
1314 unsigned int val;
1315
1316
1317
1318
1319
1320
1321
1322
1323 disable_irq(priv->irq);
1324
1325
1326
1327
1328
1329 err = regmap_write(priv->regmap, ZPA2326_CTRL_REG3_REG,
1330 zpa2326_highest_frequency()->odr);
1331 if (err)
1332 return err;
1333
1334
1335
1336
1337
1338
1339 err = regmap_read(priv->regmap, ZPA2326_INT_SOURCE_REG, &val);
1340 if (err < 0)
1341 return err;
1342
1343
1344
1345
1346
1347
1348 enable_irq(priv->irq);
1349
1350 zpa2326_dbg(indio_dev, "continuous mode stopped");
1351 } else {
1352
1353
1354
1355
1356
1357 if (priv->waken) {
1358
1359 err = regmap_write(priv->regmap, ZPA2326_CTRL_REG1_REG,
1360 (u8)
1361 ~ZPA2326_CTRL_REG1_MASK_DATA_READY);
1362 if (err)
1363 return err;
1364 }
1365
1366
1367 err = regmap_write(priv->regmap, ZPA2326_CTRL_REG3_REG,
1368 ZPA2326_CTRL_REG3_ENABLE_MEAS |
1369 priv->frequency->odr);
1370 if (err)
1371 return err;
1372
1373 zpa2326_dbg(indio_dev, "continuous mode setup @%dHz",
1374 priv->frequency->hz);
1375 }
1376
1377 return 0;
1378 }
1379
1380 static const struct iio_trigger_ops zpa2326_trigger_ops = {
1381 .set_trigger_state = zpa2326_set_trigger_state,
1382 };
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399 static int zpa2326_init_managed_trigger(struct device *parent,
1400 struct iio_dev *indio_dev,
1401 struct zpa2326_private *private,
1402 int irq)
1403 {
1404 struct iio_trigger *trigger;
1405 int ret;
1406
1407 if (irq <= 0)
1408 return 0;
1409
1410 trigger = devm_iio_trigger_alloc(parent, "%s-dev%d",
1411 indio_dev->name,
1412 iio_device_id(indio_dev));
1413 if (!trigger)
1414 return -ENOMEM;
1415
1416
1417 trigger->ops = &zpa2326_trigger_ops;
1418
1419 private->trigger = trigger;
1420
1421
1422 ret = devm_iio_trigger_register(parent, trigger);
1423 if (ret)
1424 dev_err(parent, "failed to register hardware trigger (%d)",
1425 ret);
1426
1427 return ret;
1428 }
1429
1430 static int zpa2326_get_frequency(const struct iio_dev *indio_dev)
1431 {
1432 return ((struct zpa2326_private *)iio_priv(indio_dev))->frequency->hz;
1433 }
1434
1435 static int zpa2326_set_frequency(struct iio_dev *indio_dev, int hz)
1436 {
1437 struct zpa2326_private *priv = iio_priv(indio_dev);
1438 int freq;
1439 int err;
1440
1441
1442 for (freq = 0; freq < ARRAY_SIZE(zpa2326_sampling_frequencies); freq++)
1443 if (zpa2326_sampling_frequencies[freq].hz == hz)
1444 break;
1445 if (freq == ARRAY_SIZE(zpa2326_sampling_frequencies))
1446 return -EINVAL;
1447
1448
1449 err = iio_device_claim_direct_mode(indio_dev);
1450 if (err)
1451 return err;
1452
1453 priv->frequency = &zpa2326_sampling_frequencies[freq];
1454
1455 iio_device_release_direct_mode(indio_dev);
1456
1457 return 0;
1458 }
1459
1460
1461 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1 5 11 23");
1462
1463 static struct attribute *zpa2326_attributes[] = {
1464 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1465 NULL
1466 };
1467
1468 static const struct attribute_group zpa2326_attribute_group = {
1469 .attrs = zpa2326_attributes,
1470 };
1471
1472 static int zpa2326_read_raw(struct iio_dev *indio_dev,
1473 struct iio_chan_spec const *chan,
1474 int *val,
1475 int *val2,
1476 long mask)
1477 {
1478 switch (mask) {
1479 case IIO_CHAN_INFO_RAW:
1480 return zpa2326_sample_oneshot(indio_dev, chan->type, val);
1481
1482 case IIO_CHAN_INFO_SCALE:
1483 switch (chan->type) {
1484 case IIO_PRESSURE:
1485
1486
1487
1488
1489 *val = 1;
1490 *val2 = 64000;
1491 return IIO_VAL_FRACTIONAL;
1492
1493 case IIO_TEMP:
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508 *val = 6;
1509 *val2 = 490000;
1510 return IIO_VAL_INT_PLUS_MICRO;
1511
1512 default:
1513 return -EINVAL;
1514 }
1515
1516 case IIO_CHAN_INFO_OFFSET:
1517 switch (chan->type) {
1518 case IIO_TEMP:
1519 *val = -17683000;
1520 *val2 = 649;
1521 return IIO_VAL_FRACTIONAL;
1522
1523 default:
1524 return -EINVAL;
1525 }
1526
1527 case IIO_CHAN_INFO_SAMP_FREQ:
1528 *val = zpa2326_get_frequency(indio_dev);
1529 return IIO_VAL_INT;
1530
1531 default:
1532 return -EINVAL;
1533 }
1534 }
1535
1536 static int zpa2326_write_raw(struct iio_dev *indio_dev,
1537 const struct iio_chan_spec *chan,
1538 int val,
1539 int val2,
1540 long mask)
1541 {
1542 if ((mask != IIO_CHAN_INFO_SAMP_FREQ) || val2)
1543 return -EINVAL;
1544
1545 return zpa2326_set_frequency(indio_dev, val);
1546 }
1547
1548 static const struct iio_chan_spec zpa2326_channels[] = {
1549 [0] = {
1550 .type = IIO_PRESSURE,
1551 .scan_index = 0,
1552 .scan_type = {
1553 .sign = 'u',
1554 .realbits = 24,
1555 .storagebits = 32,
1556 .endianness = IIO_LE,
1557 },
1558 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1559 BIT(IIO_CHAN_INFO_SCALE),
1560 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
1561 },
1562 [1] = {
1563 .type = IIO_TEMP,
1564 .scan_index = 1,
1565 .scan_type = {
1566 .sign = 's',
1567 .realbits = 16,
1568 .storagebits = 16,
1569 .endianness = IIO_LE,
1570 },
1571 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1572 BIT(IIO_CHAN_INFO_SCALE) |
1573 BIT(IIO_CHAN_INFO_OFFSET),
1574 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
1575 },
1576 [2] = IIO_CHAN_SOFT_TIMESTAMP(2),
1577 };
1578
1579 static const struct iio_info zpa2326_info = {
1580 .attrs = &zpa2326_attribute_group,
1581 .read_raw = zpa2326_read_raw,
1582 .write_raw = zpa2326_write_raw,
1583 };
1584
1585 static struct iio_dev *zpa2326_create_managed_iiodev(struct device *device,
1586 const char *name,
1587 struct regmap *regmap)
1588 {
1589 struct iio_dev *indio_dev;
1590
1591
1592 indio_dev = devm_iio_device_alloc(device,
1593 sizeof(struct zpa2326_private));
1594 if (!indio_dev)
1595 return NULL;
1596
1597
1598 indio_dev->modes = INDIO_DIRECT_MODE;
1599 indio_dev->channels = zpa2326_channels;
1600 indio_dev->num_channels = ARRAY_SIZE(zpa2326_channels);
1601 indio_dev->name = name;
1602 indio_dev->info = &zpa2326_info;
1603
1604 return indio_dev;
1605 }
1606
1607 int zpa2326_probe(struct device *parent,
1608 const char *name,
1609 int irq,
1610 unsigned int hwid,
1611 struct regmap *regmap)
1612 {
1613 struct iio_dev *indio_dev;
1614 struct zpa2326_private *priv;
1615 int err;
1616 unsigned int id;
1617
1618 indio_dev = zpa2326_create_managed_iiodev(parent, name, regmap);
1619 if (!indio_dev)
1620 return -ENOMEM;
1621
1622 priv = iio_priv(indio_dev);
1623
1624 priv->vref = devm_regulator_get(parent, "vref");
1625 if (IS_ERR(priv->vref))
1626 return PTR_ERR(priv->vref);
1627
1628 priv->vdd = devm_regulator_get(parent, "vdd");
1629 if (IS_ERR(priv->vdd))
1630 return PTR_ERR(priv->vdd);
1631
1632
1633 priv->frequency = zpa2326_highest_frequency();
1634
1635
1636
1637
1638
1639
1640 priv->regmap = regmap;
1641
1642 err = devm_iio_triggered_buffer_setup(parent, indio_dev, NULL,
1643 zpa2326_trigger_handler,
1644 &zpa2326_buffer_setup_ops);
1645 if (err)
1646 return err;
1647
1648 err = zpa2326_init_managed_trigger(parent, indio_dev, priv, irq);
1649 if (err)
1650 return err;
1651
1652 err = zpa2326_init_managed_irq(parent, indio_dev, priv, irq);
1653 if (err)
1654 return err;
1655
1656
1657 err = zpa2326_power_on(indio_dev, priv);
1658 if (err)
1659 return err;
1660
1661
1662 err = regmap_read(regmap, ZPA2326_DEVICE_ID_REG, &id);
1663 if (err)
1664 goto sleep;
1665
1666 if (id != hwid) {
1667 dev_err(parent, "found device with unexpected id %02x", id);
1668 err = -ENODEV;
1669 goto sleep;
1670 }
1671
1672 err = zpa2326_config_oneshot(indio_dev, irq);
1673 if (err)
1674 goto sleep;
1675
1676
1677 err = zpa2326_sleep(indio_dev);
1678 if (err)
1679 goto poweroff;
1680
1681 dev_set_drvdata(parent, indio_dev);
1682
1683 zpa2326_init_runtime(parent);
1684
1685 err = iio_device_register(indio_dev);
1686 if (err) {
1687 zpa2326_fini_runtime(parent);
1688 goto poweroff;
1689 }
1690
1691 return 0;
1692
1693 sleep:
1694
1695 zpa2326_sleep(indio_dev);
1696 poweroff:
1697 zpa2326_power_off(indio_dev, priv);
1698
1699 return err;
1700 }
1701 EXPORT_SYMBOL_NS_GPL(zpa2326_probe, IIO_ZPA2326);
1702
1703 void zpa2326_remove(const struct device *parent)
1704 {
1705 struct iio_dev *indio_dev = dev_get_drvdata(parent);
1706
1707 iio_device_unregister(indio_dev);
1708 zpa2326_fini_runtime(indio_dev->dev.parent);
1709 zpa2326_sleep(indio_dev);
1710 zpa2326_power_off(indio_dev, iio_priv(indio_dev));
1711 }
1712 EXPORT_SYMBOL_NS_GPL(zpa2326_remove, IIO_ZPA2326);
1713
1714 MODULE_AUTHOR("Gregor Boirie <gregor.boirie@parrot.com>");
1715 MODULE_DESCRIPTION("Core driver for Murata ZPA2326 pressure sensor");
1716 MODULE_LICENSE("GPL v2");