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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * tcs3472.c - Support for TAOS TCS3472 color light-to-digital converter
0004  *
0005  * Copyright (c) 2013 Peter Meerwald <pmeerw@pmeerw.net>
0006  *
0007  * Color light sensor with 16-bit channels for red, green, blue, clear);
0008  * 7-bit I2C slave address 0x39 (TCS34721, TCS34723) or 0x29 (TCS34725,
0009  * TCS34727)
0010  *
0011  * Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
0012  *
0013  * TODO: wait time
0014  */
0015 
0016 #include <linux/module.h>
0017 #include <linux/i2c.h>
0018 #include <linux/delay.h>
0019 #include <linux/pm.h>
0020 
0021 #include <linux/iio/iio.h>
0022 #include <linux/iio/sysfs.h>
0023 #include <linux/iio/events.h>
0024 #include <linux/iio/trigger_consumer.h>
0025 #include <linux/iio/buffer.h>
0026 #include <linux/iio/triggered_buffer.h>
0027 
0028 #define TCS3472_DRV_NAME "tcs3472"
0029 
0030 #define TCS3472_COMMAND BIT(7)
0031 #define TCS3472_AUTO_INCR BIT(5)
0032 #define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6))
0033 
0034 #define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06)
0035 
0036 #define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
0037 #define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
0038 #define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
0039 #define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04)
0040 #define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06)
0041 #define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
0042 #define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
0043 #define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
0044 #define TCS3472_ID (TCS3472_COMMAND | 0x12)
0045 #define TCS3472_STATUS (TCS3472_COMMAND | 0x13)
0046 #define TCS3472_CDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x14)
0047 #define TCS3472_RDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x16)
0048 #define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
0049 #define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
0050 
0051 #define TCS3472_STATUS_AINT BIT(4)
0052 #define TCS3472_STATUS_AVALID BIT(0)
0053 #define TCS3472_ENABLE_AIEN BIT(4)
0054 #define TCS3472_ENABLE_AEN BIT(1)
0055 #define TCS3472_ENABLE_PON BIT(0)
0056 #define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
0057 
0058 struct tcs3472_data {
0059     struct i2c_client *client;
0060     struct mutex lock;
0061     u16 low_thresh;
0062     u16 high_thresh;
0063     u8 enable;
0064     u8 control;
0065     u8 atime;
0066     u8 apers;
0067     /* Ensure timestamp is naturally aligned */
0068     struct {
0069         u16 chans[4];
0070         s64 timestamp __aligned(8);
0071     } scan;
0072 };
0073 
0074 static const struct iio_event_spec tcs3472_events[] = {
0075     {
0076         .type = IIO_EV_TYPE_THRESH,
0077         .dir = IIO_EV_DIR_RISING,
0078         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0079     }, {
0080         .type = IIO_EV_TYPE_THRESH,
0081         .dir = IIO_EV_DIR_FALLING,
0082         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0083     }, {
0084         .type = IIO_EV_TYPE_THRESH,
0085         .dir = IIO_EV_DIR_EITHER,
0086         .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
0087                  BIT(IIO_EV_INFO_PERIOD),
0088     },
0089 };
0090 
0091 #define TCS3472_CHANNEL(_color, _si, _addr) { \
0092     .type = IIO_INTENSITY, \
0093     .modified = 1, \
0094     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0095     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
0096         BIT(IIO_CHAN_INFO_INT_TIME), \
0097     .channel2 = IIO_MOD_LIGHT_##_color, \
0098     .address = _addr, \
0099     .scan_index = _si, \
0100     .scan_type = { \
0101         .sign = 'u', \
0102         .realbits = 16, \
0103         .storagebits = 16, \
0104         .endianness = IIO_CPU, \
0105     }, \
0106     .event_spec = _si ? NULL : tcs3472_events, \
0107     .num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \
0108 }
0109 
0110 static const int tcs3472_agains[] = { 1, 4, 16, 60 };
0111 
0112 static const struct iio_chan_spec tcs3472_channels[] = {
0113     TCS3472_CHANNEL(CLEAR, 0, TCS3472_CDATA),
0114     TCS3472_CHANNEL(RED, 1, TCS3472_RDATA),
0115     TCS3472_CHANNEL(GREEN, 2, TCS3472_GDATA),
0116     TCS3472_CHANNEL(BLUE, 3, TCS3472_BDATA),
0117     IIO_CHAN_SOFT_TIMESTAMP(4),
0118 };
0119 
0120 static int tcs3472_req_data(struct tcs3472_data *data)
0121 {
0122     int tries = 50;
0123     int ret;
0124 
0125     while (tries--) {
0126         ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
0127         if (ret < 0)
0128             return ret;
0129         if (ret & TCS3472_STATUS_AVALID)
0130             break;
0131         msleep(20);
0132     }
0133 
0134     if (tries < 0) {
0135         dev_err(&data->client->dev, "data not ready\n");
0136         return -EIO;
0137     }
0138 
0139     return 0;
0140 }
0141 
0142 static int tcs3472_read_raw(struct iio_dev *indio_dev,
0143                struct iio_chan_spec const *chan,
0144                int *val, int *val2, long mask)
0145 {
0146     struct tcs3472_data *data = iio_priv(indio_dev);
0147     int ret;
0148 
0149     switch (mask) {
0150     case IIO_CHAN_INFO_RAW:
0151         ret = iio_device_claim_direct_mode(indio_dev);
0152         if (ret)
0153             return ret;
0154         ret = tcs3472_req_data(data);
0155         if (ret < 0) {
0156             iio_device_release_direct_mode(indio_dev);
0157             return ret;
0158         }
0159         ret = i2c_smbus_read_word_data(data->client, chan->address);
0160         iio_device_release_direct_mode(indio_dev);
0161         if (ret < 0)
0162             return ret;
0163         *val = ret;
0164         return IIO_VAL_INT;
0165     case IIO_CHAN_INFO_CALIBSCALE:
0166         *val = tcs3472_agains[data->control &
0167             TCS3472_CONTROL_AGAIN_MASK];
0168         return IIO_VAL_INT;
0169     case IIO_CHAN_INFO_INT_TIME:
0170         *val = 0;
0171         *val2 = (256 - data->atime) * 2400;
0172         return IIO_VAL_INT_PLUS_MICRO;
0173     }
0174     return -EINVAL;
0175 }
0176 
0177 static int tcs3472_write_raw(struct iio_dev *indio_dev,
0178                    struct iio_chan_spec const *chan,
0179                    int val, int val2, long mask)
0180 {
0181     struct tcs3472_data *data = iio_priv(indio_dev);
0182     int i;
0183 
0184     switch (mask) {
0185     case IIO_CHAN_INFO_CALIBSCALE:
0186         if (val2 != 0)
0187             return -EINVAL;
0188         for (i = 0; i < ARRAY_SIZE(tcs3472_agains); i++) {
0189             if (val == tcs3472_agains[i]) {
0190                 data->control &= ~TCS3472_CONTROL_AGAIN_MASK;
0191                 data->control |= i;
0192                 return i2c_smbus_write_byte_data(
0193                     data->client, TCS3472_CONTROL,
0194                     data->control);
0195             }
0196         }
0197         return -EINVAL;
0198     case IIO_CHAN_INFO_INT_TIME:
0199         if (val != 0)
0200             return -EINVAL;
0201         for (i = 0; i < 256; i++) {
0202             if (val2 == (256 - i) * 2400) {
0203                 data->atime = i;
0204                 return i2c_smbus_write_byte_data(
0205                     data->client, TCS3472_ATIME,
0206                     data->atime);
0207             }
0208 
0209         }
0210         return -EINVAL;
0211     }
0212     return -EINVAL;
0213 }
0214 
0215 /*
0216  * Translation from APERS field value to the number of consecutive out-of-range
0217  * clear channel values before an interrupt is generated
0218  */
0219 static const int tcs3472_intr_pers[] = {
0220     0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60
0221 };
0222 
0223 static int tcs3472_read_event(struct iio_dev *indio_dev,
0224     const struct iio_chan_spec *chan, enum iio_event_type type,
0225     enum iio_event_direction dir, enum iio_event_info info, int *val,
0226     int *val2)
0227 {
0228     struct tcs3472_data *data = iio_priv(indio_dev);
0229     int ret;
0230     unsigned int period;
0231 
0232     mutex_lock(&data->lock);
0233 
0234     switch (info) {
0235     case IIO_EV_INFO_VALUE:
0236         *val = (dir == IIO_EV_DIR_RISING) ?
0237             data->high_thresh : data->low_thresh;
0238         ret = IIO_VAL_INT;
0239         break;
0240     case IIO_EV_INFO_PERIOD:
0241         period = (256 - data->atime) * 2400 *
0242             tcs3472_intr_pers[data->apers];
0243         *val = period / USEC_PER_SEC;
0244         *val2 = period % USEC_PER_SEC;
0245         ret = IIO_VAL_INT_PLUS_MICRO;
0246         break;
0247     default:
0248         ret = -EINVAL;
0249         break;
0250     }
0251 
0252     mutex_unlock(&data->lock);
0253 
0254     return ret;
0255 }
0256 
0257 static int tcs3472_write_event(struct iio_dev *indio_dev,
0258     const struct iio_chan_spec *chan, enum iio_event_type type,
0259     enum iio_event_direction dir, enum iio_event_info info, int val,
0260     int val2)
0261 {
0262     struct tcs3472_data *data = iio_priv(indio_dev);
0263     int ret;
0264     u8 command;
0265     int period;
0266     int i;
0267 
0268     mutex_lock(&data->lock);
0269     switch (info) {
0270     case IIO_EV_INFO_VALUE:
0271         switch (dir) {
0272         case IIO_EV_DIR_RISING:
0273             command = TCS3472_AIHT;
0274             break;
0275         case IIO_EV_DIR_FALLING:
0276             command = TCS3472_AILT;
0277             break;
0278         default:
0279             ret = -EINVAL;
0280             goto error;
0281         }
0282         ret = i2c_smbus_write_word_data(data->client, command, val);
0283         if (ret)
0284             goto error;
0285 
0286         if (dir == IIO_EV_DIR_RISING)
0287             data->high_thresh = val;
0288         else
0289             data->low_thresh = val;
0290         break;
0291     case IIO_EV_INFO_PERIOD:
0292         period = val * USEC_PER_SEC + val2;
0293         for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) {
0294             if (period <= (256 - data->atime) * 2400 *
0295                     tcs3472_intr_pers[i])
0296                 break;
0297         }
0298         ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i);
0299         if (ret)
0300             goto error;
0301 
0302         data->apers = i;
0303         break;
0304     default:
0305         ret = -EINVAL;
0306         break;
0307     }
0308 error:
0309     mutex_unlock(&data->lock);
0310 
0311     return ret;
0312 }
0313 
0314 static int tcs3472_read_event_config(struct iio_dev *indio_dev,
0315     const struct iio_chan_spec *chan, enum iio_event_type type,
0316     enum iio_event_direction dir)
0317 {
0318     struct tcs3472_data *data = iio_priv(indio_dev);
0319     int ret;
0320 
0321     mutex_lock(&data->lock);
0322     ret = !!(data->enable & TCS3472_ENABLE_AIEN);
0323     mutex_unlock(&data->lock);
0324 
0325     return ret;
0326 }
0327 
0328 static int tcs3472_write_event_config(struct iio_dev *indio_dev,
0329     const struct iio_chan_spec *chan, enum iio_event_type type,
0330     enum iio_event_direction dir, int state)
0331 {
0332     struct tcs3472_data *data = iio_priv(indio_dev);
0333     int ret = 0;
0334     u8 enable_old;
0335 
0336     mutex_lock(&data->lock);
0337 
0338     enable_old = data->enable;
0339 
0340     if (state)
0341         data->enable |= TCS3472_ENABLE_AIEN;
0342     else
0343         data->enable &= ~TCS3472_ENABLE_AIEN;
0344 
0345     if (enable_old != data->enable) {
0346         ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
0347                         data->enable);
0348         if (ret)
0349             data->enable = enable_old;
0350     }
0351     mutex_unlock(&data->lock);
0352 
0353     return ret;
0354 }
0355 
0356 static irqreturn_t tcs3472_event_handler(int irq, void *priv)
0357 {
0358     struct iio_dev *indio_dev = priv;
0359     struct tcs3472_data *data = iio_priv(indio_dev);
0360     int ret;
0361 
0362     ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
0363     if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) {
0364         iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
0365                         IIO_EV_TYPE_THRESH,
0366                         IIO_EV_DIR_EITHER),
0367                 iio_get_time_ns(indio_dev));
0368 
0369         i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR);
0370     }
0371 
0372     return IRQ_HANDLED;
0373 }
0374 
0375 static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
0376 {
0377     struct iio_poll_func *pf = p;
0378     struct iio_dev *indio_dev = pf->indio_dev;
0379     struct tcs3472_data *data = iio_priv(indio_dev);
0380     int i, j = 0;
0381 
0382     int ret = tcs3472_req_data(data);
0383     if (ret < 0)
0384         goto done;
0385 
0386     for_each_set_bit(i, indio_dev->active_scan_mask,
0387         indio_dev->masklength) {
0388         ret = i2c_smbus_read_word_data(data->client,
0389             TCS3472_CDATA + 2*i);
0390         if (ret < 0)
0391             goto done;
0392 
0393         data->scan.chans[j++] = ret;
0394     }
0395 
0396     iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
0397         iio_get_time_ns(indio_dev));
0398 
0399 done:
0400     iio_trigger_notify_done(indio_dev->trig);
0401 
0402     return IRQ_HANDLED;
0403 }
0404 
0405 static ssize_t tcs3472_show_int_time_available(struct device *dev,
0406                     struct device_attribute *attr,
0407                     char *buf)
0408 {
0409     size_t len = 0;
0410     int i;
0411 
0412     for (i = 1; i <= 256; i++)
0413         len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06d ",
0414             2400 * i);
0415 
0416     /* replace trailing space by newline */
0417     buf[len - 1] = '\n';
0418 
0419     return len;
0420 }
0421 
0422 static IIO_CONST_ATTR(calibscale_available, "1 4 16 60");
0423 static IIO_DEV_ATTR_INT_TIME_AVAIL(tcs3472_show_int_time_available);
0424 
0425 static struct attribute *tcs3472_attributes[] = {
0426     &iio_const_attr_calibscale_available.dev_attr.attr,
0427     &iio_dev_attr_integration_time_available.dev_attr.attr,
0428     NULL
0429 };
0430 
0431 static const struct attribute_group tcs3472_attribute_group = {
0432     .attrs = tcs3472_attributes,
0433 };
0434 
0435 static const struct iio_info tcs3472_info = {
0436     .read_raw = tcs3472_read_raw,
0437     .write_raw = tcs3472_write_raw,
0438     .read_event_value = tcs3472_read_event,
0439     .write_event_value = tcs3472_write_event,
0440     .read_event_config = tcs3472_read_event_config,
0441     .write_event_config = tcs3472_write_event_config,
0442     .attrs = &tcs3472_attribute_group,
0443 };
0444 
0445 static int tcs3472_probe(struct i2c_client *client,
0446                const struct i2c_device_id *id)
0447 {
0448     struct tcs3472_data *data;
0449     struct iio_dev *indio_dev;
0450     int ret;
0451 
0452     indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
0453     if (indio_dev == NULL)
0454         return -ENOMEM;
0455 
0456     data = iio_priv(indio_dev);
0457     i2c_set_clientdata(client, indio_dev);
0458     data->client = client;
0459     mutex_init(&data->lock);
0460 
0461     indio_dev->info = &tcs3472_info;
0462     indio_dev->name = TCS3472_DRV_NAME;
0463     indio_dev->channels = tcs3472_channels;
0464     indio_dev->num_channels = ARRAY_SIZE(tcs3472_channels);
0465     indio_dev->modes = INDIO_DIRECT_MODE;
0466 
0467     ret = i2c_smbus_read_byte_data(data->client, TCS3472_ID);
0468     if (ret < 0)
0469         return ret;
0470 
0471     if (ret == 0x44)
0472         dev_info(&client->dev, "TCS34721/34725 found\n");
0473     else if (ret == 0x4d)
0474         dev_info(&client->dev, "TCS34723/34727 found\n");
0475     else
0476         return -ENODEV;
0477 
0478     ret = i2c_smbus_read_byte_data(data->client, TCS3472_CONTROL);
0479     if (ret < 0)
0480         return ret;
0481     data->control = ret;
0482 
0483     ret = i2c_smbus_read_byte_data(data->client, TCS3472_ATIME);
0484     if (ret < 0)
0485         return ret;
0486     data->atime = ret;
0487 
0488     ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT);
0489     if (ret < 0)
0490         return ret;
0491     data->low_thresh = ret;
0492 
0493     ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT);
0494     if (ret < 0)
0495         return ret;
0496     data->high_thresh = ret;
0497 
0498     data->apers = 1;
0499     ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS,
0500                     data->apers);
0501     if (ret < 0)
0502         return ret;
0503 
0504     ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
0505     if (ret < 0)
0506         return ret;
0507 
0508     /* enable device */
0509     data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
0510     data->enable &= ~TCS3472_ENABLE_AIEN;
0511     ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
0512         data->enable);
0513     if (ret < 0)
0514         return ret;
0515 
0516     ret = iio_triggered_buffer_setup(indio_dev, NULL,
0517         tcs3472_trigger_handler, NULL);
0518     if (ret < 0)
0519         return ret;
0520 
0521     if (client->irq) {
0522         ret = request_threaded_irq(client->irq, NULL,
0523                        tcs3472_event_handler,
0524                        IRQF_TRIGGER_FALLING | IRQF_SHARED |
0525                        IRQF_ONESHOT,
0526                        client->name, indio_dev);
0527         if (ret)
0528             goto buffer_cleanup;
0529     }
0530 
0531     ret = iio_device_register(indio_dev);
0532     if (ret < 0)
0533         goto free_irq;
0534 
0535     return 0;
0536 
0537 free_irq:
0538     if (client->irq)
0539         free_irq(client->irq, indio_dev);
0540 buffer_cleanup:
0541     iio_triggered_buffer_cleanup(indio_dev);
0542     return ret;
0543 }
0544 
0545 static int tcs3472_powerdown(struct tcs3472_data *data)
0546 {
0547     int ret;
0548     u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
0549 
0550     mutex_lock(&data->lock);
0551 
0552     ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
0553         data->enable & ~enable_mask);
0554     if (!ret)
0555         data->enable &= ~enable_mask;
0556 
0557     mutex_unlock(&data->lock);
0558 
0559     return ret;
0560 }
0561 
0562 static int tcs3472_remove(struct i2c_client *client)
0563 {
0564     struct iio_dev *indio_dev = i2c_get_clientdata(client);
0565 
0566     iio_device_unregister(indio_dev);
0567     if (client->irq)
0568         free_irq(client->irq, indio_dev);
0569     iio_triggered_buffer_cleanup(indio_dev);
0570     tcs3472_powerdown(iio_priv(indio_dev));
0571 
0572     return 0;
0573 }
0574 
0575 static int tcs3472_suspend(struct device *dev)
0576 {
0577     struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
0578         to_i2c_client(dev)));
0579     return tcs3472_powerdown(data);
0580 }
0581 
0582 static int tcs3472_resume(struct device *dev)
0583 {
0584     struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
0585         to_i2c_client(dev)));
0586     int ret;
0587     u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
0588 
0589     mutex_lock(&data->lock);
0590 
0591     ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
0592         data->enable | enable_mask);
0593     if (!ret)
0594         data->enable |= enable_mask;
0595 
0596     mutex_unlock(&data->lock);
0597 
0598     return ret;
0599 }
0600 
0601 static DEFINE_SIMPLE_DEV_PM_OPS(tcs3472_pm_ops, tcs3472_suspend,
0602                 tcs3472_resume);
0603 
0604 static const struct i2c_device_id tcs3472_id[] = {
0605     { "tcs3472", 0 },
0606     { }
0607 };
0608 MODULE_DEVICE_TABLE(i2c, tcs3472_id);
0609 
0610 static struct i2c_driver tcs3472_driver = {
0611     .driver = {
0612         .name   = TCS3472_DRV_NAME,
0613         .pm = pm_sleep_ptr(&tcs3472_pm_ops),
0614     },
0615     .probe      = tcs3472_probe,
0616     .remove     = tcs3472_remove,
0617     .id_table   = tcs3472_id,
0618 };
0619 module_i2c_driver(tcs3472_driver);
0620 
0621 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
0622 MODULE_DESCRIPTION("TCS3472 color light sensors driver");
0623 MODULE_LICENSE("GPL");
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