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0014 #include <linux/module.h>
0015 #include <linux/i2c.h>
0016 #include <linux/err.h>
0017 #include <linux/slab.h>
0018 #include <linux/delay.h>
0019 #include <linux/irq.h>
0020
0021 #include <linux/iio/iio.h>
0022 #include <linux/iio/sysfs.h>
0023 #include <linux/iio/trigger.h>
0024 #include <linux/iio/trigger_consumer.h>
0025 #include <linux/iio/triggered_buffer.h>
0026 #include <linux/iio/buffer.h>
0027 #include <linux/util_macros.h>
0028
0029 #define SI1145_REG_PART_ID 0x00
0030 #define SI1145_REG_REV_ID 0x01
0031 #define SI1145_REG_SEQ_ID 0x02
0032 #define SI1145_REG_INT_CFG 0x03
0033 #define SI1145_REG_IRQ_ENABLE 0x04
0034 #define SI1145_REG_IRQ_MODE 0x05
0035 #define SI1145_REG_HW_KEY 0x07
0036 #define SI1145_REG_MEAS_RATE 0x08
0037 #define SI1145_REG_PS_LED21 0x0f
0038 #define SI1145_REG_PS_LED3 0x10
0039 #define SI1145_REG_UCOEF1 0x13
0040 #define SI1145_REG_UCOEF2 0x14
0041 #define SI1145_REG_UCOEF3 0x15
0042 #define SI1145_REG_UCOEF4 0x16
0043 #define SI1145_REG_PARAM_WR 0x17
0044 #define SI1145_REG_COMMAND 0x18
0045 #define SI1145_REG_RESPONSE 0x20
0046 #define SI1145_REG_IRQ_STATUS 0x21
0047 #define SI1145_REG_ALSVIS_DATA 0x22
0048 #define SI1145_REG_ALSIR_DATA 0x24
0049 #define SI1145_REG_PS1_DATA 0x26
0050 #define SI1145_REG_PS2_DATA 0x28
0051 #define SI1145_REG_PS3_DATA 0x2a
0052 #define SI1145_REG_AUX_DATA 0x2c
0053 #define SI1145_REG_PARAM_RD 0x2e
0054 #define SI1145_REG_CHIP_STAT 0x30
0055
0056 #define SI1145_UCOEF1_DEFAULT 0x7b
0057 #define SI1145_UCOEF2_DEFAULT 0x6b
0058 #define SI1145_UCOEF3_DEFAULT 0x01
0059 #define SI1145_UCOEF4_DEFAULT 0x00
0060
0061
0062 #define SI1145_PS_LED_REG(ch) \
0063 (((ch) == 2) ? SI1145_REG_PS_LED3 : SI1145_REG_PS_LED21)
0064 #define SI1145_PS_LED_SHIFT(ch) \
0065 (((ch) == 1) ? 4 : 0)
0066
0067
0068 #define SI1145_PARAM_CHLIST 0x01
0069 #define SI1145_PARAM_PSLED12_SELECT 0x02
0070 #define SI1145_PARAM_PSLED3_SELECT 0x03
0071 #define SI1145_PARAM_PS_ENCODING 0x05
0072 #define SI1145_PARAM_ALS_ENCODING 0x06
0073 #define SI1145_PARAM_PS1_ADC_MUX 0x07
0074 #define SI1145_PARAM_PS2_ADC_MUX 0x08
0075 #define SI1145_PARAM_PS3_ADC_MUX 0x09
0076 #define SI1145_PARAM_PS_ADC_COUNTER 0x0a
0077 #define SI1145_PARAM_PS_ADC_GAIN 0x0b
0078 #define SI1145_PARAM_PS_ADC_MISC 0x0c
0079 #define SI1145_PARAM_ALS_ADC_MUX 0x0d
0080 #define SI1145_PARAM_ALSIR_ADC_MUX 0x0e
0081 #define SI1145_PARAM_AUX_ADC_MUX 0x0f
0082 #define SI1145_PARAM_ALSVIS_ADC_COUNTER 0x10
0083 #define SI1145_PARAM_ALSVIS_ADC_GAIN 0x11
0084 #define SI1145_PARAM_ALSVIS_ADC_MISC 0x12
0085 #define SI1145_PARAM_LED_RECOVERY 0x1c
0086 #define SI1145_PARAM_ALSIR_ADC_COUNTER 0x1d
0087 #define SI1145_PARAM_ALSIR_ADC_GAIN 0x1e
0088 #define SI1145_PARAM_ALSIR_ADC_MISC 0x1f
0089 #define SI1145_PARAM_ADC_OFFSET 0x1a
0090
0091
0092 #define SI1145_CHLIST_EN_PS1 BIT(0)
0093 #define SI1145_CHLIST_EN_PS2 BIT(1)
0094 #define SI1145_CHLIST_EN_PS3 BIT(2)
0095 #define SI1145_CHLIST_EN_ALSVIS BIT(4)
0096 #define SI1145_CHLIST_EN_ALSIR BIT(5)
0097 #define SI1145_CHLIST_EN_AUX BIT(6)
0098 #define SI1145_CHLIST_EN_UV BIT(7)
0099
0100
0101 #define SI1145_PS_ADC_MODE_NORMAL BIT(2)
0102
0103 #define SI1145_ADC_MISC_RANGE BIT(5)
0104
0105
0106 #define SI1145_CMD_NOP 0x00
0107 #define SI1145_CMD_RESET 0x01
0108 #define SI1145_CMD_PS_FORCE 0x05
0109 #define SI1145_CMD_ALS_FORCE 0x06
0110 #define SI1145_CMD_PSALS_FORCE 0x07
0111 #define SI1145_CMD_PS_PAUSE 0x09
0112 #define SI1145_CMD_ALS_PAUSE 0x0a
0113 #define SI1145_CMD_PSALS_PAUSE 0x0b
0114 #define SI1145_CMD_PS_AUTO 0x0d
0115 #define SI1145_CMD_ALS_AUTO 0x0e
0116 #define SI1145_CMD_PSALS_AUTO 0x0f
0117 #define SI1145_CMD_PARAM_QUERY 0x80
0118 #define SI1145_CMD_PARAM_SET 0xa0
0119
0120 #define SI1145_RSP_INVALID_SETTING 0x80
0121 #define SI1145_RSP_COUNTER_MASK 0x0F
0122
0123
0124 #define SI1145_COMMAND_MINSLEEP_MS 5
0125
0126 #define SI1145_COMMAND_TIMEOUT_MS 25
0127
0128
0129 #define SI1145_INT_CFG_OE BIT(0)
0130 #define SI1145_INT_CFG_MODE BIT(1)
0131
0132
0133 #define SI1145_MASK_ALL_IE (BIT(4) | BIT(3) | BIT(2) | BIT(0))
0134
0135 #define SI1145_MUX_TEMP 0x65
0136 #define SI1145_MUX_VDD 0x75
0137
0138
0139 #define SI1145_LED_CURRENT_45mA 0x04
0140
0141 enum {
0142 SI1132,
0143 SI1141,
0144 SI1142,
0145 SI1143,
0146 SI1145,
0147 SI1146,
0148 SI1147,
0149 };
0150
0151 struct si1145_part_info {
0152 u8 part;
0153 const struct iio_info *iio_info;
0154 const struct iio_chan_spec *channels;
0155 unsigned int num_channels;
0156 unsigned int num_leds;
0157 bool uncompressed_meas_rate;
0158 };
0159
0160
0161
0162
0163
0164
0165
0166
0167
0168
0169
0170
0171
0172
0173 struct si1145_data {
0174 struct i2c_client *client;
0175 struct mutex lock;
0176 struct mutex cmdlock;
0177 int rsp_seq;
0178 const struct si1145_part_info *part_info;
0179 unsigned long scan_mask;
0180 bool autonomous;
0181 struct iio_trigger *trig;
0182 int meas_rate;
0183
0184
0185
0186
0187
0188
0189
0190 u8 buffer[24] __aligned(8);
0191 };
0192
0193
0194
0195
0196
0197
0198
0199
0200 static int __si1145_command_reset(struct si1145_data *data)
0201 {
0202 struct device *dev = &data->client->dev;
0203 unsigned long stop_jiffies;
0204 int ret;
0205
0206 ret = i2c_smbus_write_byte_data(data->client, SI1145_REG_COMMAND,
0207 SI1145_CMD_NOP);
0208 if (ret < 0)
0209 return ret;
0210 msleep(SI1145_COMMAND_MINSLEEP_MS);
0211
0212 stop_jiffies = jiffies + SI1145_COMMAND_TIMEOUT_MS * HZ / 1000;
0213 while (true) {
0214 ret = i2c_smbus_read_byte_data(data->client,
0215 SI1145_REG_RESPONSE);
0216 if (ret <= 0)
0217 return ret;
0218 if (time_after(jiffies, stop_jiffies)) {
0219 dev_warn(dev, "timeout on reset\n");
0220 return -ETIMEDOUT;
0221 }
0222 msleep(SI1145_COMMAND_MINSLEEP_MS);
0223 }
0224 }
0225
0226
0227
0228
0229
0230
0231
0232
0233
0234
0235 static int si1145_command(struct si1145_data *data, u8 cmd)
0236 {
0237 struct device *dev = &data->client->dev;
0238 unsigned long stop_jiffies;
0239 int ret;
0240
0241 mutex_lock(&data->cmdlock);
0242
0243 if (data->rsp_seq < 0) {
0244 ret = __si1145_command_reset(data);
0245 if (ret < 0) {
0246 dev_err(dev, "failed to reset command counter, ret=%d\n",
0247 ret);
0248 goto out;
0249 }
0250 data->rsp_seq = 0;
0251 }
0252
0253 ret = i2c_smbus_write_byte_data(data->client, SI1145_REG_COMMAND, cmd);
0254 if (ret) {
0255 dev_warn(dev, "failed to write command, ret=%d\n", ret);
0256 goto out;
0257 }
0258
0259 msleep(SI1145_COMMAND_MINSLEEP_MS);
0260
0261 stop_jiffies = jiffies + SI1145_COMMAND_TIMEOUT_MS * HZ / 1000;
0262 while (true) {
0263 ret = i2c_smbus_read_byte_data(data->client,
0264 SI1145_REG_RESPONSE);
0265 if (ret < 0) {
0266 dev_warn(dev, "failed to read response, ret=%d\n", ret);
0267 break;
0268 }
0269
0270 if ((ret & ~SI1145_RSP_COUNTER_MASK) == 0) {
0271 if (ret == data->rsp_seq) {
0272 if (time_after(jiffies, stop_jiffies)) {
0273 dev_warn(dev, "timeout on command 0x%02x\n",
0274 cmd);
0275 ret = -ETIMEDOUT;
0276 break;
0277 }
0278 msleep(SI1145_COMMAND_MINSLEEP_MS);
0279 continue;
0280 }
0281 if (ret == ((data->rsp_seq + 1) &
0282 SI1145_RSP_COUNTER_MASK)) {
0283 data->rsp_seq = ret;
0284 ret = 0;
0285 break;
0286 }
0287 dev_warn(dev, "unexpected response counter %d instead of %d\n",
0288 ret, (data->rsp_seq + 1) &
0289 SI1145_RSP_COUNTER_MASK);
0290 ret = -EIO;
0291 } else {
0292 if (ret == SI1145_RSP_INVALID_SETTING) {
0293 dev_warn(dev, "INVALID_SETTING error on command 0x%02x\n",
0294 cmd);
0295 ret = -EINVAL;
0296 } else {
0297
0298 dev_dbg(dev, "overflow, ret=%d, cmd=0x%02x\n",
0299 ret, cmd);
0300 ret = -EOVERFLOW;
0301 }
0302 }
0303
0304
0305 data->rsp_seq = -1;
0306 break;
0307 }
0308
0309 out:
0310 mutex_unlock(&data->cmdlock);
0311
0312 return ret;
0313 }
0314
0315 static int si1145_param_update(struct si1145_data *data, u8 op, u8 param,
0316 u8 value)
0317 {
0318 int ret;
0319
0320 ret = i2c_smbus_write_byte_data(data->client,
0321 SI1145_REG_PARAM_WR, value);
0322 if (ret < 0)
0323 return ret;
0324
0325 return si1145_command(data, op | (param & 0x1F));
0326 }
0327
0328 static int si1145_param_set(struct si1145_data *data, u8 param, u8 value)
0329 {
0330 return si1145_param_update(data, SI1145_CMD_PARAM_SET, param, value);
0331 }
0332
0333
0334 static int si1145_param_query(struct si1145_data *data, u8 param)
0335 {
0336 int ret;
0337
0338 ret = si1145_command(data, SI1145_CMD_PARAM_QUERY | (param & 0x1F));
0339 if (ret < 0)
0340 return ret;
0341
0342 return i2c_smbus_read_byte_data(data->client, SI1145_REG_PARAM_RD);
0343 }
0344
0345
0346 static u16 si1145_uncompress(u8 x)
0347 {
0348 u16 result = 0;
0349 u8 exponent = 0;
0350
0351 if (x < 8)
0352 return 0;
0353
0354 exponent = (x & 0xf0) >> 4;
0355 result = 0x10 | (x & 0x0f);
0356
0357 if (exponent >= 4)
0358 return result << (exponent - 4);
0359 return result >> (4 - exponent);
0360 }
0361
0362
0363 static u8 si1145_compress(u16 x)
0364 {
0365 u32 exponent = 0;
0366 u32 significand = 0;
0367 u32 tmp = x;
0368
0369 if (x == 0x0000)
0370 return 0x00;
0371 if (x == 0x0001)
0372 return 0x08;
0373
0374 while (1) {
0375 tmp >>= 1;
0376 exponent += 1;
0377 if (tmp == 1)
0378 break;
0379 }
0380
0381 if (exponent < 5) {
0382 significand = x << (4 - exponent);
0383 return (exponent << 4) | (significand & 0xF);
0384 }
0385
0386 significand = x >> (exponent - 5);
0387 if (significand & 1) {
0388 significand += 2;
0389 if (significand & 0x0040) {
0390 exponent += 1;
0391 significand >>= 1;
0392 }
0393 }
0394
0395 return (exponent << 4) | ((significand >> 1) & 0xF);
0396 }
0397
0398
0399 static int si1145_set_meas_rate(struct si1145_data *data, int interval)
0400 {
0401 if (data->part_info->uncompressed_meas_rate)
0402 return i2c_smbus_write_word_data(data->client,
0403 SI1145_REG_MEAS_RATE, interval);
0404 else
0405 return i2c_smbus_write_byte_data(data->client,
0406 SI1145_REG_MEAS_RATE, interval);
0407 }
0408
0409 static int si1145_read_samp_freq(struct si1145_data *data, int *val, int *val2)
0410 {
0411 *val = 32000;
0412 if (data->part_info->uncompressed_meas_rate)
0413 *val2 = data->meas_rate;
0414 else
0415 *val2 = si1145_uncompress(data->meas_rate);
0416 return IIO_VAL_FRACTIONAL;
0417 }
0418
0419
0420 static int si1145_store_samp_freq(struct si1145_data *data, int val)
0421 {
0422 int ret = 0;
0423 int meas_rate;
0424
0425 if (val <= 0 || val > 32000)
0426 return -ERANGE;
0427 meas_rate = 32000 / val;
0428
0429 mutex_lock(&data->lock);
0430 if (data->autonomous) {
0431 ret = si1145_set_meas_rate(data, meas_rate);
0432 if (ret)
0433 goto out;
0434 }
0435 if (data->part_info->uncompressed_meas_rate)
0436 data->meas_rate = meas_rate;
0437 else
0438 data->meas_rate = si1145_compress(meas_rate);
0439
0440 out:
0441 mutex_unlock(&data->lock);
0442
0443 return ret;
0444 }
0445
0446 static irqreturn_t si1145_trigger_handler(int irq, void *private)
0447 {
0448 struct iio_poll_func *pf = private;
0449 struct iio_dev *indio_dev = pf->indio_dev;
0450 struct si1145_data *data = iio_priv(indio_dev);
0451 int i, j = 0;
0452 int ret;
0453 u8 irq_status = 0;
0454
0455 if (!data->autonomous) {
0456 ret = si1145_command(data, SI1145_CMD_PSALS_FORCE);
0457 if (ret < 0 && ret != -EOVERFLOW)
0458 goto done;
0459 } else {
0460 irq_status = ret = i2c_smbus_read_byte_data(data->client,
0461 SI1145_REG_IRQ_STATUS);
0462 if (ret < 0)
0463 goto done;
0464 if (!(irq_status & SI1145_MASK_ALL_IE))
0465 goto done;
0466 }
0467
0468 for_each_set_bit(i, indio_dev->active_scan_mask,
0469 indio_dev->masklength) {
0470 int run = 1;
0471
0472 while (i + run < indio_dev->masklength) {
0473 if (!test_bit(i + run, indio_dev->active_scan_mask))
0474 break;
0475 if (indio_dev->channels[i + run].address !=
0476 indio_dev->channels[i].address + 2 * run)
0477 break;
0478 run++;
0479 }
0480
0481 ret = i2c_smbus_read_i2c_block_data_or_emulated(
0482 data->client, indio_dev->channels[i].address,
0483 sizeof(u16) * run, &data->buffer[j]);
0484 if (ret < 0)
0485 goto done;
0486 j += run * sizeof(u16);
0487 i += run - 1;
0488 }
0489
0490 if (data->autonomous) {
0491 ret = i2c_smbus_write_byte_data(data->client,
0492 SI1145_REG_IRQ_STATUS,
0493 irq_status & SI1145_MASK_ALL_IE);
0494 if (ret < 0)
0495 goto done;
0496 }
0497
0498 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
0499 iio_get_time_ns(indio_dev));
0500
0501 done:
0502 iio_trigger_notify_done(indio_dev->trig);
0503 return IRQ_HANDLED;
0504 }
0505
0506 static int si1145_set_chlist(struct iio_dev *indio_dev, unsigned long scan_mask)
0507 {
0508 struct si1145_data *data = iio_priv(indio_dev);
0509 u8 reg = 0, mux;
0510 int ret;
0511 int i;
0512
0513
0514 if (data->scan_mask == scan_mask)
0515 return 0;
0516
0517 for_each_set_bit(i, &scan_mask, indio_dev->masklength) {
0518 switch (indio_dev->channels[i].address) {
0519 case SI1145_REG_ALSVIS_DATA:
0520 reg |= SI1145_CHLIST_EN_ALSVIS;
0521 break;
0522 case SI1145_REG_ALSIR_DATA:
0523 reg |= SI1145_CHLIST_EN_ALSIR;
0524 break;
0525 case SI1145_REG_PS1_DATA:
0526 reg |= SI1145_CHLIST_EN_PS1;
0527 break;
0528 case SI1145_REG_PS2_DATA:
0529 reg |= SI1145_CHLIST_EN_PS2;
0530 break;
0531 case SI1145_REG_PS3_DATA:
0532 reg |= SI1145_CHLIST_EN_PS3;
0533 break;
0534 case SI1145_REG_AUX_DATA:
0535 switch (indio_dev->channels[i].type) {
0536 case IIO_UVINDEX:
0537 reg |= SI1145_CHLIST_EN_UV;
0538 break;
0539 default:
0540 reg |= SI1145_CHLIST_EN_AUX;
0541 if (indio_dev->channels[i].type == IIO_TEMP)
0542 mux = SI1145_MUX_TEMP;
0543 else
0544 mux = SI1145_MUX_VDD;
0545 ret = si1145_param_set(data,
0546 SI1145_PARAM_AUX_ADC_MUX, mux);
0547 if (ret < 0)
0548 return ret;
0549
0550 break;
0551 }
0552 }
0553 }
0554
0555 data->scan_mask = scan_mask;
0556 ret = si1145_param_set(data, SI1145_PARAM_CHLIST, reg);
0557
0558 return ret < 0 ? ret : 0;
0559 }
0560
0561 static int si1145_measure(struct iio_dev *indio_dev,
0562 struct iio_chan_spec const *chan)
0563 {
0564 struct si1145_data *data = iio_priv(indio_dev);
0565 u8 cmd;
0566 int ret;
0567
0568 ret = si1145_set_chlist(indio_dev, BIT(chan->scan_index));
0569 if (ret < 0)
0570 return ret;
0571
0572 cmd = (chan->type == IIO_PROXIMITY) ? SI1145_CMD_PS_FORCE :
0573 SI1145_CMD_ALS_FORCE;
0574 ret = si1145_command(data, cmd);
0575 if (ret < 0 && ret != -EOVERFLOW)
0576 return ret;
0577
0578 return i2c_smbus_read_word_data(data->client, chan->address);
0579 }
0580
0581
0582
0583
0584
0585 static const int si1145_proximity_scale_available[] = {
0586 128, 64, 32, 16, 8, 4};
0587 static const int si1145_intensity_scale_available[] = {
0588 128, 64, 32, 16, 8, 4, 2, 1};
0589 static IIO_CONST_ATTR(in_proximity_scale_available,
0590 "128 64 32 16 8 4");
0591 static IIO_CONST_ATTR(in_intensity_scale_available,
0592 "128 64 32 16 8 4 2 1");
0593 static IIO_CONST_ATTR(in_intensity_ir_scale_available,
0594 "128 64 32 16 8 4 2 1");
0595
0596 static int si1145_scale_from_adcgain(int regval)
0597 {
0598 return 128 >> regval;
0599 }
0600
0601 static int si1145_proximity_adcgain_from_scale(int val, int val2)
0602 {
0603 val = find_closest_descending(val, si1145_proximity_scale_available,
0604 ARRAY_SIZE(si1145_proximity_scale_available));
0605 if (val < 0 || val > 5 || val2 != 0)
0606 return -EINVAL;
0607
0608 return val;
0609 }
0610
0611 static int si1145_intensity_adcgain_from_scale(int val, int val2)
0612 {
0613 val = find_closest_descending(val, si1145_intensity_scale_available,
0614 ARRAY_SIZE(si1145_intensity_scale_available));
0615 if (val < 0 || val > 7 || val2 != 0)
0616 return -EINVAL;
0617
0618 return val;
0619 }
0620
0621 static int si1145_read_raw(struct iio_dev *indio_dev,
0622 struct iio_chan_spec const *chan,
0623 int *val, int *val2, long mask)
0624 {
0625 struct si1145_data *data = iio_priv(indio_dev);
0626 int ret;
0627 u8 reg;
0628
0629 switch (mask) {
0630 case IIO_CHAN_INFO_RAW:
0631 switch (chan->type) {
0632 case IIO_INTENSITY:
0633 case IIO_PROXIMITY:
0634 case IIO_VOLTAGE:
0635 case IIO_TEMP:
0636 case IIO_UVINDEX:
0637 ret = iio_device_claim_direct_mode(indio_dev);
0638 if (ret)
0639 return ret;
0640 ret = si1145_measure(indio_dev, chan);
0641 iio_device_release_direct_mode(indio_dev);
0642
0643 if (ret < 0)
0644 return ret;
0645
0646 *val = ret;
0647
0648 return IIO_VAL_INT;
0649 case IIO_CURRENT:
0650 ret = i2c_smbus_read_byte_data(data->client,
0651 SI1145_PS_LED_REG(chan->channel));
0652 if (ret < 0)
0653 return ret;
0654
0655 *val = (ret >> SI1145_PS_LED_SHIFT(chan->channel))
0656 & 0x0f;
0657
0658 return IIO_VAL_INT;
0659 default:
0660 return -EINVAL;
0661 }
0662 case IIO_CHAN_INFO_SCALE:
0663 switch (chan->type) {
0664 case IIO_PROXIMITY:
0665 reg = SI1145_PARAM_PS_ADC_GAIN;
0666 break;
0667 case IIO_INTENSITY:
0668 if (chan->channel2 == IIO_MOD_LIGHT_IR)
0669 reg = SI1145_PARAM_ALSIR_ADC_GAIN;
0670 else
0671 reg = SI1145_PARAM_ALSVIS_ADC_GAIN;
0672 break;
0673 case IIO_TEMP:
0674 *val = 28;
0675 *val2 = 571429;
0676 return IIO_VAL_INT_PLUS_MICRO;
0677 case IIO_UVINDEX:
0678 *val = 0;
0679 *val2 = 10000;
0680 return IIO_VAL_INT_PLUS_MICRO;
0681 default:
0682 return -EINVAL;
0683 }
0684
0685 ret = si1145_param_query(data, reg);
0686 if (ret < 0)
0687 return ret;
0688
0689 *val = si1145_scale_from_adcgain(ret & 0x07);
0690
0691 return IIO_VAL_INT;
0692 case IIO_CHAN_INFO_OFFSET:
0693 switch (chan->type) {
0694 case IIO_TEMP:
0695
0696
0697
0698
0699 *val = -256 - 11136 + 25 * 35;
0700 return IIO_VAL_INT;
0701 default:
0702
0703
0704
0705
0706
0707 ret = si1145_param_query(data, SI1145_PARAM_ADC_OFFSET);
0708 if (ret < 0)
0709 return ret;
0710 *val = -si1145_uncompress(ret);
0711 return IIO_VAL_INT;
0712 }
0713 case IIO_CHAN_INFO_SAMP_FREQ:
0714 return si1145_read_samp_freq(data, val, val2);
0715 default:
0716 return -EINVAL;
0717 }
0718 }
0719
0720 static int si1145_write_raw(struct iio_dev *indio_dev,
0721 struct iio_chan_spec const *chan,
0722 int val, int val2, long mask)
0723 {
0724 struct si1145_data *data = iio_priv(indio_dev);
0725 u8 reg1, reg2, shift;
0726 int ret;
0727
0728 switch (mask) {
0729 case IIO_CHAN_INFO_SCALE:
0730 switch (chan->type) {
0731 case IIO_PROXIMITY:
0732 val = si1145_proximity_adcgain_from_scale(val, val2);
0733 if (val < 0)
0734 return val;
0735 reg1 = SI1145_PARAM_PS_ADC_GAIN;
0736 reg2 = SI1145_PARAM_PS_ADC_COUNTER;
0737 break;
0738 case IIO_INTENSITY:
0739 val = si1145_intensity_adcgain_from_scale(val, val2);
0740 if (val < 0)
0741 return val;
0742 if (chan->channel2 == IIO_MOD_LIGHT_IR) {
0743 reg1 = SI1145_PARAM_ALSIR_ADC_GAIN;
0744 reg2 = SI1145_PARAM_ALSIR_ADC_COUNTER;
0745 } else {
0746 reg1 = SI1145_PARAM_ALSVIS_ADC_GAIN;
0747 reg2 = SI1145_PARAM_ALSVIS_ADC_COUNTER;
0748 }
0749 break;
0750 default:
0751 return -EINVAL;
0752 }
0753
0754 ret = iio_device_claim_direct_mode(indio_dev);
0755 if (ret)
0756 return ret;
0757
0758 ret = si1145_param_set(data, reg1, val);
0759 if (ret < 0) {
0760 iio_device_release_direct_mode(indio_dev);
0761 return ret;
0762 }
0763
0764 ret = si1145_param_set(data, reg2, (~val & 0x07) << 4);
0765 iio_device_release_direct_mode(indio_dev);
0766 return ret;
0767 case IIO_CHAN_INFO_RAW:
0768 if (chan->type != IIO_CURRENT)
0769 return -EINVAL;
0770
0771 if (val < 0 || val > 15 || val2 != 0)
0772 return -EINVAL;
0773
0774 reg1 = SI1145_PS_LED_REG(chan->channel);
0775 shift = SI1145_PS_LED_SHIFT(chan->channel);
0776
0777 ret = iio_device_claim_direct_mode(indio_dev);
0778 if (ret)
0779 return ret;
0780
0781 ret = i2c_smbus_read_byte_data(data->client, reg1);
0782 if (ret < 0) {
0783 iio_device_release_direct_mode(indio_dev);
0784 return ret;
0785 }
0786 ret = i2c_smbus_write_byte_data(data->client, reg1,
0787 (ret & ~(0x0f << shift)) |
0788 ((val & 0x0f) << shift));
0789 iio_device_release_direct_mode(indio_dev);
0790 return ret;
0791 case IIO_CHAN_INFO_SAMP_FREQ:
0792 return si1145_store_samp_freq(data, val);
0793 default:
0794 return -EINVAL;
0795 }
0796 }
0797
0798 #define SI1145_ST { \
0799 .sign = 'u', \
0800 .realbits = 16, \
0801 .storagebits = 16, \
0802 .endianness = IIO_LE, \
0803 }
0804
0805 #define SI1145_INTENSITY_CHANNEL(_si) { \
0806 .type = IIO_INTENSITY, \
0807 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0808 BIT(IIO_CHAN_INFO_OFFSET) | \
0809 BIT(IIO_CHAN_INFO_SCALE), \
0810 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0811 .scan_type = SI1145_ST, \
0812 .scan_index = _si, \
0813 .address = SI1145_REG_ALSVIS_DATA, \
0814 }
0815
0816 #define SI1145_INTENSITY_IR_CHANNEL(_si) { \
0817 .type = IIO_INTENSITY, \
0818 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0819 BIT(IIO_CHAN_INFO_OFFSET) | \
0820 BIT(IIO_CHAN_INFO_SCALE), \
0821 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0822 .modified = 1, \
0823 .channel2 = IIO_MOD_LIGHT_IR, \
0824 .scan_type = SI1145_ST, \
0825 .scan_index = _si, \
0826 .address = SI1145_REG_ALSIR_DATA, \
0827 }
0828
0829 #define SI1145_TEMP_CHANNEL(_si) { \
0830 .type = IIO_TEMP, \
0831 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0832 BIT(IIO_CHAN_INFO_OFFSET) | \
0833 BIT(IIO_CHAN_INFO_SCALE), \
0834 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0835 .scan_type = SI1145_ST, \
0836 .scan_index = _si, \
0837 .address = SI1145_REG_AUX_DATA, \
0838 }
0839
0840 #define SI1145_UV_CHANNEL(_si) { \
0841 .type = IIO_UVINDEX, \
0842 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0843 BIT(IIO_CHAN_INFO_SCALE), \
0844 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0845 .scan_type = SI1145_ST, \
0846 .scan_index = _si, \
0847 .address = SI1145_REG_AUX_DATA, \
0848 }
0849
0850 #define SI1145_PROXIMITY_CHANNEL(_si, _ch) { \
0851 .type = IIO_PROXIMITY, \
0852 .indexed = 1, \
0853 .channel = _ch, \
0854 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0855 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
0856 BIT(IIO_CHAN_INFO_OFFSET), \
0857 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0858 .scan_type = SI1145_ST, \
0859 .scan_index = _si, \
0860 .address = SI1145_REG_PS1_DATA + _ch * 2, \
0861 }
0862
0863 #define SI1145_VOLTAGE_CHANNEL(_si) { \
0864 .type = IIO_VOLTAGE, \
0865 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0866 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0867 .scan_type = SI1145_ST, \
0868 .scan_index = _si, \
0869 .address = SI1145_REG_AUX_DATA, \
0870 }
0871
0872 #define SI1145_CURRENT_CHANNEL(_ch) { \
0873 .type = IIO_CURRENT, \
0874 .indexed = 1, \
0875 .channel = _ch, \
0876 .output = 1, \
0877 .scan_index = -1, \
0878 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0879 }
0880
0881 static const struct iio_chan_spec si1132_channels[] = {
0882 SI1145_INTENSITY_CHANNEL(0),
0883 SI1145_INTENSITY_IR_CHANNEL(1),
0884 SI1145_TEMP_CHANNEL(2),
0885 SI1145_VOLTAGE_CHANNEL(3),
0886 SI1145_UV_CHANNEL(4),
0887 IIO_CHAN_SOFT_TIMESTAMP(6),
0888 };
0889
0890 static const struct iio_chan_spec si1141_channels[] = {
0891 SI1145_INTENSITY_CHANNEL(0),
0892 SI1145_INTENSITY_IR_CHANNEL(1),
0893 SI1145_PROXIMITY_CHANNEL(2, 0),
0894 SI1145_TEMP_CHANNEL(3),
0895 SI1145_VOLTAGE_CHANNEL(4),
0896 IIO_CHAN_SOFT_TIMESTAMP(5),
0897 SI1145_CURRENT_CHANNEL(0),
0898 };
0899
0900 static const struct iio_chan_spec si1142_channels[] = {
0901 SI1145_INTENSITY_CHANNEL(0),
0902 SI1145_INTENSITY_IR_CHANNEL(1),
0903 SI1145_PROXIMITY_CHANNEL(2, 0),
0904 SI1145_PROXIMITY_CHANNEL(3, 1),
0905 SI1145_TEMP_CHANNEL(4),
0906 SI1145_VOLTAGE_CHANNEL(5),
0907 IIO_CHAN_SOFT_TIMESTAMP(6),
0908 SI1145_CURRENT_CHANNEL(0),
0909 SI1145_CURRENT_CHANNEL(1),
0910 };
0911
0912 static const struct iio_chan_spec si1143_channels[] = {
0913 SI1145_INTENSITY_CHANNEL(0),
0914 SI1145_INTENSITY_IR_CHANNEL(1),
0915 SI1145_PROXIMITY_CHANNEL(2, 0),
0916 SI1145_PROXIMITY_CHANNEL(3, 1),
0917 SI1145_PROXIMITY_CHANNEL(4, 2),
0918 SI1145_TEMP_CHANNEL(5),
0919 SI1145_VOLTAGE_CHANNEL(6),
0920 IIO_CHAN_SOFT_TIMESTAMP(7),
0921 SI1145_CURRENT_CHANNEL(0),
0922 SI1145_CURRENT_CHANNEL(1),
0923 SI1145_CURRENT_CHANNEL(2),
0924 };
0925
0926 static const struct iio_chan_spec si1145_channels[] = {
0927 SI1145_INTENSITY_CHANNEL(0),
0928 SI1145_INTENSITY_IR_CHANNEL(1),
0929 SI1145_PROXIMITY_CHANNEL(2, 0),
0930 SI1145_TEMP_CHANNEL(3),
0931 SI1145_VOLTAGE_CHANNEL(4),
0932 SI1145_UV_CHANNEL(5),
0933 IIO_CHAN_SOFT_TIMESTAMP(6),
0934 SI1145_CURRENT_CHANNEL(0),
0935 };
0936
0937 static const struct iio_chan_spec si1146_channels[] = {
0938 SI1145_INTENSITY_CHANNEL(0),
0939 SI1145_INTENSITY_IR_CHANNEL(1),
0940 SI1145_TEMP_CHANNEL(2),
0941 SI1145_VOLTAGE_CHANNEL(3),
0942 SI1145_UV_CHANNEL(4),
0943 SI1145_PROXIMITY_CHANNEL(5, 0),
0944 SI1145_PROXIMITY_CHANNEL(6, 1),
0945 IIO_CHAN_SOFT_TIMESTAMP(7),
0946 SI1145_CURRENT_CHANNEL(0),
0947 SI1145_CURRENT_CHANNEL(1),
0948 };
0949
0950 static const struct iio_chan_spec si1147_channels[] = {
0951 SI1145_INTENSITY_CHANNEL(0),
0952 SI1145_INTENSITY_IR_CHANNEL(1),
0953 SI1145_PROXIMITY_CHANNEL(2, 0),
0954 SI1145_PROXIMITY_CHANNEL(3, 1),
0955 SI1145_PROXIMITY_CHANNEL(4, 2),
0956 SI1145_TEMP_CHANNEL(5),
0957 SI1145_VOLTAGE_CHANNEL(6),
0958 SI1145_UV_CHANNEL(7),
0959 IIO_CHAN_SOFT_TIMESTAMP(8),
0960 SI1145_CURRENT_CHANNEL(0),
0961 SI1145_CURRENT_CHANNEL(1),
0962 SI1145_CURRENT_CHANNEL(2),
0963 };
0964
0965 static struct attribute *si1132_attributes[] = {
0966 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
0967 &iio_const_attr_in_intensity_ir_scale_available.dev_attr.attr,
0968 NULL,
0969 };
0970
0971 static struct attribute *si114x_attributes[] = {
0972 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
0973 &iio_const_attr_in_intensity_ir_scale_available.dev_attr.attr,
0974 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
0975 NULL,
0976 };
0977
0978 static const struct attribute_group si1132_attribute_group = {
0979 .attrs = si1132_attributes,
0980 };
0981
0982 static const struct attribute_group si114x_attribute_group = {
0983 .attrs = si114x_attributes,
0984 };
0985
0986
0987 static const struct iio_info si1132_info = {
0988 .read_raw = si1145_read_raw,
0989 .write_raw = si1145_write_raw,
0990 .attrs = &si1132_attribute_group,
0991 };
0992
0993 static const struct iio_info si114x_info = {
0994 .read_raw = si1145_read_raw,
0995 .write_raw = si1145_write_raw,
0996 .attrs = &si114x_attribute_group,
0997 };
0998
0999 #define SI1145_PART(id, iio_info, chans, leds, uncompressed_meas_rate) \
1000 {id, iio_info, chans, ARRAY_SIZE(chans), leds, uncompressed_meas_rate}
1001
1002 static const struct si1145_part_info si1145_part_info[] = {
1003 [SI1132] = SI1145_PART(0x32, &si1132_info, si1132_channels, 0, true),
1004 [SI1141] = SI1145_PART(0x41, &si114x_info, si1141_channels, 1, false),
1005 [SI1142] = SI1145_PART(0x42, &si114x_info, si1142_channels, 2, false),
1006 [SI1143] = SI1145_PART(0x43, &si114x_info, si1143_channels, 3, false),
1007 [SI1145] = SI1145_PART(0x45, &si114x_info, si1145_channels, 1, true),
1008 [SI1146] = SI1145_PART(0x46, &si114x_info, si1146_channels, 2, true),
1009 [SI1147] = SI1145_PART(0x47, &si114x_info, si1147_channels, 3, true),
1010 };
1011
1012 static int si1145_initialize(struct si1145_data *data)
1013 {
1014 struct i2c_client *client = data->client;
1015 int ret;
1016
1017 ret = i2c_smbus_write_byte_data(client, SI1145_REG_COMMAND,
1018 SI1145_CMD_RESET);
1019 if (ret < 0)
1020 return ret;
1021 msleep(SI1145_COMMAND_TIMEOUT_MS);
1022
1023
1024 ret = i2c_smbus_write_byte_data(client, SI1145_REG_HW_KEY, 0x17);
1025 if (ret < 0)
1026 return ret;
1027 msleep(SI1145_COMMAND_TIMEOUT_MS);
1028
1029
1030 ret = si1145_set_meas_rate(data, 0);
1031 if (ret < 0)
1032 return ret;
1033
1034
1035 ret = si1145_store_samp_freq(data, 10);
1036 if (ret < 0)
1037 return ret;
1038
1039
1040 switch (data->part_info->num_leds) {
1041 case 3:
1042 ret = i2c_smbus_write_byte_data(client,
1043 SI1145_REG_PS_LED3,
1044 SI1145_LED_CURRENT_45mA);
1045 if (ret < 0)
1046 return ret;
1047 fallthrough;
1048 case 2:
1049 ret = i2c_smbus_write_byte_data(client,
1050 SI1145_REG_PS_LED21,
1051 (SI1145_LED_CURRENT_45mA << 4) |
1052 SI1145_LED_CURRENT_45mA);
1053 break;
1054 case 1:
1055 ret = i2c_smbus_write_byte_data(client,
1056 SI1145_REG_PS_LED21,
1057 SI1145_LED_CURRENT_45mA);
1058 break;
1059 default:
1060 ret = 0;
1061 break;
1062 }
1063 if (ret < 0)
1064 return ret;
1065
1066
1067 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_MISC,
1068 SI1145_PS_ADC_MODE_NORMAL);
1069 if (ret < 0)
1070 return ret;
1071
1072 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_GAIN, 0x01);
1073 if (ret < 0)
1074 return ret;
1075
1076
1077 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_COUNTER, 0x06 << 4);
1078 if (ret < 0)
1079 return ret;
1080
1081
1082 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_MISC,
1083 SI1145_ADC_MISC_RANGE);
1084 if (ret < 0)
1085 return ret;
1086
1087 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_GAIN, 0x03);
1088 if (ret < 0)
1089 return ret;
1090
1091 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_COUNTER,
1092 0x04 << 4);
1093 if (ret < 0)
1094 return ret;
1095
1096
1097 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_MISC,
1098 SI1145_ADC_MISC_RANGE);
1099 if (ret < 0)
1100 return ret;
1101
1102 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_GAIN, 0x01);
1103 if (ret < 0)
1104 return ret;
1105
1106 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_COUNTER,
1107 0x06 << 4);
1108 if (ret < 0)
1109 return ret;
1110
1111
1112
1113
1114
1115 if (data->part_info == &si1145_part_info[SI1132] ||
1116 data->part_info == &si1145_part_info[SI1145] ||
1117 data->part_info == &si1145_part_info[SI1146] ||
1118 data->part_info == &si1145_part_info[SI1147]) {
1119 ret = i2c_smbus_write_byte_data(data->client,
1120 SI1145_REG_UCOEF1,
1121 SI1145_UCOEF1_DEFAULT);
1122 if (ret < 0)
1123 return ret;
1124 ret = i2c_smbus_write_byte_data(data->client,
1125 SI1145_REG_UCOEF2, SI1145_UCOEF2_DEFAULT);
1126 if (ret < 0)
1127 return ret;
1128 ret = i2c_smbus_write_byte_data(data->client,
1129 SI1145_REG_UCOEF3, SI1145_UCOEF3_DEFAULT);
1130 if (ret < 0)
1131 return ret;
1132 ret = i2c_smbus_write_byte_data(data->client,
1133 SI1145_REG_UCOEF4, SI1145_UCOEF4_DEFAULT);
1134 if (ret < 0)
1135 return ret;
1136 }
1137
1138 return 0;
1139 }
1140
1141
1142
1143
1144
1145
1146 static int si1145_buffer_preenable(struct iio_dev *indio_dev)
1147 {
1148 struct si1145_data *data = iio_priv(indio_dev);
1149 int ret;
1150
1151 mutex_lock(&data->lock);
1152 ret = si1145_set_chlist(indio_dev, *indio_dev->active_scan_mask);
1153 mutex_unlock(&data->lock);
1154
1155 return ret;
1156 }
1157
1158 static bool si1145_validate_scan_mask(struct iio_dev *indio_dev,
1159 const unsigned long *scan_mask)
1160 {
1161 struct si1145_data *data = iio_priv(indio_dev);
1162 unsigned int count = 0;
1163 int i;
1164
1165
1166 for_each_set_bit(i, scan_mask, data->part_info->num_channels) {
1167 if (indio_dev->channels[i].address == SI1145_REG_AUX_DATA)
1168 count++;
1169 }
1170
1171 return count <= 1;
1172 }
1173
1174 static const struct iio_buffer_setup_ops si1145_buffer_setup_ops = {
1175 .preenable = si1145_buffer_preenable,
1176 .validate_scan_mask = si1145_validate_scan_mask,
1177 };
1178
1179
1180
1181
1182
1183
1184
1185 static int si1145_trigger_set_state(struct iio_trigger *trig, bool state)
1186 {
1187 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1188 struct si1145_data *data = iio_priv(indio_dev);
1189 int err = 0, ret;
1190
1191 mutex_lock(&data->lock);
1192
1193 if (state) {
1194 data->autonomous = true;
1195 err = i2c_smbus_write_byte_data(data->client,
1196 SI1145_REG_INT_CFG, SI1145_INT_CFG_OE);
1197 if (err < 0)
1198 goto disable;
1199 err = i2c_smbus_write_byte_data(data->client,
1200 SI1145_REG_IRQ_ENABLE, SI1145_MASK_ALL_IE);
1201 if (err < 0)
1202 goto disable;
1203 err = si1145_set_meas_rate(data, data->meas_rate);
1204 if (err < 0)
1205 goto disable;
1206 err = si1145_command(data, SI1145_CMD_PSALS_AUTO);
1207 if (err < 0)
1208 goto disable;
1209 } else {
1210 disable:
1211
1212 ret = si1145_command(data, SI1145_CMD_PSALS_PAUSE);
1213 if (ret < 0 && !err)
1214 err = ret;
1215 ret = si1145_set_meas_rate(data, 0);
1216 if (ret < 0 && !err)
1217 err = ret;
1218 ret = i2c_smbus_write_byte_data(data->client,
1219 SI1145_REG_IRQ_ENABLE, 0);
1220 if (ret < 0 && !err)
1221 err = ret;
1222 ret = i2c_smbus_write_byte_data(data->client,
1223 SI1145_REG_INT_CFG, 0);
1224 if (ret < 0 && !err)
1225 err = ret;
1226 data->autonomous = false;
1227 }
1228
1229 mutex_unlock(&data->lock);
1230 return err;
1231 }
1232
1233 static const struct iio_trigger_ops si1145_trigger_ops = {
1234 .set_trigger_state = si1145_trigger_set_state,
1235 };
1236
1237 static int si1145_probe_trigger(struct iio_dev *indio_dev)
1238 {
1239 struct si1145_data *data = iio_priv(indio_dev);
1240 struct i2c_client *client = data->client;
1241 struct iio_trigger *trig;
1242 int ret;
1243
1244 trig = devm_iio_trigger_alloc(&client->dev,
1245 "%s-dev%d", indio_dev->name, iio_device_id(indio_dev));
1246 if (!trig)
1247 return -ENOMEM;
1248
1249 trig->ops = &si1145_trigger_ops;
1250 iio_trigger_set_drvdata(trig, indio_dev);
1251
1252 ret = devm_request_irq(&client->dev, client->irq,
1253 iio_trigger_generic_data_rdy_poll,
1254 IRQF_TRIGGER_FALLING,
1255 "si1145_irq",
1256 trig);
1257 if (ret < 0) {
1258 dev_err(&client->dev, "irq request failed\n");
1259 return ret;
1260 }
1261
1262 ret = devm_iio_trigger_register(&client->dev, trig);
1263 if (ret)
1264 return ret;
1265
1266 data->trig = trig;
1267 indio_dev->trig = iio_trigger_get(data->trig);
1268
1269 return 0;
1270 }
1271
1272 static int si1145_probe(struct i2c_client *client,
1273 const struct i2c_device_id *id)
1274 {
1275 struct si1145_data *data;
1276 struct iio_dev *indio_dev;
1277 u8 part_id, rev_id, seq_id;
1278 int ret;
1279
1280 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1281 if (!indio_dev)
1282 return -ENOMEM;
1283
1284 data = iio_priv(indio_dev);
1285 i2c_set_clientdata(client, indio_dev);
1286 data->client = client;
1287 data->part_info = &si1145_part_info[id->driver_data];
1288
1289 part_id = ret = i2c_smbus_read_byte_data(data->client,
1290 SI1145_REG_PART_ID);
1291 if (ret < 0)
1292 return ret;
1293 rev_id = ret = i2c_smbus_read_byte_data(data->client,
1294 SI1145_REG_REV_ID);
1295 if (ret < 0)
1296 return ret;
1297 seq_id = ret = i2c_smbus_read_byte_data(data->client,
1298 SI1145_REG_SEQ_ID);
1299 if (ret < 0)
1300 return ret;
1301 dev_info(&client->dev, "device ID part 0x%02x rev 0x%02x seq 0x%02x\n",
1302 part_id, rev_id, seq_id);
1303 if (part_id != data->part_info->part) {
1304 dev_err(&client->dev, "part ID mismatch got 0x%02x, expected 0x%02x\n",
1305 part_id, data->part_info->part);
1306 return -ENODEV;
1307 }
1308
1309 indio_dev->name = id->name;
1310 indio_dev->channels = data->part_info->channels;
1311 indio_dev->num_channels = data->part_info->num_channels;
1312 indio_dev->info = data->part_info->iio_info;
1313 indio_dev->modes = INDIO_DIRECT_MODE;
1314
1315 mutex_init(&data->lock);
1316 mutex_init(&data->cmdlock);
1317
1318 ret = si1145_initialize(data);
1319 if (ret < 0)
1320 return ret;
1321
1322 ret = devm_iio_triggered_buffer_setup(&client->dev,
1323 indio_dev, NULL,
1324 si1145_trigger_handler, &si1145_buffer_setup_ops);
1325 if (ret < 0)
1326 return ret;
1327
1328 if (client->irq) {
1329 ret = si1145_probe_trigger(indio_dev);
1330 if (ret < 0)
1331 return ret;
1332 } else {
1333 dev_info(&client->dev, "no irq, using polling\n");
1334 }
1335
1336 return devm_iio_device_register(&client->dev, indio_dev);
1337 }
1338
1339 static const struct i2c_device_id si1145_ids[] = {
1340 { "si1132", SI1132 },
1341 { "si1141", SI1141 },
1342 { "si1142", SI1142 },
1343 { "si1143", SI1143 },
1344 { "si1145", SI1145 },
1345 { "si1146", SI1146 },
1346 { "si1147", SI1147 },
1347 { }
1348 };
1349 MODULE_DEVICE_TABLE(i2c, si1145_ids);
1350
1351 static struct i2c_driver si1145_driver = {
1352 .driver = {
1353 .name = "si1145",
1354 },
1355 .probe = si1145_probe,
1356 .id_table = si1145_ids,
1357 };
1358
1359 module_i2c_driver(si1145_driver);
1360
1361 MODULE_AUTHOR("Peter Meerwald-Stadler <pmeerw@pmeerw.net>");
1362 MODULE_DESCRIPTION("Silabs SI1132 and SI1141/2/3/5/6/7 proximity, ambient light and UV index sensor driver");
1363 MODULE_LICENSE("GPL");