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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * opt3001.c - Texas Instruments OPT3001 Light Sensor
0004  *
0005  * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Author: Andreas Dannenberg <dannenberg@ti.com>
0008  * Based on previous work from: Felipe Balbi <balbi@ti.com>
0009  */
0010 
0011 #include <linux/bitops.h>
0012 #include <linux/delay.h>
0013 #include <linux/device.h>
0014 #include <linux/i2c.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/irq.h>
0017 #include <linux/kernel.h>
0018 #include <linux/module.h>
0019 #include <linux/mod_devicetable.h>
0020 #include <linux/mutex.h>
0021 #include <linux/slab.h>
0022 #include <linux/types.h>
0023 
0024 #include <linux/iio/events.h>
0025 #include <linux/iio/iio.h>
0026 #include <linux/iio/sysfs.h>
0027 
0028 #define OPT3001_RESULT      0x00
0029 #define OPT3001_CONFIGURATION   0x01
0030 #define OPT3001_LOW_LIMIT   0x02
0031 #define OPT3001_HIGH_LIMIT  0x03
0032 #define OPT3001_MANUFACTURER_ID 0x7e
0033 #define OPT3001_DEVICE_ID   0x7f
0034 
0035 #define OPT3001_CONFIGURATION_RN_MASK   (0xf << 12)
0036 #define OPT3001_CONFIGURATION_RN_AUTO   (0xc << 12)
0037 
0038 #define OPT3001_CONFIGURATION_CT    BIT(11)
0039 
0040 #define OPT3001_CONFIGURATION_M_MASK    (3 << 9)
0041 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
0042 #define OPT3001_CONFIGURATION_M_SINGLE  (1 << 9)
0043 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
0044 
0045 #define OPT3001_CONFIGURATION_OVF   BIT(8)
0046 #define OPT3001_CONFIGURATION_CRF   BIT(7)
0047 #define OPT3001_CONFIGURATION_FH    BIT(6)
0048 #define OPT3001_CONFIGURATION_FL    BIT(5)
0049 #define OPT3001_CONFIGURATION_L     BIT(4)
0050 #define OPT3001_CONFIGURATION_POL   BIT(3)
0051 #define OPT3001_CONFIGURATION_ME    BIT(2)
0052 
0053 #define OPT3001_CONFIGURATION_FC_MASK   (3 << 0)
0054 
0055 /* The end-of-conversion enable is located in the low-limit register */
0056 #define OPT3001_LOW_LIMIT_EOC_ENABLE    0xc000
0057 
0058 #define OPT3001_REG_EXPONENT(n)     ((n) >> 12)
0059 #define OPT3001_REG_MANTISSA(n)     ((n) & 0xfff)
0060 
0061 #define OPT3001_INT_TIME_LONG       800000
0062 #define OPT3001_INT_TIME_SHORT      100000
0063 
0064 /*
0065  * Time to wait for conversion result to be ready. The device datasheet
0066  * sect. 6.5 states results are ready after total integration time plus 3ms.
0067  * This results in worst-case max values of 113ms or 883ms, respectively.
0068  * Add some slack to be on the safe side.
0069  */
0070 #define OPT3001_RESULT_READY_SHORT  150
0071 #define OPT3001_RESULT_READY_LONG   1000
0072 
0073 struct opt3001 {
0074     struct i2c_client   *client;
0075     struct device       *dev;
0076 
0077     struct mutex        lock;
0078     bool            ok_to_ignore_lock;
0079     bool            result_ready;
0080     wait_queue_head_t   result_ready_queue;
0081     u16         result;
0082 
0083     u32         int_time;
0084     u32         mode;
0085 
0086     u16         high_thresh_mantissa;
0087     u16         low_thresh_mantissa;
0088 
0089     u8          high_thresh_exp;
0090     u8          low_thresh_exp;
0091 
0092     bool            use_irq;
0093 };
0094 
0095 struct opt3001_scale {
0096     int val;
0097     int val2;
0098 };
0099 
0100 static const struct opt3001_scale opt3001_scales[] = {
0101     {
0102         .val = 40,
0103         .val2 = 950000,
0104     },
0105     {
0106         .val = 81,
0107         .val2 = 900000,
0108     },
0109     {
0110         .val = 163,
0111         .val2 = 800000,
0112     },
0113     {
0114         .val = 327,
0115         .val2 = 600000,
0116     },
0117     {
0118         .val = 655,
0119         .val2 = 200000,
0120     },
0121     {
0122         .val = 1310,
0123         .val2 = 400000,
0124     },
0125     {
0126         .val = 2620,
0127         .val2 = 800000,
0128     },
0129     {
0130         .val = 5241,
0131         .val2 = 600000,
0132     },
0133     {
0134         .val = 10483,
0135         .val2 = 200000,
0136     },
0137     {
0138         .val = 20966,
0139         .val2 = 400000,
0140     },
0141     {
0142         .val = 83865,
0143         .val2 = 600000,
0144     },
0145 };
0146 
0147 static int opt3001_find_scale(const struct opt3001 *opt, int val,
0148         int val2, u8 *exponent)
0149 {
0150     int i;
0151 
0152     for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
0153         const struct opt3001_scale *scale = &opt3001_scales[i];
0154 
0155         /*
0156          * Combine the integer and micro parts for comparison
0157          * purposes. Use milli lux precision to avoid 32-bit integer
0158          * overflows.
0159          */
0160         if ((val * 1000 + val2 / 1000) <=
0161                 (scale->val * 1000 + scale->val2 / 1000)) {
0162             *exponent = i;
0163             return 0;
0164         }
0165     }
0166 
0167     return -EINVAL;
0168 }
0169 
0170 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
0171         u16 mantissa, int *val, int *val2)
0172 {
0173     int lux;
0174 
0175     lux = 10 * (mantissa << exponent);
0176     *val = lux / 1000;
0177     *val2 = (lux - (*val * 1000)) * 1000;
0178 }
0179 
0180 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
0181 {
0182     *reg &= ~OPT3001_CONFIGURATION_M_MASK;
0183     *reg |= mode;
0184     opt->mode = mode;
0185 }
0186 
0187 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
0188 
0189 static struct attribute *opt3001_attributes[] = {
0190     &iio_const_attr_integration_time_available.dev_attr.attr,
0191     NULL
0192 };
0193 
0194 static const struct attribute_group opt3001_attribute_group = {
0195     .attrs = opt3001_attributes,
0196 };
0197 
0198 static const struct iio_event_spec opt3001_event_spec[] = {
0199     {
0200         .type = IIO_EV_TYPE_THRESH,
0201         .dir = IIO_EV_DIR_RISING,
0202         .mask_separate = BIT(IIO_EV_INFO_VALUE) |
0203             BIT(IIO_EV_INFO_ENABLE),
0204     },
0205     {
0206         .type = IIO_EV_TYPE_THRESH,
0207         .dir = IIO_EV_DIR_FALLING,
0208         .mask_separate = BIT(IIO_EV_INFO_VALUE) |
0209             BIT(IIO_EV_INFO_ENABLE),
0210     },
0211 };
0212 
0213 static const struct iio_chan_spec opt3001_channels[] = {
0214     {
0215         .type = IIO_LIGHT,
0216         .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
0217                 BIT(IIO_CHAN_INFO_INT_TIME),
0218         .event_spec = opt3001_event_spec,
0219         .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
0220     },
0221     IIO_CHAN_SOFT_TIMESTAMP(1),
0222 };
0223 
0224 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
0225 {
0226     int ret;
0227     u16 mantissa;
0228     u16 reg;
0229     u8 exponent;
0230     u16 value;
0231     long timeout;
0232 
0233     if (opt->use_irq) {
0234         /*
0235          * Enable the end-of-conversion interrupt mechanism. Note that
0236          * doing so will overwrite the low-level limit value however we
0237          * will restore this value later on.
0238          */
0239         ret = i2c_smbus_write_word_swapped(opt->client,
0240                     OPT3001_LOW_LIMIT,
0241                     OPT3001_LOW_LIMIT_EOC_ENABLE);
0242         if (ret < 0) {
0243             dev_err(opt->dev, "failed to write register %02x\n",
0244                     OPT3001_LOW_LIMIT);
0245             return ret;
0246         }
0247 
0248         /* Allow IRQ to access the device despite lock being set */
0249         opt->ok_to_ignore_lock = true;
0250     }
0251 
0252     /* Reset data-ready indicator flag */
0253     opt->result_ready = false;
0254 
0255     /* Configure for single-conversion mode and start a new conversion */
0256     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0257     if (ret < 0) {
0258         dev_err(opt->dev, "failed to read register %02x\n",
0259                 OPT3001_CONFIGURATION);
0260         goto err;
0261     }
0262 
0263     reg = ret;
0264     opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);
0265 
0266     ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
0267             reg);
0268     if (ret < 0) {
0269         dev_err(opt->dev, "failed to write register %02x\n",
0270                 OPT3001_CONFIGURATION);
0271         goto err;
0272     }
0273 
0274     if (opt->use_irq) {
0275         /* Wait for the IRQ to indicate the conversion is complete */
0276         ret = wait_event_timeout(opt->result_ready_queue,
0277                 opt->result_ready,
0278                 msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
0279         if (ret == 0)
0280             return -ETIMEDOUT;
0281     } else {
0282         /* Sleep for result ready time */
0283         timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
0284             OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
0285         msleep(timeout);
0286 
0287         /* Check result ready flag */
0288         ret = i2c_smbus_read_word_swapped(opt->client,
0289                           OPT3001_CONFIGURATION);
0290         if (ret < 0) {
0291             dev_err(opt->dev, "failed to read register %02x\n",
0292                 OPT3001_CONFIGURATION);
0293             goto err;
0294         }
0295 
0296         if (!(ret & OPT3001_CONFIGURATION_CRF)) {
0297             ret = -ETIMEDOUT;
0298             goto err;
0299         }
0300 
0301         /* Obtain value */
0302         ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
0303         if (ret < 0) {
0304             dev_err(opt->dev, "failed to read register %02x\n",
0305                 OPT3001_RESULT);
0306             goto err;
0307         }
0308         opt->result = ret;
0309         opt->result_ready = true;
0310     }
0311 
0312 err:
0313     if (opt->use_irq)
0314         /* Disallow IRQ to access the device while lock is active */
0315         opt->ok_to_ignore_lock = false;
0316 
0317     if (ret < 0)
0318         return ret;
0319 
0320     if (opt->use_irq) {
0321         /*
0322          * Disable the end-of-conversion interrupt mechanism by
0323          * restoring the low-level limit value (clearing
0324          * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
0325          * those enable bits would affect the actual limit value due to
0326          * bit-overlap and therefore can't be done.
0327          */
0328         value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
0329         ret = i2c_smbus_write_word_swapped(opt->client,
0330                            OPT3001_LOW_LIMIT,
0331                            value);
0332         if (ret < 0) {
0333             dev_err(opt->dev, "failed to write register %02x\n",
0334                     OPT3001_LOW_LIMIT);
0335             return ret;
0336         }
0337     }
0338 
0339     exponent = OPT3001_REG_EXPONENT(opt->result);
0340     mantissa = OPT3001_REG_MANTISSA(opt->result);
0341 
0342     opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
0343 
0344     return IIO_VAL_INT_PLUS_MICRO;
0345 }
0346 
0347 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
0348 {
0349     *val = 0;
0350     *val2 = opt->int_time;
0351 
0352     return IIO_VAL_INT_PLUS_MICRO;
0353 }
0354 
0355 static int opt3001_set_int_time(struct opt3001 *opt, int time)
0356 {
0357     int ret;
0358     u16 reg;
0359 
0360     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0361     if (ret < 0) {
0362         dev_err(opt->dev, "failed to read register %02x\n",
0363                 OPT3001_CONFIGURATION);
0364         return ret;
0365     }
0366 
0367     reg = ret;
0368 
0369     switch (time) {
0370     case OPT3001_INT_TIME_SHORT:
0371         reg &= ~OPT3001_CONFIGURATION_CT;
0372         opt->int_time = OPT3001_INT_TIME_SHORT;
0373         break;
0374     case OPT3001_INT_TIME_LONG:
0375         reg |= OPT3001_CONFIGURATION_CT;
0376         opt->int_time = OPT3001_INT_TIME_LONG;
0377         break;
0378     default:
0379         return -EINVAL;
0380     }
0381 
0382     return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
0383             reg);
0384 }
0385 
0386 static int opt3001_read_raw(struct iio_dev *iio,
0387         struct iio_chan_spec const *chan, int *val, int *val2,
0388         long mask)
0389 {
0390     struct opt3001 *opt = iio_priv(iio);
0391     int ret;
0392 
0393     if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
0394         return -EBUSY;
0395 
0396     if (chan->type != IIO_LIGHT)
0397         return -EINVAL;
0398 
0399     mutex_lock(&opt->lock);
0400 
0401     switch (mask) {
0402     case IIO_CHAN_INFO_PROCESSED:
0403         ret = opt3001_get_lux(opt, val, val2);
0404         break;
0405     case IIO_CHAN_INFO_INT_TIME:
0406         ret = opt3001_get_int_time(opt, val, val2);
0407         break;
0408     default:
0409         ret = -EINVAL;
0410     }
0411 
0412     mutex_unlock(&opt->lock);
0413 
0414     return ret;
0415 }
0416 
0417 static int opt3001_write_raw(struct iio_dev *iio,
0418         struct iio_chan_spec const *chan, int val, int val2,
0419         long mask)
0420 {
0421     struct opt3001 *opt = iio_priv(iio);
0422     int ret;
0423 
0424     if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
0425         return -EBUSY;
0426 
0427     if (chan->type != IIO_LIGHT)
0428         return -EINVAL;
0429 
0430     if (mask != IIO_CHAN_INFO_INT_TIME)
0431         return -EINVAL;
0432 
0433     if (val != 0)
0434         return -EINVAL;
0435 
0436     mutex_lock(&opt->lock);
0437     ret = opt3001_set_int_time(opt, val2);
0438     mutex_unlock(&opt->lock);
0439 
0440     return ret;
0441 }
0442 
0443 static int opt3001_read_event_value(struct iio_dev *iio,
0444         const struct iio_chan_spec *chan, enum iio_event_type type,
0445         enum iio_event_direction dir, enum iio_event_info info,
0446         int *val, int *val2)
0447 {
0448     struct opt3001 *opt = iio_priv(iio);
0449     int ret = IIO_VAL_INT_PLUS_MICRO;
0450 
0451     mutex_lock(&opt->lock);
0452 
0453     switch (dir) {
0454     case IIO_EV_DIR_RISING:
0455         opt3001_to_iio_ret(opt, opt->high_thresh_exp,
0456                 opt->high_thresh_mantissa, val, val2);
0457         break;
0458     case IIO_EV_DIR_FALLING:
0459         opt3001_to_iio_ret(opt, opt->low_thresh_exp,
0460                 opt->low_thresh_mantissa, val, val2);
0461         break;
0462     default:
0463         ret = -EINVAL;
0464     }
0465 
0466     mutex_unlock(&opt->lock);
0467 
0468     return ret;
0469 }
0470 
0471 static int opt3001_write_event_value(struct iio_dev *iio,
0472         const struct iio_chan_spec *chan, enum iio_event_type type,
0473         enum iio_event_direction dir, enum iio_event_info info,
0474         int val, int val2)
0475 {
0476     struct opt3001 *opt = iio_priv(iio);
0477     int ret;
0478 
0479     u16 mantissa;
0480     u16 value;
0481     u16 reg;
0482 
0483     u8 exponent;
0484 
0485     if (val < 0)
0486         return -EINVAL;
0487 
0488     mutex_lock(&opt->lock);
0489 
0490     ret = opt3001_find_scale(opt, val, val2, &exponent);
0491     if (ret < 0) {
0492         dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
0493         goto err;
0494     }
0495 
0496     mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
0497     value = (exponent << 12) | mantissa;
0498 
0499     switch (dir) {
0500     case IIO_EV_DIR_RISING:
0501         reg = OPT3001_HIGH_LIMIT;
0502         opt->high_thresh_mantissa = mantissa;
0503         opt->high_thresh_exp = exponent;
0504         break;
0505     case IIO_EV_DIR_FALLING:
0506         reg = OPT3001_LOW_LIMIT;
0507         opt->low_thresh_mantissa = mantissa;
0508         opt->low_thresh_exp = exponent;
0509         break;
0510     default:
0511         ret = -EINVAL;
0512         goto err;
0513     }
0514 
0515     ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
0516     if (ret < 0) {
0517         dev_err(opt->dev, "failed to write register %02x\n", reg);
0518         goto err;
0519     }
0520 
0521 err:
0522     mutex_unlock(&opt->lock);
0523 
0524     return ret;
0525 }
0526 
0527 static int opt3001_read_event_config(struct iio_dev *iio,
0528         const struct iio_chan_spec *chan, enum iio_event_type type,
0529         enum iio_event_direction dir)
0530 {
0531     struct opt3001 *opt = iio_priv(iio);
0532 
0533     return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
0534 }
0535 
0536 static int opt3001_write_event_config(struct iio_dev *iio,
0537         const struct iio_chan_spec *chan, enum iio_event_type type,
0538         enum iio_event_direction dir, int state)
0539 {
0540     struct opt3001 *opt = iio_priv(iio);
0541     int ret;
0542     u16 mode;
0543     u16 reg;
0544 
0545     if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
0546         return 0;
0547 
0548     if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
0549         return 0;
0550 
0551     mutex_lock(&opt->lock);
0552 
0553     mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
0554         : OPT3001_CONFIGURATION_M_SHUTDOWN;
0555 
0556     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0557     if (ret < 0) {
0558         dev_err(opt->dev, "failed to read register %02x\n",
0559                 OPT3001_CONFIGURATION);
0560         goto err;
0561     }
0562 
0563     reg = ret;
0564     opt3001_set_mode(opt, &reg, mode);
0565 
0566     ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
0567             reg);
0568     if (ret < 0) {
0569         dev_err(opt->dev, "failed to write register %02x\n",
0570                 OPT3001_CONFIGURATION);
0571         goto err;
0572     }
0573 
0574 err:
0575     mutex_unlock(&opt->lock);
0576 
0577     return ret;
0578 }
0579 
0580 static const struct iio_info opt3001_info = {
0581     .attrs = &opt3001_attribute_group,
0582     .read_raw = opt3001_read_raw,
0583     .write_raw = opt3001_write_raw,
0584     .read_event_value = opt3001_read_event_value,
0585     .write_event_value = opt3001_write_event_value,
0586     .read_event_config = opt3001_read_event_config,
0587     .write_event_config = opt3001_write_event_config,
0588 };
0589 
0590 static int opt3001_read_id(struct opt3001 *opt)
0591 {
0592     char manufacturer[2];
0593     u16 device_id;
0594     int ret;
0595 
0596     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
0597     if (ret < 0) {
0598         dev_err(opt->dev, "failed to read register %02x\n",
0599                 OPT3001_MANUFACTURER_ID);
0600         return ret;
0601     }
0602 
0603     manufacturer[0] = ret >> 8;
0604     manufacturer[1] = ret & 0xff;
0605 
0606     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
0607     if (ret < 0) {
0608         dev_err(opt->dev, "failed to read register %02x\n",
0609                 OPT3001_DEVICE_ID);
0610         return ret;
0611     }
0612 
0613     device_id = ret;
0614 
0615     dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
0616             manufacturer[1], device_id);
0617 
0618     return 0;
0619 }
0620 
0621 static int opt3001_configure(struct opt3001 *opt)
0622 {
0623     int ret;
0624     u16 reg;
0625 
0626     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0627     if (ret < 0) {
0628         dev_err(opt->dev, "failed to read register %02x\n",
0629                 OPT3001_CONFIGURATION);
0630         return ret;
0631     }
0632 
0633     reg = ret;
0634 
0635     /* Enable automatic full-scale setting mode */
0636     reg &= ~OPT3001_CONFIGURATION_RN_MASK;
0637     reg |= OPT3001_CONFIGURATION_RN_AUTO;
0638 
0639     /* Reflect status of the device's integration time setting */
0640     if (reg & OPT3001_CONFIGURATION_CT)
0641         opt->int_time = OPT3001_INT_TIME_LONG;
0642     else
0643         opt->int_time = OPT3001_INT_TIME_SHORT;
0644 
0645     /* Ensure device is in shutdown initially */
0646     opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
0647 
0648     /* Configure for latched window-style comparison operation */
0649     reg |= OPT3001_CONFIGURATION_L;
0650     reg &= ~OPT3001_CONFIGURATION_POL;
0651     reg &= ~OPT3001_CONFIGURATION_ME;
0652     reg &= ~OPT3001_CONFIGURATION_FC_MASK;
0653 
0654     ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
0655             reg);
0656     if (ret < 0) {
0657         dev_err(opt->dev, "failed to write register %02x\n",
0658                 OPT3001_CONFIGURATION);
0659         return ret;
0660     }
0661 
0662     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
0663     if (ret < 0) {
0664         dev_err(opt->dev, "failed to read register %02x\n",
0665                 OPT3001_LOW_LIMIT);
0666         return ret;
0667     }
0668 
0669     opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
0670     opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
0671 
0672     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
0673     if (ret < 0) {
0674         dev_err(opt->dev, "failed to read register %02x\n",
0675                 OPT3001_HIGH_LIMIT);
0676         return ret;
0677     }
0678 
0679     opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
0680     opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
0681 
0682     return 0;
0683 }
0684 
0685 static irqreturn_t opt3001_irq(int irq, void *_iio)
0686 {
0687     struct iio_dev *iio = _iio;
0688     struct opt3001 *opt = iio_priv(iio);
0689     int ret;
0690     bool wake_result_ready_queue = false;
0691 
0692     if (!opt->ok_to_ignore_lock)
0693         mutex_lock(&opt->lock);
0694 
0695     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0696     if (ret < 0) {
0697         dev_err(opt->dev, "failed to read register %02x\n",
0698                 OPT3001_CONFIGURATION);
0699         goto out;
0700     }
0701 
0702     if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
0703             OPT3001_CONFIGURATION_M_CONTINUOUS) {
0704         if (ret & OPT3001_CONFIGURATION_FH)
0705             iio_push_event(iio,
0706                     IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
0707                             IIO_EV_TYPE_THRESH,
0708                             IIO_EV_DIR_RISING),
0709                     iio_get_time_ns(iio));
0710         if (ret & OPT3001_CONFIGURATION_FL)
0711             iio_push_event(iio,
0712                     IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
0713                             IIO_EV_TYPE_THRESH,
0714                             IIO_EV_DIR_FALLING),
0715                     iio_get_time_ns(iio));
0716     } else if (ret & OPT3001_CONFIGURATION_CRF) {
0717         ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
0718         if (ret < 0) {
0719             dev_err(opt->dev, "failed to read register %02x\n",
0720                     OPT3001_RESULT);
0721             goto out;
0722         }
0723         opt->result = ret;
0724         opt->result_ready = true;
0725         wake_result_ready_queue = true;
0726     }
0727 
0728 out:
0729     if (!opt->ok_to_ignore_lock)
0730         mutex_unlock(&opt->lock);
0731 
0732     if (wake_result_ready_queue)
0733         wake_up(&opt->result_ready_queue);
0734 
0735     return IRQ_HANDLED;
0736 }
0737 
0738 static int opt3001_probe(struct i2c_client *client,
0739         const struct i2c_device_id *id)
0740 {
0741     struct device *dev = &client->dev;
0742 
0743     struct iio_dev *iio;
0744     struct opt3001 *opt;
0745     int irq = client->irq;
0746     int ret;
0747 
0748     iio = devm_iio_device_alloc(dev, sizeof(*opt));
0749     if (!iio)
0750         return -ENOMEM;
0751 
0752     opt = iio_priv(iio);
0753     opt->client = client;
0754     opt->dev = dev;
0755 
0756     mutex_init(&opt->lock);
0757     init_waitqueue_head(&opt->result_ready_queue);
0758     i2c_set_clientdata(client, iio);
0759 
0760     ret = opt3001_read_id(opt);
0761     if (ret)
0762         return ret;
0763 
0764     ret = opt3001_configure(opt);
0765     if (ret)
0766         return ret;
0767 
0768     iio->name = client->name;
0769     iio->channels = opt3001_channels;
0770     iio->num_channels = ARRAY_SIZE(opt3001_channels);
0771     iio->modes = INDIO_DIRECT_MODE;
0772     iio->info = &opt3001_info;
0773 
0774     ret = devm_iio_device_register(dev, iio);
0775     if (ret) {
0776         dev_err(dev, "failed to register IIO device\n");
0777         return ret;
0778     }
0779 
0780     /* Make use of INT pin only if valid IRQ no. is given */
0781     if (irq > 0) {
0782         ret = request_threaded_irq(irq, NULL, opt3001_irq,
0783                 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
0784                 "opt3001", iio);
0785         if (ret) {
0786             dev_err(dev, "failed to request IRQ #%d\n", irq);
0787             return ret;
0788         }
0789         opt->use_irq = true;
0790     } else {
0791         dev_dbg(opt->dev, "enabling interrupt-less operation\n");
0792     }
0793 
0794     return 0;
0795 }
0796 
0797 static int opt3001_remove(struct i2c_client *client)
0798 {
0799     struct iio_dev *iio = i2c_get_clientdata(client);
0800     struct opt3001 *opt = iio_priv(iio);
0801     int ret;
0802     u16 reg;
0803 
0804     if (opt->use_irq)
0805         free_irq(client->irq, iio);
0806 
0807     ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
0808     if (ret < 0) {
0809         dev_err(opt->dev, "failed to read register %02x\n",
0810                 OPT3001_CONFIGURATION);
0811         return 0;
0812     }
0813 
0814     reg = ret;
0815     opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
0816 
0817     ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
0818             reg);
0819     if (ret < 0) {
0820         dev_err(opt->dev, "failed to write register %02x\n",
0821                 OPT3001_CONFIGURATION);
0822     }
0823 
0824     return 0;
0825 }
0826 
0827 static const struct i2c_device_id opt3001_id[] = {
0828     { "opt3001", 0 },
0829     { } /* Terminating Entry */
0830 };
0831 MODULE_DEVICE_TABLE(i2c, opt3001_id);
0832 
0833 static const struct of_device_id opt3001_of_match[] = {
0834     { .compatible = "ti,opt3001" },
0835     { }
0836 };
0837 MODULE_DEVICE_TABLE(of, opt3001_of_match);
0838 
0839 static struct i2c_driver opt3001_driver = {
0840     .probe = opt3001_probe,
0841     .remove = opt3001_remove,
0842     .id_table = opt3001_id,
0843 
0844     .driver = {
0845         .name = "opt3001",
0846         .of_match_table = opt3001_of_match,
0847     },
0848 };
0849 
0850 module_i2c_driver(opt3001_driver);
0851 
0852 MODULE_LICENSE("GPL v2");
0853 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
0854 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");
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