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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Support for Lite-On LTR501 and similar ambient light and proximity sensors.
0004  *
0005  * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
0006  *
0007  * 7-bit I2C slave address 0x23
0008  *
0009  * TODO: IR LED characteristics
0010  */
0011 
0012 #include <linux/module.h>
0013 #include <linux/i2c.h>
0014 #include <linux/err.h>
0015 #include <linux/delay.h>
0016 #include <linux/regmap.h>
0017 #include <linux/acpi.h>
0018 #include <linux/regulator/consumer.h>
0019 
0020 #include <linux/iio/iio.h>
0021 #include <linux/iio/events.h>
0022 #include <linux/iio/sysfs.h>
0023 #include <linux/iio/trigger_consumer.h>
0024 #include <linux/iio/buffer.h>
0025 #include <linux/iio/triggered_buffer.h>
0026 
0027 #define LTR501_DRV_NAME "ltr501"
0028 
0029 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
0030 #define LTR501_PS_CONTR 0x81 /* PS operation mode */
0031 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
0032 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
0033 #define LTR501_PART_ID 0x86
0034 #define LTR501_MANUFAC_ID 0x87
0035 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
0036 #define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */
0037 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
0038 #define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */
0039 #define LTR501_ALS_PS_STATUS 0x8c
0040 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
0041 #define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */
0042 #define LTR501_INTR 0x8f /* output mode, polarity, mode */
0043 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
0044 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
0045 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
0046 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
0047 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
0048 #define LTR501_MAX_REG 0x9f
0049 
0050 #define LTR501_ALS_CONTR_SW_RESET BIT(2)
0051 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
0052 #define LTR501_CONTR_PS_GAIN_SHIFT 2
0053 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
0054 #define LTR501_CONTR_ACTIVE BIT(1)
0055 
0056 #define LTR501_STATUS_ALS_INTR BIT(3)
0057 #define LTR501_STATUS_ALS_RDY BIT(2)
0058 #define LTR501_STATUS_PS_INTR BIT(1)
0059 #define LTR501_STATUS_PS_RDY BIT(0)
0060 
0061 #define LTR501_PS_DATA_MASK 0x7ff
0062 #define LTR501_PS_THRESH_MASK 0x7ff
0063 #define LTR501_ALS_THRESH_MASK 0xffff
0064 
0065 #define LTR501_ALS_DEF_PERIOD 500000
0066 #define LTR501_PS_DEF_PERIOD 100000
0067 
0068 #define LTR501_REGMAP_NAME "ltr501_regmap"
0069 
0070 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
0071             ((vis_coeff * vis_data) - (ir_coeff * ir_data))
0072 
0073 static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
0074 
0075 static const struct reg_field reg_field_it =
0076                 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
0077 static const struct reg_field reg_field_als_intr =
0078                 REG_FIELD(LTR501_INTR, 1, 1);
0079 static const struct reg_field reg_field_ps_intr =
0080                 REG_FIELD(LTR501_INTR, 0, 0);
0081 static const struct reg_field reg_field_als_rate =
0082                 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
0083 static const struct reg_field reg_field_ps_rate =
0084                 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
0085 static const struct reg_field reg_field_als_prst =
0086                 REG_FIELD(LTR501_INTR_PRST, 0, 3);
0087 static const struct reg_field reg_field_ps_prst =
0088                 REG_FIELD(LTR501_INTR_PRST, 4, 7);
0089 
0090 struct ltr501_samp_table {
0091     int freq_val;  /* repetition frequency in micro HZ*/
0092     int time_val; /* repetition rate in micro seconds */
0093 };
0094 
0095 #define LTR501_RESERVED_GAIN -1
0096 
0097 enum {
0098     ltr501 = 0,
0099     ltr559,
0100     ltr301,
0101     ltr303,
0102 };
0103 
0104 struct ltr501_gain {
0105     int scale;
0106     int uscale;
0107 };
0108 
0109 static const struct ltr501_gain ltr501_als_gain_tbl[] = {
0110     {1, 0},
0111     {0, 5000},
0112 };
0113 
0114 static const struct ltr501_gain ltr559_als_gain_tbl[] = {
0115     {1, 0},
0116     {0, 500000},
0117     {0, 250000},
0118     {0, 125000},
0119     {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
0120     {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
0121     {0, 20000},
0122     {0, 10000},
0123 };
0124 
0125 static const struct ltr501_gain ltr501_ps_gain_tbl[] = {
0126     {1, 0},
0127     {0, 250000},
0128     {0, 125000},
0129     {0, 62500},
0130 };
0131 
0132 static const struct ltr501_gain ltr559_ps_gain_tbl[] = {
0133     {0, 62500}, /* x16 gain */
0134     {0, 31250}, /* x32 gain */
0135     {0, 15625}, /* bits X1 are for x64 gain */
0136     {0, 15624},
0137 };
0138 
0139 struct ltr501_chip_info {
0140     u8 partid;
0141     const struct ltr501_gain *als_gain;
0142     int als_gain_tbl_size;
0143     const struct ltr501_gain *ps_gain;
0144     int ps_gain_tbl_size;
0145     u8 als_mode_active;
0146     u8 als_gain_mask;
0147     u8 als_gain_shift;
0148     struct iio_chan_spec const *channels;
0149     const int no_channels;
0150     const struct iio_info *info;
0151     const struct iio_info *info_no_irq;
0152 };
0153 
0154 struct ltr501_data {
0155     struct i2c_client *client;
0156     struct regulator_bulk_data regulators[2];
0157     struct mutex lock_als, lock_ps;
0158     const struct ltr501_chip_info *chip_info;
0159     u8 als_contr, ps_contr;
0160     int als_period, ps_period; /* period in micro seconds */
0161     struct regmap *regmap;
0162     struct regmap_field *reg_it;
0163     struct regmap_field *reg_als_intr;
0164     struct regmap_field *reg_ps_intr;
0165     struct regmap_field *reg_als_rate;
0166     struct regmap_field *reg_ps_rate;
0167     struct regmap_field *reg_als_prst;
0168     struct regmap_field *reg_ps_prst;
0169     uint32_t near_level;
0170 };
0171 
0172 static const struct ltr501_samp_table ltr501_als_samp_table[] = {
0173             {20000000, 50000}, {10000000, 100000},
0174             {5000000, 200000}, {2000000, 500000},
0175             {1000000, 1000000}, {500000, 2000000},
0176             {500000, 2000000}, {500000, 2000000}
0177 };
0178 
0179 static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
0180             {20000000, 50000}, {14285714, 70000},
0181             {10000000, 100000}, {5000000, 200000},
0182             {2000000, 500000}, {1000000, 1000000},
0183             {500000, 2000000}, {500000, 2000000},
0184             {500000, 2000000}
0185 };
0186 
0187 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
0188                        int len, int val, int val2)
0189 {
0190     int i, freq;
0191 
0192     freq = val * 1000000 + val2;
0193 
0194     for (i = 0; i < len; i++) {
0195         if (tab[i].freq_val == freq)
0196             return i;
0197     }
0198 
0199     return -EINVAL;
0200 }
0201 
0202 static int ltr501_als_read_samp_freq(const struct ltr501_data *data,
0203                      int *val, int *val2)
0204 {
0205     int ret, i;
0206 
0207     ret = regmap_field_read(data->reg_als_rate, &i);
0208     if (ret < 0)
0209         return ret;
0210 
0211     if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
0212         return -EINVAL;
0213 
0214     *val = ltr501_als_samp_table[i].freq_val / 1000000;
0215     *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
0216 
0217     return IIO_VAL_INT_PLUS_MICRO;
0218 }
0219 
0220 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data,
0221                     int *val, int *val2)
0222 {
0223     int ret, i;
0224 
0225     ret = regmap_field_read(data->reg_ps_rate, &i);
0226     if (ret < 0)
0227         return ret;
0228 
0229     if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
0230         return -EINVAL;
0231 
0232     *val = ltr501_ps_samp_table[i].freq_val / 1000000;
0233     *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
0234 
0235     return IIO_VAL_INT_PLUS_MICRO;
0236 }
0237 
0238 static int ltr501_als_write_samp_freq(struct ltr501_data *data,
0239                       int val, int val2)
0240 {
0241     int i, ret;
0242 
0243     i = ltr501_match_samp_freq(ltr501_als_samp_table,
0244                    ARRAY_SIZE(ltr501_als_samp_table),
0245                    val, val2);
0246 
0247     if (i < 0)
0248         return i;
0249 
0250     mutex_lock(&data->lock_als);
0251     ret = regmap_field_write(data->reg_als_rate, i);
0252     mutex_unlock(&data->lock_als);
0253 
0254     return ret;
0255 }
0256 
0257 static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
0258                      int val, int val2)
0259 {
0260     int i, ret;
0261 
0262     i = ltr501_match_samp_freq(ltr501_ps_samp_table,
0263                    ARRAY_SIZE(ltr501_ps_samp_table),
0264                    val, val2);
0265 
0266     if (i < 0)
0267         return i;
0268 
0269     mutex_lock(&data->lock_ps);
0270     ret = regmap_field_write(data->reg_ps_rate, i);
0271     mutex_unlock(&data->lock_ps);
0272 
0273     return ret;
0274 }
0275 
0276 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val)
0277 {
0278     int ret, i;
0279 
0280     ret = regmap_field_read(data->reg_als_rate, &i);
0281     if (ret < 0)
0282         return ret;
0283 
0284     if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
0285         return -EINVAL;
0286 
0287     *val = ltr501_als_samp_table[i].time_val;
0288 
0289     return IIO_VAL_INT;
0290 }
0291 
0292 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val)
0293 {
0294     int ret, i;
0295 
0296     ret = regmap_field_read(data->reg_ps_rate, &i);
0297     if (ret < 0)
0298         return ret;
0299 
0300     if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
0301         return -EINVAL;
0302 
0303     *val = ltr501_ps_samp_table[i].time_val;
0304 
0305     return IIO_VAL_INT;
0306 }
0307 
0308 /* IR and visible spectrum coeff's are given in data sheet */
0309 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
0310 {
0311     unsigned long ratio, lux;
0312 
0313     if (vis_data == 0)
0314         return 0;
0315 
0316     /* multiply numerator by 100 to avoid handling ratio < 1 */
0317     ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
0318 
0319     if (ratio < 45)
0320         lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
0321     else if (ratio >= 45 && ratio < 64)
0322         lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
0323     else if (ratio >= 64 && ratio < 85)
0324         lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
0325     else
0326         lux = 0;
0327 
0328     return lux / 1000;
0329 }
0330 
0331 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask)
0332 {
0333     int tries = 100;
0334     int ret, status;
0335 
0336     while (tries--) {
0337         ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
0338         if (ret < 0)
0339             return ret;
0340         if ((status & drdy_mask) == drdy_mask)
0341             return 0;
0342         msleep(25);
0343     }
0344 
0345     dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
0346     return -EIO;
0347 }
0348 
0349 static int ltr501_set_it_time(struct ltr501_data *data, int it)
0350 {
0351     int ret, i, index = -1, status;
0352 
0353     for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
0354         if (int_time_mapping[i] == it) {
0355             index = i;
0356             break;
0357         }
0358     }
0359     /* Make sure integ time index is valid */
0360     if (index < 0)
0361         return -EINVAL;
0362 
0363     ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
0364     if (ret < 0)
0365         return ret;
0366 
0367     if (status & LTR501_CONTR_ALS_GAIN_MASK) {
0368         /*
0369          * 200 ms and 400 ms integ time can only be
0370          * used in dynamic range 1
0371          */
0372         if (index > 1)
0373             return -EINVAL;
0374     } else
0375         /* 50 ms integ time can only be used in dynamic range 2 */
0376         if (index == 1)
0377             return -EINVAL;
0378 
0379     return regmap_field_write(data->reg_it, index);
0380 }
0381 
0382 /* read int time in micro seconds */
0383 static int ltr501_read_it_time(const struct ltr501_data *data,
0384                    int *val, int *val2)
0385 {
0386     int ret, index;
0387 
0388     ret = regmap_field_read(data->reg_it, &index);
0389     if (ret < 0)
0390         return ret;
0391 
0392     /* Make sure integ time index is valid */
0393     if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
0394         return -EINVAL;
0395 
0396     *val2 = int_time_mapping[index];
0397     *val = 0;
0398 
0399     return IIO_VAL_INT_PLUS_MICRO;
0400 }
0401 
0402 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2])
0403 {
0404     int ret;
0405 
0406     ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
0407     if (ret < 0)
0408         return ret;
0409     /* always read both ALS channels in given order */
0410     return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
0411                 buf, 2 * sizeof(__le16));
0412 }
0413 
0414 static int ltr501_read_ps(const struct ltr501_data *data)
0415 {
0416     __le16 status;
0417     int ret;
0418 
0419     ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
0420     if (ret < 0)
0421         return ret;
0422 
0423     ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
0424                    &status, sizeof(status));
0425     if (ret < 0)
0426         return ret;
0427 
0428     return le16_to_cpu(status);
0429 }
0430 
0431 static int ltr501_read_intr_prst(const struct ltr501_data *data,
0432                  enum iio_chan_type type,
0433                  int *val2)
0434 {
0435     int ret, samp_period, prst;
0436 
0437     switch (type) {
0438     case IIO_INTENSITY:
0439         ret = regmap_field_read(data->reg_als_prst, &prst);
0440         if (ret < 0)
0441             return ret;
0442 
0443         ret = ltr501_als_read_samp_period(data, &samp_period);
0444 
0445         if (ret < 0)
0446             return ret;
0447         *val2 = samp_period * prst;
0448         return IIO_VAL_INT_PLUS_MICRO;
0449     case IIO_PROXIMITY:
0450         ret = regmap_field_read(data->reg_ps_prst, &prst);
0451         if (ret < 0)
0452             return ret;
0453 
0454         ret = ltr501_ps_read_samp_period(data, &samp_period);
0455 
0456         if (ret < 0)
0457             return ret;
0458 
0459         *val2 = samp_period * prst;
0460         return IIO_VAL_INT_PLUS_MICRO;
0461     default:
0462         return -EINVAL;
0463     }
0464 
0465     return -EINVAL;
0466 }
0467 
0468 static int ltr501_write_intr_prst(struct ltr501_data *data,
0469                   enum iio_chan_type type,
0470                   int val, int val2)
0471 {
0472     int ret, samp_period, new_val;
0473     unsigned long period;
0474 
0475     if (val < 0 || val2 < 0)
0476         return -EINVAL;
0477 
0478     /* period in microseconds */
0479     period = ((val * 1000000) + val2);
0480 
0481     switch (type) {
0482     case IIO_INTENSITY:
0483         ret = ltr501_als_read_samp_period(data, &samp_period);
0484         if (ret < 0)
0485             return ret;
0486 
0487         /* period should be atleast equal to sampling period */
0488         if (period < samp_period)
0489             return -EINVAL;
0490 
0491         new_val = DIV_ROUND_UP(period, samp_period);
0492         if (new_val < 0 || new_val > 0x0f)
0493             return -EINVAL;
0494 
0495         mutex_lock(&data->lock_als);
0496         ret = regmap_field_write(data->reg_als_prst, new_val);
0497         mutex_unlock(&data->lock_als);
0498         if (ret >= 0)
0499             data->als_period = period;
0500 
0501         return ret;
0502     case IIO_PROXIMITY:
0503         ret = ltr501_ps_read_samp_period(data, &samp_period);
0504         if (ret < 0)
0505             return ret;
0506 
0507         /* period should be atleast equal to rate */
0508         if (period < samp_period)
0509             return -EINVAL;
0510 
0511         new_val = DIV_ROUND_UP(period, samp_period);
0512         if (new_val < 0 || new_val > 0x0f)
0513             return -EINVAL;
0514 
0515         mutex_lock(&data->lock_ps);
0516         ret = regmap_field_write(data->reg_ps_prst, new_val);
0517         mutex_unlock(&data->lock_ps);
0518         if (ret >= 0)
0519             data->ps_period = period;
0520 
0521         return ret;
0522     default:
0523         return -EINVAL;
0524     }
0525 
0526     return -EINVAL;
0527 }
0528 
0529 static ssize_t ltr501_read_near_level(struct iio_dev *indio_dev,
0530                       uintptr_t priv,
0531                       const struct iio_chan_spec *chan,
0532                       char *buf)
0533 {
0534     struct ltr501_data *data = iio_priv(indio_dev);
0535 
0536     return sprintf(buf, "%u\n", data->near_level);
0537 }
0538 
0539 static const struct iio_chan_spec_ext_info ltr501_ext_info[] = {
0540     {
0541         .name = "nearlevel",
0542         .shared = IIO_SEPARATE,
0543         .read = ltr501_read_near_level,
0544     },
0545     { /* sentinel */ }
0546 };
0547 
0548 static const struct iio_event_spec ltr501_als_event_spec[] = {
0549     {
0550         .type = IIO_EV_TYPE_THRESH,
0551         .dir = IIO_EV_DIR_RISING,
0552         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0553     }, {
0554         .type = IIO_EV_TYPE_THRESH,
0555         .dir = IIO_EV_DIR_FALLING,
0556         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0557     }, {
0558         .type = IIO_EV_TYPE_THRESH,
0559         .dir = IIO_EV_DIR_EITHER,
0560         .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
0561                  BIT(IIO_EV_INFO_PERIOD),
0562     },
0563 
0564 };
0565 
0566 static const struct iio_event_spec ltr501_pxs_event_spec[] = {
0567     {
0568         .type = IIO_EV_TYPE_THRESH,
0569         .dir = IIO_EV_DIR_RISING,
0570         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0571     }, {
0572         .type = IIO_EV_TYPE_THRESH,
0573         .dir = IIO_EV_DIR_FALLING,
0574         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0575     }, {
0576         .type = IIO_EV_TYPE_THRESH,
0577         .dir = IIO_EV_DIR_EITHER,
0578         .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
0579                  BIT(IIO_EV_INFO_PERIOD),
0580     },
0581 };
0582 
0583 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
0584                  _evspec, _evsize) { \
0585     .type = IIO_INTENSITY, \
0586     .modified = 1, \
0587     .address = (_addr), \
0588     .channel2 = (_mod), \
0589     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0590     .info_mask_shared_by_type = (_shared), \
0591     .scan_index = (_idx), \
0592     .scan_type = { \
0593         .sign = 'u', \
0594         .realbits = 16, \
0595         .storagebits = 16, \
0596         .endianness = IIO_CPU, \
0597     }, \
0598     .event_spec = _evspec,\
0599     .num_event_specs = _evsize,\
0600 }
0601 
0602 #define LTR501_LIGHT_CHANNEL() { \
0603     .type = IIO_LIGHT, \
0604     .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
0605     .scan_index = -1, \
0606 }
0607 
0608 static const struct iio_chan_spec ltr501_channels[] = {
0609     LTR501_LIGHT_CHANNEL(),
0610     LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
0611                  ltr501_als_event_spec,
0612                  ARRAY_SIZE(ltr501_als_event_spec)),
0613     LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
0614                  BIT(IIO_CHAN_INFO_SCALE) |
0615                  BIT(IIO_CHAN_INFO_INT_TIME) |
0616                  BIT(IIO_CHAN_INFO_SAMP_FREQ),
0617                  NULL, 0),
0618     {
0619         .type = IIO_PROXIMITY,
0620         .address = LTR501_PS_DATA,
0621         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0622             BIT(IIO_CHAN_INFO_SCALE),
0623         .scan_index = 2,
0624         .scan_type = {
0625             .sign = 'u',
0626             .realbits = 11,
0627             .storagebits = 16,
0628             .endianness = IIO_CPU,
0629         },
0630         .event_spec = ltr501_pxs_event_spec,
0631         .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
0632         .ext_info = ltr501_ext_info,
0633     },
0634     IIO_CHAN_SOFT_TIMESTAMP(3),
0635 };
0636 
0637 static const struct iio_chan_spec ltr301_channels[] = {
0638     LTR501_LIGHT_CHANNEL(),
0639     LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
0640                  ltr501_als_event_spec,
0641                  ARRAY_SIZE(ltr501_als_event_spec)),
0642     LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
0643                  BIT(IIO_CHAN_INFO_SCALE) |
0644                  BIT(IIO_CHAN_INFO_INT_TIME) |
0645                  BIT(IIO_CHAN_INFO_SAMP_FREQ),
0646                  NULL, 0),
0647     IIO_CHAN_SOFT_TIMESTAMP(2),
0648 };
0649 
0650 static int ltr501_read_raw(struct iio_dev *indio_dev,
0651                struct iio_chan_spec const *chan,
0652                int *val, int *val2, long mask)
0653 {
0654     struct ltr501_data *data = iio_priv(indio_dev);
0655     __le16 buf[2];
0656     int ret, i;
0657 
0658     switch (mask) {
0659     case IIO_CHAN_INFO_PROCESSED:
0660         switch (chan->type) {
0661         case IIO_LIGHT:
0662             ret = iio_device_claim_direct_mode(indio_dev);
0663             if (ret)
0664                 return ret;
0665 
0666             mutex_lock(&data->lock_als);
0667             ret = ltr501_read_als(data, buf);
0668             mutex_unlock(&data->lock_als);
0669             iio_device_release_direct_mode(indio_dev);
0670             if (ret < 0)
0671                 return ret;
0672             *val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
0673                             le16_to_cpu(buf[0]));
0674             return IIO_VAL_INT;
0675         default:
0676             return -EINVAL;
0677         }
0678     case IIO_CHAN_INFO_RAW:
0679         ret = iio_device_claim_direct_mode(indio_dev);
0680         if (ret)
0681             return ret;
0682 
0683         switch (chan->type) {
0684         case IIO_INTENSITY:
0685             mutex_lock(&data->lock_als);
0686             ret = ltr501_read_als(data, buf);
0687             mutex_unlock(&data->lock_als);
0688             if (ret < 0)
0689                 break;
0690             *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
0691                        buf[0] : buf[1]);
0692             ret = IIO_VAL_INT;
0693             break;
0694         case IIO_PROXIMITY:
0695             mutex_lock(&data->lock_ps);
0696             ret = ltr501_read_ps(data);
0697             mutex_unlock(&data->lock_ps);
0698             if (ret < 0)
0699                 break;
0700             *val = ret & LTR501_PS_DATA_MASK;
0701             ret = IIO_VAL_INT;
0702             break;
0703         default:
0704             ret = -EINVAL;
0705             break;
0706         }
0707 
0708         iio_device_release_direct_mode(indio_dev);
0709         return ret;
0710 
0711     case IIO_CHAN_INFO_SCALE:
0712         switch (chan->type) {
0713         case IIO_INTENSITY:
0714             i = (data->als_contr & data->chip_info->als_gain_mask)
0715                  >> data->chip_info->als_gain_shift;
0716             *val = data->chip_info->als_gain[i].scale;
0717             *val2 = data->chip_info->als_gain[i].uscale;
0718             return IIO_VAL_INT_PLUS_MICRO;
0719         case IIO_PROXIMITY:
0720             i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
0721                 LTR501_CONTR_PS_GAIN_SHIFT;
0722             *val = data->chip_info->ps_gain[i].scale;
0723             *val2 = data->chip_info->ps_gain[i].uscale;
0724             return IIO_VAL_INT_PLUS_MICRO;
0725         default:
0726             return -EINVAL;
0727         }
0728     case IIO_CHAN_INFO_INT_TIME:
0729         switch (chan->type) {
0730         case IIO_INTENSITY:
0731             return ltr501_read_it_time(data, val, val2);
0732         default:
0733             return -EINVAL;
0734         }
0735     case IIO_CHAN_INFO_SAMP_FREQ:
0736         switch (chan->type) {
0737         case IIO_INTENSITY:
0738             return ltr501_als_read_samp_freq(data, val, val2);
0739         case IIO_PROXIMITY:
0740             return ltr501_ps_read_samp_freq(data, val, val2);
0741         default:
0742             return -EINVAL;
0743         }
0744     }
0745     return -EINVAL;
0746 }
0747 
0748 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size,
0749                  int val, int val2)
0750 {
0751     int i;
0752 
0753     for (i = 0; i < size; i++)
0754         if (val == gain[i].scale && val2 == gain[i].uscale)
0755             return i;
0756 
0757     return -1;
0758 }
0759 
0760 static int ltr501_write_raw(struct iio_dev *indio_dev,
0761                 struct iio_chan_spec const *chan,
0762                 int val, int val2, long mask)
0763 {
0764     struct ltr501_data *data = iio_priv(indio_dev);
0765     int i, ret, freq_val, freq_val2;
0766     const struct ltr501_chip_info *info = data->chip_info;
0767 
0768     ret = iio_device_claim_direct_mode(indio_dev);
0769     if (ret)
0770         return ret;
0771 
0772     switch (mask) {
0773     case IIO_CHAN_INFO_SCALE:
0774         switch (chan->type) {
0775         case IIO_INTENSITY:
0776             i = ltr501_get_gain_index(info->als_gain,
0777                           info->als_gain_tbl_size,
0778                           val, val2);
0779             if (i < 0) {
0780                 ret = -EINVAL;
0781                 break;
0782             }
0783 
0784             data->als_contr &= ~info->als_gain_mask;
0785             data->als_contr |= i << info->als_gain_shift;
0786 
0787             ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
0788                        data->als_contr);
0789             break;
0790         case IIO_PROXIMITY:
0791             i = ltr501_get_gain_index(info->ps_gain,
0792                           info->ps_gain_tbl_size,
0793                           val, val2);
0794             if (i < 0) {
0795                 ret = -EINVAL;
0796                 break;
0797             }
0798             data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
0799             data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
0800 
0801             ret = regmap_write(data->regmap, LTR501_PS_CONTR,
0802                        data->ps_contr);
0803             break;
0804         default:
0805             ret = -EINVAL;
0806             break;
0807         }
0808         break;
0809 
0810     case IIO_CHAN_INFO_INT_TIME:
0811         switch (chan->type) {
0812         case IIO_INTENSITY:
0813             if (val != 0) {
0814                 ret = -EINVAL;
0815                 break;
0816             }
0817             mutex_lock(&data->lock_als);
0818             ret = ltr501_set_it_time(data, val2);
0819             mutex_unlock(&data->lock_als);
0820             break;
0821         default:
0822             ret = -EINVAL;
0823             break;
0824         }
0825         break;
0826 
0827     case IIO_CHAN_INFO_SAMP_FREQ:
0828         switch (chan->type) {
0829         case IIO_INTENSITY:
0830             ret = ltr501_als_read_samp_freq(data, &freq_val,
0831                             &freq_val2);
0832             if (ret < 0)
0833                 break;
0834 
0835             ret = ltr501_als_write_samp_freq(data, val, val2);
0836             if (ret < 0)
0837                 break;
0838 
0839             /* update persistence count when changing frequency */
0840             ret = ltr501_write_intr_prst(data, chan->type,
0841                              0, data->als_period);
0842 
0843             if (ret < 0)
0844                 ret = ltr501_als_write_samp_freq(data, freq_val,
0845                                  freq_val2);
0846             break;
0847         case IIO_PROXIMITY:
0848             ret = ltr501_ps_read_samp_freq(data, &freq_val,
0849                                &freq_val2);
0850             if (ret < 0)
0851                 break;
0852 
0853             ret = ltr501_ps_write_samp_freq(data, val, val2);
0854             if (ret < 0)
0855                 break;
0856 
0857             /* update persistence count when changing frequency */
0858             ret = ltr501_write_intr_prst(data, chan->type,
0859                              0, data->ps_period);
0860 
0861             if (ret < 0)
0862                 ret = ltr501_ps_write_samp_freq(data, freq_val,
0863                                 freq_val2);
0864             break;
0865         default:
0866             ret = -EINVAL;
0867             break;
0868         }
0869         break;
0870 
0871     default:
0872         ret = -EINVAL;
0873         break;
0874     }
0875 
0876     iio_device_release_direct_mode(indio_dev);
0877     return ret;
0878 }
0879 
0880 static int ltr501_read_thresh(const struct iio_dev *indio_dev,
0881                   const struct iio_chan_spec *chan,
0882                   enum iio_event_type type,
0883                   enum iio_event_direction dir,
0884                   enum iio_event_info info,
0885                   int *val, int *val2)
0886 {
0887     const struct ltr501_data *data = iio_priv(indio_dev);
0888     int ret, thresh_data;
0889 
0890     switch (chan->type) {
0891     case IIO_INTENSITY:
0892         switch (dir) {
0893         case IIO_EV_DIR_RISING:
0894             ret = regmap_bulk_read(data->regmap,
0895                            LTR501_ALS_THRESH_UP,
0896                            &thresh_data, 2);
0897             if (ret < 0)
0898                 return ret;
0899             *val = thresh_data & LTR501_ALS_THRESH_MASK;
0900             return IIO_VAL_INT;
0901         case IIO_EV_DIR_FALLING:
0902             ret = regmap_bulk_read(data->regmap,
0903                            LTR501_ALS_THRESH_LOW,
0904                            &thresh_data, 2);
0905             if (ret < 0)
0906                 return ret;
0907             *val = thresh_data & LTR501_ALS_THRESH_MASK;
0908             return IIO_VAL_INT;
0909         default:
0910             return -EINVAL;
0911         }
0912     case IIO_PROXIMITY:
0913         switch (dir) {
0914         case IIO_EV_DIR_RISING:
0915             ret = regmap_bulk_read(data->regmap,
0916                            LTR501_PS_THRESH_UP,
0917                            &thresh_data, 2);
0918             if (ret < 0)
0919                 return ret;
0920             *val = thresh_data & LTR501_PS_THRESH_MASK;
0921             return IIO_VAL_INT;
0922         case IIO_EV_DIR_FALLING:
0923             ret = regmap_bulk_read(data->regmap,
0924                            LTR501_PS_THRESH_LOW,
0925                            &thresh_data, 2);
0926             if (ret < 0)
0927                 return ret;
0928             *val = thresh_data & LTR501_PS_THRESH_MASK;
0929             return IIO_VAL_INT;
0930         default:
0931             return -EINVAL;
0932         }
0933     default:
0934         return -EINVAL;
0935     }
0936 
0937     return -EINVAL;
0938 }
0939 
0940 static int ltr501_write_thresh(struct iio_dev *indio_dev,
0941                    const struct iio_chan_spec *chan,
0942                    enum iio_event_type type,
0943                    enum iio_event_direction dir,
0944                    enum iio_event_info info,
0945                    int val, int val2)
0946 {
0947     struct ltr501_data *data = iio_priv(indio_dev);
0948     int ret;
0949 
0950     if (val < 0)
0951         return -EINVAL;
0952 
0953     switch (chan->type) {
0954     case IIO_INTENSITY:
0955         if (val > LTR501_ALS_THRESH_MASK)
0956             return -EINVAL;
0957         switch (dir) {
0958         case IIO_EV_DIR_RISING:
0959             mutex_lock(&data->lock_als);
0960             ret = regmap_bulk_write(data->regmap,
0961                         LTR501_ALS_THRESH_UP,
0962                         &val, 2);
0963             mutex_unlock(&data->lock_als);
0964             return ret;
0965         case IIO_EV_DIR_FALLING:
0966             mutex_lock(&data->lock_als);
0967             ret = regmap_bulk_write(data->regmap,
0968                         LTR501_ALS_THRESH_LOW,
0969                         &val, 2);
0970             mutex_unlock(&data->lock_als);
0971             return ret;
0972         default:
0973             return -EINVAL;
0974         }
0975     case IIO_PROXIMITY:
0976         if (val > LTR501_PS_THRESH_MASK)
0977             return -EINVAL;
0978         switch (dir) {
0979         case IIO_EV_DIR_RISING:
0980             mutex_lock(&data->lock_ps);
0981             ret = regmap_bulk_write(data->regmap,
0982                         LTR501_PS_THRESH_UP,
0983                         &val, 2);
0984             mutex_unlock(&data->lock_ps);
0985             return ret;
0986         case IIO_EV_DIR_FALLING:
0987             mutex_lock(&data->lock_ps);
0988             ret = regmap_bulk_write(data->regmap,
0989                         LTR501_PS_THRESH_LOW,
0990                         &val, 2);
0991             mutex_unlock(&data->lock_ps);
0992             return ret;
0993         default:
0994             return -EINVAL;
0995         }
0996     default:
0997         return -EINVAL;
0998     }
0999 
1000     return -EINVAL;
1001 }
1002 
1003 static int ltr501_read_event(struct iio_dev *indio_dev,
1004                  const struct iio_chan_spec *chan,
1005                  enum iio_event_type type,
1006                  enum iio_event_direction dir,
1007                  enum iio_event_info info,
1008                  int *val, int *val2)
1009 {
1010     int ret;
1011 
1012     switch (info) {
1013     case IIO_EV_INFO_VALUE:
1014         return ltr501_read_thresh(indio_dev, chan, type, dir,
1015                       info, val, val2);
1016     case IIO_EV_INFO_PERIOD:
1017         ret = ltr501_read_intr_prst(iio_priv(indio_dev),
1018                         chan->type, val2);
1019         *val = *val2 / 1000000;
1020         *val2 = *val2 % 1000000;
1021         return ret;
1022     default:
1023         return -EINVAL;
1024     }
1025 
1026     return -EINVAL;
1027 }
1028 
1029 static int ltr501_write_event(struct iio_dev *indio_dev,
1030                   const struct iio_chan_spec *chan,
1031                   enum iio_event_type type,
1032                   enum iio_event_direction dir,
1033                   enum iio_event_info info,
1034                   int val, int val2)
1035 {
1036     switch (info) {
1037     case IIO_EV_INFO_VALUE:
1038         if (val2 != 0)
1039             return -EINVAL;
1040         return ltr501_write_thresh(indio_dev, chan, type, dir,
1041                        info, val, val2);
1042     case IIO_EV_INFO_PERIOD:
1043         return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1044                           val, val2);
1045     default:
1046         return -EINVAL;
1047     }
1048 
1049     return -EINVAL;
1050 }
1051 
1052 static int ltr501_read_event_config(struct iio_dev *indio_dev,
1053                     const struct iio_chan_spec *chan,
1054                     enum iio_event_type type,
1055                     enum iio_event_direction dir)
1056 {
1057     struct ltr501_data *data = iio_priv(indio_dev);
1058     int ret, status;
1059 
1060     switch (chan->type) {
1061     case IIO_INTENSITY:
1062         ret = regmap_field_read(data->reg_als_intr, &status);
1063         if (ret < 0)
1064             return ret;
1065         return status;
1066     case IIO_PROXIMITY:
1067         ret = regmap_field_read(data->reg_ps_intr, &status);
1068         if (ret < 0)
1069             return ret;
1070         return status;
1071     default:
1072         return -EINVAL;
1073     }
1074 
1075     return -EINVAL;
1076 }
1077 
1078 static int ltr501_write_event_config(struct iio_dev *indio_dev,
1079                      const struct iio_chan_spec *chan,
1080                      enum iio_event_type type,
1081                      enum iio_event_direction dir, int state)
1082 {
1083     struct ltr501_data *data = iio_priv(indio_dev);
1084     int ret;
1085 
1086     /* only 1 and 0 are valid inputs */
1087     if (state != 1  && state != 0)
1088         return -EINVAL;
1089 
1090     switch (chan->type) {
1091     case IIO_INTENSITY:
1092         mutex_lock(&data->lock_als);
1093         ret = regmap_field_write(data->reg_als_intr, state);
1094         mutex_unlock(&data->lock_als);
1095         return ret;
1096     case IIO_PROXIMITY:
1097         mutex_lock(&data->lock_ps);
1098         ret = regmap_field_write(data->reg_ps_intr, state);
1099         mutex_unlock(&data->lock_ps);
1100         return ret;
1101     default:
1102         return -EINVAL;
1103     }
1104 
1105     return -EINVAL;
1106 }
1107 
1108 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1109                          struct device_attribute *attr,
1110                          char *buf)
1111 {
1112     struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1113     const struct ltr501_chip_info *info = data->chip_info;
1114     ssize_t len = 0;
1115     int i;
1116 
1117     for (i = 0; i < info->ps_gain_tbl_size; i++) {
1118         if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1119             continue;
1120         len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1121                  info->ps_gain[i].scale,
1122                  info->ps_gain[i].uscale);
1123     }
1124 
1125     buf[len - 1] = '\n';
1126 
1127     return len;
1128 }
1129 
1130 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1131                          struct device_attribute *attr,
1132                          char *buf)
1133 {
1134     struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1135     const struct ltr501_chip_info *info = data->chip_info;
1136     ssize_t len = 0;
1137     int i;
1138 
1139     for (i = 0; i < info->als_gain_tbl_size; i++) {
1140         if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1141             continue;
1142         len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1143                  info->als_gain[i].scale,
1144                  info->als_gain[i].uscale);
1145     }
1146 
1147     buf[len - 1] = '\n';
1148 
1149     return len;
1150 }
1151 
1152 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1153 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1154 
1155 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1156                ltr501_show_proximity_scale_avail, NULL, 0);
1157 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1158                ltr501_show_intensity_scale_avail, NULL, 0);
1159 
1160 static struct attribute *ltr501_attributes[] = {
1161     &iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1162     &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1163     &iio_const_attr_integration_time_available.dev_attr.attr,
1164     &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1165     NULL
1166 };
1167 
1168 static struct attribute *ltr301_attributes[] = {
1169     &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1170     &iio_const_attr_integration_time_available.dev_attr.attr,
1171     &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1172     NULL
1173 };
1174 
1175 static const struct attribute_group ltr501_attribute_group = {
1176     .attrs = ltr501_attributes,
1177 };
1178 
1179 static const struct attribute_group ltr301_attribute_group = {
1180     .attrs = ltr301_attributes,
1181 };
1182 
1183 static const struct iio_info ltr501_info_no_irq = {
1184     .read_raw = ltr501_read_raw,
1185     .write_raw = ltr501_write_raw,
1186     .attrs = &ltr501_attribute_group,
1187 };
1188 
1189 static const struct iio_info ltr501_info = {
1190     .read_raw = ltr501_read_raw,
1191     .write_raw = ltr501_write_raw,
1192     .attrs = &ltr501_attribute_group,
1193     .read_event_value   = &ltr501_read_event,
1194     .write_event_value  = &ltr501_write_event,
1195     .read_event_config  = &ltr501_read_event_config,
1196     .write_event_config = &ltr501_write_event_config,
1197 };
1198 
1199 static const struct iio_info ltr301_info_no_irq = {
1200     .read_raw = ltr501_read_raw,
1201     .write_raw = ltr501_write_raw,
1202     .attrs = &ltr301_attribute_group,
1203 };
1204 
1205 static const struct iio_info ltr301_info = {
1206     .read_raw = ltr501_read_raw,
1207     .write_raw = ltr501_write_raw,
1208     .attrs = &ltr301_attribute_group,
1209     .read_event_value   = &ltr501_read_event,
1210     .write_event_value  = &ltr501_write_event,
1211     .read_event_config  = &ltr501_read_event_config,
1212     .write_event_config = &ltr501_write_event_config,
1213 };
1214 
1215 static const struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1216     [ltr501] = {
1217         .partid = 0x08,
1218         .als_gain = ltr501_als_gain_tbl,
1219         .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1220         .ps_gain = ltr501_ps_gain_tbl,
1221         .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1222         .als_mode_active = BIT(0) | BIT(1),
1223         .als_gain_mask = BIT(3),
1224         .als_gain_shift = 3,
1225         .info = &ltr501_info,
1226         .info_no_irq = &ltr501_info_no_irq,
1227         .channels = ltr501_channels,
1228         .no_channels = ARRAY_SIZE(ltr501_channels),
1229     },
1230     [ltr559] = {
1231         .partid = 0x09,
1232         .als_gain = ltr559_als_gain_tbl,
1233         .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1234         .ps_gain = ltr559_ps_gain_tbl,
1235         .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1236         .als_mode_active = BIT(0),
1237         .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1238         .als_gain_shift = 2,
1239         .info = &ltr501_info,
1240         .info_no_irq = &ltr501_info_no_irq,
1241         .channels = ltr501_channels,
1242         .no_channels = ARRAY_SIZE(ltr501_channels),
1243     },
1244     [ltr301] = {
1245         .partid = 0x08,
1246         .als_gain = ltr501_als_gain_tbl,
1247         .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1248         .als_mode_active = BIT(0) | BIT(1),
1249         .als_gain_mask = BIT(3),
1250         .als_gain_shift = 3,
1251         .info = &ltr301_info,
1252         .info_no_irq = &ltr301_info_no_irq,
1253         .channels = ltr301_channels,
1254         .no_channels = ARRAY_SIZE(ltr301_channels),
1255     },
1256     [ltr303] = {
1257         .partid = 0x0A,
1258         .als_gain = ltr559_als_gain_tbl,
1259         .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1260         .als_mode_active = BIT(0),
1261         .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1262         .als_gain_shift = 2,
1263         .info = &ltr301_info,
1264         .info_no_irq = &ltr301_info_no_irq,
1265         .channels = ltr301_channels,
1266         .no_channels = ARRAY_SIZE(ltr301_channels),
1267     },
1268 };
1269 
1270 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1271 {
1272     int ret;
1273 
1274     ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1275     if (ret < 0)
1276         return ret;
1277 
1278     return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1279 }
1280 
1281 static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1282 {
1283     struct iio_poll_func *pf = p;
1284     struct iio_dev *indio_dev = pf->indio_dev;
1285     struct ltr501_data *data = iio_priv(indio_dev);
1286     struct {
1287         u16 channels[3];
1288         s64 ts __aligned(8);
1289     } scan;
1290     __le16 als_buf[2];
1291     u8 mask = 0;
1292     int j = 0;
1293     int ret, psdata;
1294 
1295     memset(&scan, 0, sizeof(scan));
1296 
1297     /* figure out which data needs to be ready */
1298     if (test_bit(0, indio_dev->active_scan_mask) ||
1299         test_bit(1, indio_dev->active_scan_mask))
1300         mask |= LTR501_STATUS_ALS_RDY;
1301     if (test_bit(2, indio_dev->active_scan_mask))
1302         mask |= LTR501_STATUS_PS_RDY;
1303 
1304     ret = ltr501_drdy(data, mask);
1305     if (ret < 0)
1306         goto done;
1307 
1308     if (mask & LTR501_STATUS_ALS_RDY) {
1309         ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1310                        als_buf, sizeof(als_buf));
1311         if (ret < 0)
1312             goto done;
1313         if (test_bit(0, indio_dev->active_scan_mask))
1314             scan.channels[j++] = le16_to_cpu(als_buf[1]);
1315         if (test_bit(1, indio_dev->active_scan_mask))
1316             scan.channels[j++] = le16_to_cpu(als_buf[0]);
1317     }
1318 
1319     if (mask & LTR501_STATUS_PS_RDY) {
1320         ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1321                        &psdata, 2);
1322         if (ret < 0)
1323             goto done;
1324         scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
1325     }
1326 
1327     iio_push_to_buffers_with_timestamp(indio_dev, &scan,
1328                        iio_get_time_ns(indio_dev));
1329 
1330 done:
1331     iio_trigger_notify_done(indio_dev->trig);
1332 
1333     return IRQ_HANDLED;
1334 }
1335 
1336 static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1337 {
1338     struct iio_dev *indio_dev = private;
1339     struct ltr501_data *data = iio_priv(indio_dev);
1340     int ret, status;
1341 
1342     ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1343     if (ret < 0) {
1344         dev_err(&data->client->dev,
1345             "irq read int reg failed\n");
1346         return IRQ_HANDLED;
1347     }
1348 
1349     if (status & LTR501_STATUS_ALS_INTR)
1350         iio_push_event(indio_dev,
1351                    IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1352                             IIO_EV_TYPE_THRESH,
1353                             IIO_EV_DIR_EITHER),
1354                    iio_get_time_ns(indio_dev));
1355 
1356     if (status & LTR501_STATUS_PS_INTR)
1357         iio_push_event(indio_dev,
1358                    IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1359                             IIO_EV_TYPE_THRESH,
1360                             IIO_EV_DIR_EITHER),
1361                    iio_get_time_ns(indio_dev));
1362 
1363     return IRQ_HANDLED;
1364 }
1365 
1366 static int ltr501_init(struct ltr501_data *data)
1367 {
1368     int ret, status;
1369 
1370     ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1371     if (ret < 0)
1372         return ret;
1373 
1374     data->als_contr = status | data->chip_info->als_mode_active;
1375 
1376     ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1377     if (ret < 0)
1378         return ret;
1379 
1380     data->ps_contr = status | LTR501_CONTR_ACTIVE;
1381 
1382     ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1383     if (ret < 0)
1384         return ret;
1385 
1386     ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1387     if (ret < 0)
1388         return ret;
1389 
1390     return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1391 }
1392 
1393 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1394 {
1395     switch (reg) {
1396     case LTR501_ALS_DATA1:
1397     case LTR501_ALS_DATA1_UPPER:
1398     case LTR501_ALS_DATA0:
1399     case LTR501_ALS_DATA0_UPPER:
1400     case LTR501_ALS_PS_STATUS:
1401     case LTR501_PS_DATA:
1402     case LTR501_PS_DATA_UPPER:
1403         return true;
1404     default:
1405         return false;
1406     }
1407 }
1408 
1409 static const struct regmap_config ltr501_regmap_config = {
1410     .name =  LTR501_REGMAP_NAME,
1411     .reg_bits = 8,
1412     .val_bits = 8,
1413     .max_register = LTR501_MAX_REG,
1414     .cache_type = REGCACHE_RBTREE,
1415     .volatile_reg = ltr501_is_volatile_reg,
1416 };
1417 
1418 static void ltr501_disable_regulators(void *d)
1419 {
1420     struct ltr501_data *data = d;
1421 
1422     regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
1423 }
1424 
1425 static int ltr501_powerdown(struct ltr501_data *data)
1426 {
1427     return ltr501_write_contr(data, data->als_contr &
1428                   ~data->chip_info->als_mode_active,
1429                   data->ps_contr & ~LTR501_CONTR_ACTIVE);
1430 }
1431 
1432 static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1433 {
1434     const struct acpi_device_id *id;
1435 
1436     id = acpi_match_device(dev->driver->acpi_match_table, dev);
1437     if (!id)
1438         return NULL;
1439     *chip_idx = id->driver_data;
1440     return dev_name(dev);
1441 }
1442 
1443 static int ltr501_probe(struct i2c_client *client,
1444             const struct i2c_device_id *id)
1445 {
1446     struct ltr501_data *data;
1447     struct iio_dev *indio_dev;
1448     struct regmap *regmap;
1449     int ret, partid, chip_idx = 0;
1450     const char *name = NULL;
1451 
1452     indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1453     if (!indio_dev)
1454         return -ENOMEM;
1455 
1456     regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
1457     if (IS_ERR(regmap)) {
1458         dev_err(&client->dev, "Regmap initialization failed.\n");
1459         return PTR_ERR(regmap);
1460     }
1461 
1462     data = iio_priv(indio_dev);
1463     i2c_set_clientdata(client, indio_dev);
1464     data->client = client;
1465     data->regmap = regmap;
1466     mutex_init(&data->lock_als);
1467     mutex_init(&data->lock_ps);
1468 
1469     data->regulators[0].supply = "vdd";
1470     data->regulators[1].supply = "vddio";
1471     ret = devm_regulator_bulk_get(&client->dev,
1472                       ARRAY_SIZE(data->regulators),
1473                       data->regulators);
1474     if (ret)
1475         return dev_err_probe(&client->dev, ret,
1476                      "Failed to get regulators\n");
1477 
1478     ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
1479                     data->regulators);
1480     if (ret)
1481         return ret;
1482 
1483     ret = devm_add_action_or_reset(&client->dev,
1484                        ltr501_disable_regulators, data);
1485     if (ret)
1486         return ret;
1487 
1488     data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1489                            reg_field_it);
1490     if (IS_ERR(data->reg_it)) {
1491         dev_err(&client->dev, "Integ time reg field init failed.\n");
1492         return PTR_ERR(data->reg_it);
1493     }
1494 
1495     data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1496                              reg_field_als_intr);
1497     if (IS_ERR(data->reg_als_intr)) {
1498         dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1499         return PTR_ERR(data->reg_als_intr);
1500     }
1501 
1502     data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1503                             reg_field_ps_intr);
1504     if (IS_ERR(data->reg_ps_intr)) {
1505         dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1506         return PTR_ERR(data->reg_ps_intr);
1507     }
1508 
1509     data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1510                              reg_field_als_rate);
1511     if (IS_ERR(data->reg_als_rate)) {
1512         dev_err(&client->dev, "ALS samp rate field init failed.\n");
1513         return PTR_ERR(data->reg_als_rate);
1514     }
1515 
1516     data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1517                             reg_field_ps_rate);
1518     if (IS_ERR(data->reg_ps_rate)) {
1519         dev_err(&client->dev, "PS samp rate field init failed.\n");
1520         return PTR_ERR(data->reg_ps_rate);
1521     }
1522 
1523     data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1524                              reg_field_als_prst);
1525     if (IS_ERR(data->reg_als_prst)) {
1526         dev_err(&client->dev, "ALS prst reg field init failed\n");
1527         return PTR_ERR(data->reg_als_prst);
1528     }
1529 
1530     data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1531                             reg_field_ps_prst);
1532     if (IS_ERR(data->reg_ps_prst)) {
1533         dev_err(&client->dev, "PS prst reg field init failed.\n");
1534         return PTR_ERR(data->reg_ps_prst);
1535     }
1536 
1537     ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1538     if (ret < 0)
1539         return ret;
1540 
1541     if (id) {
1542         name = id->name;
1543         chip_idx = id->driver_data;
1544     } else  if (ACPI_HANDLE(&client->dev)) {
1545         name = ltr501_match_acpi_device(&client->dev, &chip_idx);
1546     } else {
1547         return -ENODEV;
1548     }
1549 
1550     data->chip_info = &ltr501_chip_info_tbl[chip_idx];
1551 
1552     if ((partid >> 4) != data->chip_info->partid)
1553         return -ENODEV;
1554 
1555     if (device_property_read_u32(&client->dev, "proximity-near-level",
1556                      &data->near_level))
1557         data->near_level = 0;
1558 
1559     indio_dev->info = data->chip_info->info;
1560     indio_dev->channels = data->chip_info->channels;
1561     indio_dev->num_channels = data->chip_info->no_channels;
1562     indio_dev->name = name;
1563     indio_dev->modes = INDIO_DIRECT_MODE;
1564 
1565     ret = ltr501_init(data);
1566     if (ret < 0)
1567         return ret;
1568 
1569     if (client->irq > 0) {
1570         ret = devm_request_threaded_irq(&client->dev, client->irq,
1571                         NULL, ltr501_interrupt_handler,
1572                         IRQF_TRIGGER_FALLING |
1573                         IRQF_ONESHOT,
1574                         "ltr501_thresh_event",
1575                         indio_dev);
1576         if (ret) {
1577             dev_err(&client->dev, "request irq (%d) failed\n",
1578                 client->irq);
1579             return ret;
1580         }
1581     } else {
1582         indio_dev->info = data->chip_info->info_no_irq;
1583     }
1584 
1585     ret = iio_triggered_buffer_setup(indio_dev, NULL,
1586                      ltr501_trigger_handler, NULL);
1587     if (ret)
1588         goto powerdown_on_error;
1589 
1590     ret = iio_device_register(indio_dev);
1591     if (ret)
1592         goto error_unreg_buffer;
1593 
1594     return 0;
1595 
1596 error_unreg_buffer:
1597     iio_triggered_buffer_cleanup(indio_dev);
1598 powerdown_on_error:
1599     ltr501_powerdown(data);
1600     return ret;
1601 }
1602 
1603 static int ltr501_remove(struct i2c_client *client)
1604 {
1605     struct iio_dev *indio_dev = i2c_get_clientdata(client);
1606 
1607     iio_device_unregister(indio_dev);
1608     iio_triggered_buffer_cleanup(indio_dev);
1609     ltr501_powerdown(iio_priv(indio_dev));
1610 
1611     return 0;
1612 }
1613 
1614 static int ltr501_suspend(struct device *dev)
1615 {
1616     struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1617                         to_i2c_client(dev)));
1618     return ltr501_powerdown(data);
1619 }
1620 
1621 static int ltr501_resume(struct device *dev)
1622 {
1623     struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1624                         to_i2c_client(dev)));
1625 
1626     return ltr501_write_contr(data, data->als_contr,
1627         data->ps_contr);
1628 }
1629 
1630 static DEFINE_SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1631 
1632 static const struct acpi_device_id ltr_acpi_match[] = {
1633     { "LTER0501", ltr501 },
1634     { "LTER0559", ltr559 },
1635     { "LTER0301", ltr301 },
1636     { },
1637 };
1638 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1639 
1640 static const struct i2c_device_id ltr501_id[] = {
1641     { "ltr501", ltr501 },
1642     { "ltr559", ltr559 },
1643     { "ltr301", ltr301 },
1644     { "ltr303", ltr303 },
1645     { }
1646 };
1647 MODULE_DEVICE_TABLE(i2c, ltr501_id);
1648 
1649 static const struct of_device_id ltr501_of_match[] = {
1650     { .compatible = "liteon,ltr501", },
1651     { .compatible = "liteon,ltr559", },
1652     { .compatible = "liteon,ltr301", },
1653     { .compatible = "liteon,ltr303", },
1654     {}
1655 };
1656 MODULE_DEVICE_TABLE(of, ltr501_of_match);
1657 
1658 static struct i2c_driver ltr501_driver = {
1659     .driver = {
1660         .name   = LTR501_DRV_NAME,
1661         .of_match_table = ltr501_of_match,
1662         .pm = pm_sleep_ptr(&ltr501_pm_ops),
1663         .acpi_match_table = ACPI_PTR(ltr_acpi_match),
1664     },
1665     .probe  = ltr501_probe,
1666     .remove = ltr501_remove,
1667     .id_table = ltr501_id,
1668 };
1669 
1670 module_i2c_driver(ltr501_driver);
1671 
1672 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1673 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1674 MODULE_LICENSE("GPL");
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