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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (C) 2020 Invensense, Inc.
0004  */
0005 
0006 #ifndef INV_ICM42600_BUFFER_H_
0007 #define INV_ICM42600_BUFFER_H_
0008 
0009 #include <linux/kernel.h>
0010 #include <linux/bits.h>
0011 
0012 struct inv_icm42600_state;
0013 
0014 #define INV_ICM42600_SENSOR_GYRO    BIT(0)
0015 #define INV_ICM42600_SENSOR_ACCEL   BIT(1)
0016 #define INV_ICM42600_SENSOR_TEMP    BIT(2)
0017 
0018 /**
0019  * struct inv_icm42600_fifo - FIFO state variables
0020  * @on:     reference counter for FIFO on.
0021  * @en:     bits field of INV_ICM42600_SENSOR_* for FIFO EN bits.
0022  * @period: FIFO internal period.
0023  * @watermark:  watermark configuration values for accel and gyro.
0024  * @count:  number of bytes in the FIFO data buffer.
0025  * @nb:     gyro, accel and total samples in the FIFO data buffer.
0026  * @data:   FIFO data buffer aligned for DMA (2kB + 32 bytes of read cache).
0027  */
0028 struct inv_icm42600_fifo {
0029     unsigned int on;
0030     unsigned int en;
0031     uint32_t period;
0032     struct {
0033         unsigned int gyro;
0034         unsigned int accel;
0035     } watermark;
0036     size_t count;
0037     struct {
0038         size_t gyro;
0039         size_t accel;
0040         size_t total;
0041     } nb;
0042     uint8_t data[2080] __aligned(IIO_DMA_MINALIGN);
0043 };
0044 
0045 /* FIFO data packet */
0046 struct inv_icm42600_fifo_sensor_data {
0047     __be16 x;
0048     __be16 y;
0049     __be16 z;
0050 } __packed;
0051 #define INV_ICM42600_FIFO_DATA_INVALID      -32768
0052 
0053 static inline int16_t inv_icm42600_fifo_get_sensor_data(__be16 d)
0054 {
0055     return be16_to_cpu(d);
0056 }
0057 
0058 static inline bool
0059 inv_icm42600_fifo_is_data_valid(const struct inv_icm42600_fifo_sensor_data *s)
0060 {
0061     int16_t x, y, z;
0062 
0063     x = inv_icm42600_fifo_get_sensor_data(s->x);
0064     y = inv_icm42600_fifo_get_sensor_data(s->y);
0065     z = inv_icm42600_fifo_get_sensor_data(s->z);
0066 
0067     if (x == INV_ICM42600_FIFO_DATA_INVALID &&
0068         y == INV_ICM42600_FIFO_DATA_INVALID &&
0069         z == INV_ICM42600_FIFO_DATA_INVALID)
0070         return false;
0071 
0072     return true;
0073 }
0074 
0075 ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel,
0076                     const void **gyro, const int8_t **temp,
0077                     const void **timestamp, unsigned int *odr);
0078 
0079 extern const struct iio_buffer_setup_ops inv_icm42600_buffer_ops;
0080 
0081 int inv_icm42600_buffer_init(struct inv_icm42600_state *st);
0082 
0083 void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st);
0084 
0085 int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st,
0086                     unsigned int fifo_en);
0087 
0088 int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st);
0089 
0090 int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st,
0091                   unsigned int max);
0092 
0093 int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st);
0094 
0095 int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st,
0096                      unsigned int count);
0097 
0098 #endif