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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ADIS16475 IMU driver
0004  *
0005  * Copyright 2019 Analog Devices Inc.
0006  */
0007 #include <linux/bitfield.h>
0008 #include <linux/bitops.h>
0009 #include <linux/clk.h>
0010 #include <linux/debugfs.h>
0011 #include <linux/delay.h>
0012 #include <linux/device.h>
0013 #include <linux/kernel.h>
0014 #include <linux/iio/buffer.h>
0015 #include <linux/iio/iio.h>
0016 #include <linux/iio/imu/adis.h>
0017 #include <linux/iio/trigger_consumer.h>
0018 #include <linux/irq.h>
0019 #include <linux/lcm.h>
0020 #include <linux/math.h>
0021 #include <linux/module.h>
0022 #include <linux/mod_devicetable.h>
0023 #include <linux/property.h>
0024 #include <linux/spi/spi.h>
0025 
0026 #define ADIS16475_REG_DIAG_STAT     0x02
0027 #define ADIS16475_REG_X_GYRO_L      0x04
0028 #define ADIS16475_REG_Y_GYRO_L      0x08
0029 #define ADIS16475_REG_Z_GYRO_L      0x0C
0030 #define ADIS16475_REG_X_ACCEL_L     0x10
0031 #define ADIS16475_REG_Y_ACCEL_L     0x14
0032 #define ADIS16475_REG_Z_ACCEL_L     0x18
0033 #define ADIS16475_REG_TEMP_OUT      0x1c
0034 #define ADIS16475_REG_X_GYRO_BIAS_L 0x40
0035 #define ADIS16475_REG_Y_GYRO_BIAS_L 0x44
0036 #define ADIS16475_REG_Z_GYRO_BIAS_L 0x48
0037 #define ADIS16475_REG_X_ACCEL_BIAS_L    0x4c
0038 #define ADIS16475_REG_Y_ACCEL_BIAS_L    0x50
0039 #define ADIS16475_REG_Z_ACCEL_BIAS_L    0x54
0040 #define ADIS16475_REG_FILT_CTRL     0x5c
0041 #define ADIS16475_FILT_CTRL_MASK    GENMASK(2, 0)
0042 #define ADIS16475_FILT_CTRL(x)      FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x)
0043 #define ADIS16475_REG_MSG_CTRL      0x60
0044 #define ADIS16475_MSG_CTRL_DR_POL_MASK  BIT(0)
0045 #define ADIS16475_MSG_CTRL_DR_POL(x) \
0046                 FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)
0047 #define ADIS16475_SYNC_MODE_MASK    GENMASK(4, 2)
0048 #define ADIS16475_SYNC_MODE(x)      FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)
0049 #define ADIS16475_REG_UP_SCALE      0x62
0050 #define ADIS16475_REG_DEC_RATE      0x64
0051 #define ADIS16475_REG_GLOB_CMD      0x68
0052 #define ADIS16475_REG_FIRM_REV      0x6c
0053 #define ADIS16475_REG_FIRM_DM       0x6e
0054 #define ADIS16475_REG_FIRM_Y        0x70
0055 #define ADIS16475_REG_PROD_ID       0x72
0056 #define ADIS16475_REG_SERIAL_NUM    0x74
0057 #define ADIS16475_REG_FLASH_CNT     0x7c
0058 #define ADIS16500_BURST32_MASK      BIT(9)
0059 #define ADIS16500_BURST32(x)        FIELD_PREP(ADIS16500_BURST32_MASK, x)
0060 /* number of data elements in burst mode */
0061 #define ADIS16475_BURST32_MAX_DATA  32
0062 #define ADIS16475_BURST_MAX_DATA    20
0063 #define ADIS16475_MAX_SCAN_DATA     20
0064 /* spi max speed in brust mode */
0065 #define ADIS16475_BURST_MAX_SPEED   1000000
0066 #define ADIS16475_LSB_DEC_MASK      BIT(0)
0067 #define ADIS16475_LSB_FIR_MASK      BIT(1)
0068 
0069 enum {
0070     ADIS16475_SYNC_DIRECT = 1,
0071     ADIS16475_SYNC_SCALED,
0072     ADIS16475_SYNC_OUTPUT,
0073     ADIS16475_SYNC_PULSE = 5,
0074 };
0075 
0076 struct adis16475_sync {
0077     u16 sync_mode;
0078     u16 min_rate;
0079     u16 max_rate;
0080 };
0081 
0082 struct adis16475_chip_info {
0083     const struct iio_chan_spec *channels;
0084     const struct adis16475_sync *sync;
0085     const struct adis_data adis_data;
0086     const char *name;
0087     u32 num_channels;
0088     u32 gyro_max_val;
0089     u32 gyro_max_scale;
0090     u32 accel_max_val;
0091     u32 accel_max_scale;
0092     u32 temp_scale;
0093     u32 int_clk;
0094     u16 max_dec;
0095     u8 num_sync;
0096     bool has_burst32;
0097 };
0098 
0099 struct adis16475 {
0100     const struct adis16475_chip_info *info;
0101     struct adis adis;
0102     u32 clk_freq;
0103     bool burst32;
0104     unsigned long lsb_flag;
0105     u16 sync_mode;
0106     /* Alignment needed for the timestamp */
0107     __be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8);
0108 };
0109 
0110 enum {
0111     ADIS16475_SCAN_GYRO_X,
0112     ADIS16475_SCAN_GYRO_Y,
0113     ADIS16475_SCAN_GYRO_Z,
0114     ADIS16475_SCAN_ACCEL_X,
0115     ADIS16475_SCAN_ACCEL_Y,
0116     ADIS16475_SCAN_ACCEL_Z,
0117     ADIS16475_SCAN_TEMP,
0118     ADIS16475_SCAN_DIAG_S_FLAGS,
0119     ADIS16475_SCAN_CRC_FAILURE,
0120 };
0121 
0122 static bool low_rate_allow;
0123 module_param(low_rate_allow, bool, 0444);
0124 MODULE_PARM_DESC(low_rate_allow,
0125          "Allow IMU rates below the minimum advisable when external clk is used in SCALED mode (default: N)");
0126 
0127 #ifdef CONFIG_DEBUG_FS
0128 static ssize_t adis16475_show_firmware_revision(struct file *file,
0129                         char __user *userbuf,
0130                         size_t count, loff_t *ppos)
0131 {
0132     struct adis16475 *st = file->private_data;
0133     char buf[7];
0134     size_t len;
0135     u16 rev;
0136     int ret;
0137 
0138     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev);
0139     if (ret)
0140         return ret;
0141 
0142     len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
0143 
0144     return simple_read_from_buffer(userbuf, count, ppos, buf, len);
0145 }
0146 
0147 static const struct file_operations adis16475_firmware_revision_fops = {
0148     .open = simple_open,
0149     .read = adis16475_show_firmware_revision,
0150     .llseek = default_llseek,
0151     .owner = THIS_MODULE,
0152 };
0153 
0154 static ssize_t adis16475_show_firmware_date(struct file *file,
0155                         char __user *userbuf,
0156                         size_t count, loff_t *ppos)
0157 {
0158     struct adis16475 *st = file->private_data;
0159     u16 md, year;
0160     char buf[12];
0161     size_t len;
0162     int ret;
0163 
0164     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year);
0165     if (ret)
0166         return ret;
0167 
0168     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md);
0169     if (ret)
0170         return ret;
0171 
0172     len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff,
0173                year);
0174 
0175     return simple_read_from_buffer(userbuf, count, ppos, buf, len);
0176 }
0177 
0178 static const struct file_operations adis16475_firmware_date_fops = {
0179     .open = simple_open,
0180     .read = adis16475_show_firmware_date,
0181     .llseek = default_llseek,
0182     .owner = THIS_MODULE,
0183 };
0184 
0185 static int adis16475_show_serial_number(void *arg, u64 *val)
0186 {
0187     struct adis16475 *st = arg;
0188     u16 serial;
0189     int ret;
0190 
0191     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial);
0192     if (ret)
0193         return ret;
0194 
0195     *val = serial;
0196 
0197     return 0;
0198 }
0199 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_serial_number_fops,
0200              adis16475_show_serial_number, NULL, "0x%.4llx\n");
0201 
0202 static int adis16475_show_product_id(void *arg, u64 *val)
0203 {
0204     struct adis16475 *st = arg;
0205     u16 prod_id;
0206     int ret;
0207 
0208     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id);
0209     if (ret)
0210         return ret;
0211 
0212     *val = prod_id;
0213 
0214     return 0;
0215 }
0216 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_product_id_fops,
0217              adis16475_show_product_id, NULL, "%llu\n");
0218 
0219 static int adis16475_show_flash_count(void *arg, u64 *val)
0220 {
0221     struct adis16475 *st = arg;
0222     u32 flash_count;
0223     int ret;
0224 
0225     ret = adis_read_reg_32(&st->adis, ADIS16475_REG_FLASH_CNT,
0226                    &flash_count);
0227     if (ret)
0228         return ret;
0229 
0230     *val = flash_count;
0231 
0232     return 0;
0233 }
0234 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_flash_count_fops,
0235              adis16475_show_flash_count, NULL, "%lld\n");
0236 
0237 static void adis16475_debugfs_init(struct iio_dev *indio_dev)
0238 {
0239     struct adis16475 *st = iio_priv(indio_dev);
0240     struct dentry *d = iio_get_debugfs_dentry(indio_dev);
0241 
0242     debugfs_create_file_unsafe("serial_number", 0400,
0243                    d, st, &adis16475_serial_number_fops);
0244     debugfs_create_file_unsafe("product_id", 0400,
0245                    d, st, &adis16475_product_id_fops);
0246     debugfs_create_file_unsafe("flash_count", 0400,
0247                    d, st, &adis16475_flash_count_fops);
0248     debugfs_create_file("firmware_revision", 0400,
0249                 d, st, &adis16475_firmware_revision_fops);
0250     debugfs_create_file("firmware_date", 0400, d,
0251                 st, &adis16475_firmware_date_fops);
0252 }
0253 #else
0254 static void adis16475_debugfs_init(struct iio_dev *indio_dev)
0255 {
0256 }
0257 #endif
0258 
0259 static int adis16475_get_freq(struct adis16475 *st, u32 *freq)
0260 {
0261     int ret;
0262     u16 dec;
0263     u32 sample_rate = st->clk_freq;
0264 
0265     adis_dev_lock(&st->adis);
0266 
0267     if (st->sync_mode == ADIS16475_SYNC_SCALED) {
0268         u16 sync_scale;
0269 
0270         ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, &sync_scale);
0271         if (ret)
0272             goto error;
0273 
0274         sample_rate = st->clk_freq * sync_scale;
0275     }
0276 
0277     ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, &dec);
0278     if (ret)
0279         goto error;
0280 
0281     adis_dev_unlock(&st->adis);
0282 
0283     *freq = DIV_ROUND_CLOSEST(sample_rate, dec + 1);
0284 
0285     return 0;
0286 error:
0287     adis_dev_unlock(&st->adis);
0288     return ret;
0289 }
0290 
0291 static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
0292 {
0293     u16 dec;
0294     int ret;
0295     u32 sample_rate = st->clk_freq;
0296 
0297     if (!freq)
0298         return -EINVAL;
0299 
0300     adis_dev_lock(&st->adis);
0301     /*
0302      * When using sync scaled mode, the input clock needs to be scaled so that we have
0303      * an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
0304      * decimation filter to lower the sampling rate in order to get what the user wants.
0305      * Optimally, the user sample rate is a multiple of both the IMU sample rate and
0306      * the input clock. Hence, calculating the sync_scale dynamically gives us better
0307      * chances of achieving a perfect/integer value for DEC_RATE. The math here is:
0308      *  1. lcm of the input clock and the desired output rate.
0309      *  2. get the highest multiple of the previous result lower than the adis max rate.
0310      *  3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE
0311      *     and DEC_RATE (to get the user output rate)
0312      */
0313     if (st->sync_mode == ADIS16475_SYNC_SCALED) {
0314         unsigned long scaled_rate = lcm(st->clk_freq, freq);
0315         int sync_scale;
0316 
0317         /*
0318          * If lcm is bigger than the IMU maximum sampling rate there's no perfect
0319          * solution. In this case, we get the highest multiple of the input clock
0320          * lower than the IMU max sample rate.
0321          */
0322         if (scaled_rate > 2100000)
0323             scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
0324         else
0325             scaled_rate = 2100000 / scaled_rate * scaled_rate;
0326 
0327         /*
0328          * This is not an hard requirement but it's not advised to run the IMU
0329          * with a sample rate lower than 4000Hz due to possible undersampling
0330          * issues. However, there are users that might really want to take the risk.
0331          * Hence, we provide a module parameter for them. If set, we allow sample
0332          * rates lower than 4KHz. By default, we won't allow this and we just roundup
0333          * the rate to the next multiple of the input clock bigger than 4KHz. This
0334          * is done like this as in some cases (when DEC_RATE is 0) might give
0335          * us the closest value to the one desired by the user...
0336          */
0337         if (scaled_rate < 1900000 && !low_rate_allow)
0338             scaled_rate = roundup(1900000, st->clk_freq);
0339 
0340         sync_scale = scaled_rate / st->clk_freq;
0341         ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
0342         if (ret)
0343             goto error;
0344 
0345         sample_rate = scaled_rate;
0346     }
0347 
0348     dec = DIV_ROUND_CLOSEST(sample_rate, freq);
0349 
0350     if (dec)
0351         dec--;
0352 
0353     if (dec > st->info->max_dec)
0354         dec = st->info->max_dec;
0355 
0356     ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, dec);
0357     if (ret)
0358         goto error;
0359 
0360     adis_dev_unlock(&st->adis);
0361     /*
0362      * If decimation is used, then gyro and accel data will have meaningful
0363      * bits on the LSB registers. This info is used on the trigger handler.
0364      */
0365     assign_bit(ADIS16475_LSB_DEC_MASK, &st->lsb_flag, dec);
0366 
0367     return 0;
0368 error:
0369     adis_dev_unlock(&st->adis);
0370     return ret;
0371 }
0372 
0373 /* The values are approximated. */
0374 static const u32 adis16475_3db_freqs[] = {
0375     [0] = 720, /* Filter disabled, full BW (~720Hz) */
0376     [1] = 360,
0377     [2] = 164,
0378     [3] = 80,
0379     [4] = 40,
0380     [5] = 20,
0381     [6] = 10,
0382 };
0383 
0384 static int adis16475_get_filter(struct adis16475 *st, u32 *filter)
0385 {
0386     u16 filter_sz;
0387     int ret;
0388     const int mask = ADIS16475_FILT_CTRL_MASK;
0389 
0390     ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, &filter_sz);
0391     if (ret)
0392         return ret;
0393 
0394     *filter = adis16475_3db_freqs[filter_sz & mask];
0395 
0396     return 0;
0397 }
0398 
0399 static int adis16475_set_filter(struct adis16475 *st, const u32 filter)
0400 {
0401     int i = ARRAY_SIZE(adis16475_3db_freqs);
0402     int ret;
0403 
0404     while (--i) {
0405         if (adis16475_3db_freqs[i] >= filter)
0406             break;
0407     }
0408 
0409     ret = adis_write_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL,
0410                 ADIS16475_FILT_CTRL(i));
0411     if (ret)
0412         return ret;
0413 
0414     /*
0415      * If FIR is used, then gyro and accel data will have meaningful
0416      * bits on the LSB registers. This info is used on the trigger handler.
0417      */
0418     assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i);
0419 
0420     return 0;
0421 }
0422 
0423 static const u32 adis16475_calib_regs[] = {
0424     [ADIS16475_SCAN_GYRO_X] = ADIS16475_REG_X_GYRO_BIAS_L,
0425     [ADIS16475_SCAN_GYRO_Y] = ADIS16475_REG_Y_GYRO_BIAS_L,
0426     [ADIS16475_SCAN_GYRO_Z] = ADIS16475_REG_Z_GYRO_BIAS_L,
0427     [ADIS16475_SCAN_ACCEL_X] = ADIS16475_REG_X_ACCEL_BIAS_L,
0428     [ADIS16475_SCAN_ACCEL_Y] = ADIS16475_REG_Y_ACCEL_BIAS_L,
0429     [ADIS16475_SCAN_ACCEL_Z] = ADIS16475_REG_Z_ACCEL_BIAS_L,
0430 };
0431 
0432 static int adis16475_read_raw(struct iio_dev *indio_dev,
0433                   const struct iio_chan_spec *chan,
0434                   int *val, int *val2, long info)
0435 {
0436     struct adis16475 *st = iio_priv(indio_dev);
0437     int ret;
0438     u32 tmp;
0439 
0440     switch (info) {
0441     case IIO_CHAN_INFO_RAW:
0442         return adis_single_conversion(indio_dev, chan, 0, val);
0443     case IIO_CHAN_INFO_SCALE:
0444         switch (chan->type) {
0445         case IIO_ANGL_VEL:
0446             *val = st->info->gyro_max_val;
0447             *val2 = st->info->gyro_max_scale;
0448             return IIO_VAL_FRACTIONAL;
0449         case IIO_ACCEL:
0450             *val = st->info->accel_max_val;
0451             *val2 = st->info->accel_max_scale;
0452             return IIO_VAL_FRACTIONAL;
0453         case IIO_TEMP:
0454             *val = st->info->temp_scale;
0455             return IIO_VAL_INT;
0456         default:
0457             return -EINVAL;
0458         }
0459     case IIO_CHAN_INFO_CALIBBIAS:
0460         ret = adis_read_reg_32(&st->adis,
0461                        adis16475_calib_regs[chan->scan_index],
0462                        val);
0463         if (ret)
0464             return ret;
0465 
0466         return IIO_VAL_INT;
0467     case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
0468         ret = adis16475_get_filter(st, val);
0469         if (ret)
0470             return ret;
0471 
0472         return IIO_VAL_INT;
0473     case IIO_CHAN_INFO_SAMP_FREQ:
0474         ret = adis16475_get_freq(st, &tmp);
0475         if (ret)
0476             return ret;
0477 
0478         *val = tmp / 1000;
0479         *val2 = (tmp % 1000) * 1000;
0480         return IIO_VAL_INT_PLUS_MICRO;
0481     default:
0482         return -EINVAL;
0483     }
0484 }
0485 
0486 static int adis16475_write_raw(struct iio_dev *indio_dev,
0487                    const struct iio_chan_spec *chan,
0488                    int val, int val2, long info)
0489 {
0490     struct adis16475 *st = iio_priv(indio_dev);
0491     u32 tmp;
0492 
0493     switch (info) {
0494     case IIO_CHAN_INFO_SAMP_FREQ:
0495         tmp = val * 1000 + val2 / 1000;
0496         return adis16475_set_freq(st, tmp);
0497     case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
0498         return adis16475_set_filter(st, val);
0499     case IIO_CHAN_INFO_CALIBBIAS:
0500         return adis_write_reg_32(&st->adis,
0501                      adis16475_calib_regs[chan->scan_index],
0502                      val);
0503     default:
0504         return -EINVAL;
0505     }
0506 }
0507 
0508 #define ADIS16475_MOD_CHAN(_type, _mod, _address, _si, _r_bits, _s_bits) \
0509     { \
0510         .type = (_type), \
0511         .modified = 1, \
0512         .channel2 = (_mod), \
0513         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0514             BIT(IIO_CHAN_INFO_CALIBBIAS), \
0515         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0516         .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
0517             BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
0518         .address = (_address), \
0519         .scan_index = (_si), \
0520         .scan_type = { \
0521             .sign = 's', \
0522             .realbits = (_r_bits), \
0523             .storagebits = (_s_bits), \
0524             .endianness = IIO_BE, \
0525         }, \
0526     }
0527 
0528 #define ADIS16475_GYRO_CHANNEL(_mod) \
0529     ADIS16475_MOD_CHAN(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
0530                ADIS16475_REG_ ## _mod ## _GYRO_L, \
0531                ADIS16475_SCAN_GYRO_ ## _mod, 32, 32)
0532 
0533 #define ADIS16475_ACCEL_CHANNEL(_mod) \
0534     ADIS16475_MOD_CHAN(IIO_ACCEL, IIO_MOD_ ## _mod, \
0535                ADIS16475_REG_ ## _mod ## _ACCEL_L, \
0536                ADIS16475_SCAN_ACCEL_ ## _mod, 32, 32)
0537 
0538 #define ADIS16475_TEMP_CHANNEL() { \
0539         .type = IIO_TEMP, \
0540         .indexed = 1, \
0541         .channel = 0, \
0542         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0543             BIT(IIO_CHAN_INFO_SCALE), \
0544         .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
0545             BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
0546         .address = ADIS16475_REG_TEMP_OUT, \
0547         .scan_index = ADIS16475_SCAN_TEMP, \
0548         .scan_type = { \
0549             .sign = 's', \
0550             .realbits = 16, \
0551             .storagebits = 16, \
0552             .endianness = IIO_BE, \
0553         }, \
0554     }
0555 
0556 static const struct iio_chan_spec adis16475_channels[] = {
0557     ADIS16475_GYRO_CHANNEL(X),
0558     ADIS16475_GYRO_CHANNEL(Y),
0559     ADIS16475_GYRO_CHANNEL(Z),
0560     ADIS16475_ACCEL_CHANNEL(X),
0561     ADIS16475_ACCEL_CHANNEL(Y),
0562     ADIS16475_ACCEL_CHANNEL(Z),
0563     ADIS16475_TEMP_CHANNEL(),
0564     IIO_CHAN_SOFT_TIMESTAMP(7)
0565 };
0566 
0567 enum adis16475_variant {
0568     ADIS16470,
0569     ADIS16475_1,
0570     ADIS16475_2,
0571     ADIS16475_3,
0572     ADIS16477_1,
0573     ADIS16477_2,
0574     ADIS16477_3,
0575     ADIS16465_1,
0576     ADIS16465_2,
0577     ADIS16465_3,
0578     ADIS16467_1,
0579     ADIS16467_2,
0580     ADIS16467_3,
0581     ADIS16500,
0582     ADIS16505_1,
0583     ADIS16505_2,
0584     ADIS16505_3,
0585     ADIS16507_1,
0586     ADIS16507_2,
0587     ADIS16507_3,
0588 };
0589 
0590 enum {
0591     ADIS16475_DIAG_STAT_DATA_PATH = 1,
0592     ADIS16475_DIAG_STAT_FLASH_MEM,
0593     ADIS16475_DIAG_STAT_SPI,
0594     ADIS16475_DIAG_STAT_STANDBY,
0595     ADIS16475_DIAG_STAT_SENSOR,
0596     ADIS16475_DIAG_STAT_MEMORY,
0597     ADIS16475_DIAG_STAT_CLK,
0598 };
0599 
0600 static const char * const adis16475_status_error_msgs[] = {
0601     [ADIS16475_DIAG_STAT_DATA_PATH] = "Data Path Overrun",
0602     [ADIS16475_DIAG_STAT_FLASH_MEM] = "Flash memory update failure",
0603     [ADIS16475_DIAG_STAT_SPI] = "SPI communication error",
0604     [ADIS16475_DIAG_STAT_STANDBY] = "Standby mode",
0605     [ADIS16475_DIAG_STAT_SENSOR] = "Sensor failure",
0606     [ADIS16475_DIAG_STAT_MEMORY] = "Memory failure",
0607     [ADIS16475_DIAG_STAT_CLK] = "Clock error",
0608 };
0609 
0610 #define ADIS16475_DATA(_prod_id, _timeouts)             \
0611 {                                   \
0612     .msc_ctrl_reg = ADIS16475_REG_MSG_CTRL,             \
0613     .glob_cmd_reg = ADIS16475_REG_GLOB_CMD,             \
0614     .diag_stat_reg = ADIS16475_REG_DIAG_STAT,           \
0615     .prod_id_reg = ADIS16475_REG_PROD_ID,               \
0616     .prod_id = (_prod_id),                      \
0617     .self_test_mask = BIT(2),                   \
0618     .self_test_reg = ADIS16475_REG_GLOB_CMD,            \
0619     .cs_change_delay = 16,                      \
0620     .read_delay = 5,                        \
0621     .write_delay = 5,                       \
0622     .status_error_msgs = adis16475_status_error_msgs,       \
0623     .status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) |   \
0624         BIT(ADIS16475_DIAG_STAT_FLASH_MEM) |            \
0625         BIT(ADIS16475_DIAG_STAT_SPI) |              \
0626         BIT(ADIS16475_DIAG_STAT_STANDBY) |          \
0627         BIT(ADIS16475_DIAG_STAT_SENSOR) |           \
0628         BIT(ADIS16475_DIAG_STAT_MEMORY) |           \
0629         BIT(ADIS16475_DIAG_STAT_CLK),               \
0630     .unmasked_drdy = true,                      \
0631     .timeouts = (_timeouts),                    \
0632     .burst_reg_cmd = ADIS16475_REG_GLOB_CMD,            \
0633     .burst_len = ADIS16475_BURST_MAX_DATA,              \
0634     .burst_max_len = ADIS16475_BURST32_MAX_DATA,            \
0635     .burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED         \
0636 }
0637 
0638 static const struct adis16475_sync adis16475_sync_mode[] = {
0639     { ADIS16475_SYNC_OUTPUT },
0640     { ADIS16475_SYNC_DIRECT, 1900, 2100 },
0641     { ADIS16475_SYNC_SCALED, 1, 128 },
0642     { ADIS16475_SYNC_PULSE, 1000, 2100 },
0643 };
0644 
0645 static const struct adis_timeout adis16475_timeouts = {
0646     .reset_ms = 200,
0647     .sw_reset_ms = 200,
0648     .self_test_ms = 20,
0649 };
0650 
0651 static const struct adis_timeout adis1650x_timeouts = {
0652     .reset_ms = 260,
0653     .sw_reset_ms = 260,
0654     .self_test_ms = 30,
0655 };
0656 
0657 static const struct adis16475_chip_info adis16475_chip_info[] = {
0658     [ADIS16470] = {
0659         .name = "adis16470",
0660         .num_channels = ARRAY_SIZE(adis16475_channels),
0661         .channels = adis16475_channels,
0662         .gyro_max_val = 1,
0663         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0664         .accel_max_val = 1,
0665         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0666         .temp_scale = 100,
0667         .int_clk = 2000,
0668         .max_dec = 1999,
0669         .sync = adis16475_sync_mode,
0670         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0671         .adis_data = ADIS16475_DATA(16470, &adis16475_timeouts),
0672     },
0673     [ADIS16475_1] = {
0674         .name = "adis16475-1",
0675         .num_channels = ARRAY_SIZE(adis16475_channels),
0676         .channels = adis16475_channels,
0677         .gyro_max_val = 1,
0678         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0679         .accel_max_val = 1,
0680         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0681         .temp_scale = 100,
0682         .int_clk = 2000,
0683         .max_dec = 1999,
0684         .sync = adis16475_sync_mode,
0685         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0686         .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
0687     },
0688     [ADIS16475_2] = {
0689         .name = "adis16475-2",
0690         .num_channels = ARRAY_SIZE(adis16475_channels),
0691         .channels = adis16475_channels,
0692         .gyro_max_val = 1,
0693         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0694         .accel_max_val = 1,
0695         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0696         .temp_scale = 100,
0697         .int_clk = 2000,
0698         .max_dec = 1999,
0699         .sync = adis16475_sync_mode,
0700         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0701         .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
0702     },
0703     [ADIS16475_3] = {
0704         .name = "adis16475-3",
0705         .num_channels = ARRAY_SIZE(adis16475_channels),
0706         .channels = adis16475_channels,
0707         .gyro_max_val = 1,
0708         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0709         .accel_max_val = 1,
0710         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0711         .temp_scale = 100,
0712         .int_clk = 2000,
0713         .max_dec = 1999,
0714         .sync = adis16475_sync_mode,
0715         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0716         .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
0717     },
0718     [ADIS16477_1] = {
0719         .name = "adis16477-1",
0720         .num_channels = ARRAY_SIZE(adis16475_channels),
0721         .channels = adis16475_channels,
0722         .gyro_max_val = 1,
0723         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0724         .accel_max_val = 1,
0725         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0726         .temp_scale = 100,
0727         .int_clk = 2000,
0728         .max_dec = 1999,
0729         .sync = adis16475_sync_mode,
0730         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0731         .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
0732     },
0733     [ADIS16477_2] = {
0734         .name = "adis16477-2",
0735         .num_channels = ARRAY_SIZE(adis16475_channels),
0736         .channels = adis16475_channels,
0737         .gyro_max_val = 1,
0738         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0739         .accel_max_val = 1,
0740         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0741         .temp_scale = 100,
0742         .int_clk = 2000,
0743         .max_dec = 1999,
0744         .sync = adis16475_sync_mode,
0745         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0746         .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
0747     },
0748     [ADIS16477_3] = {
0749         .name = "adis16477-3",
0750         .num_channels = ARRAY_SIZE(adis16475_channels),
0751         .channels = adis16475_channels,
0752         .gyro_max_val = 1,
0753         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0754         .accel_max_val = 1,
0755         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0756         .temp_scale = 100,
0757         .int_clk = 2000,
0758         .max_dec = 1999,
0759         .sync = adis16475_sync_mode,
0760         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0761         .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
0762     },
0763     [ADIS16465_1] = {
0764         .name = "adis16465-1",
0765         .num_channels = ARRAY_SIZE(adis16475_channels),
0766         .channels = adis16475_channels,
0767         .gyro_max_val = 1,
0768         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0769         .accel_max_val = 1,
0770         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0771         .temp_scale = 100,
0772         .int_clk = 2000,
0773         .max_dec = 1999,
0774         .sync = adis16475_sync_mode,
0775         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0776         .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
0777     },
0778     [ADIS16465_2] = {
0779         .name = "adis16465-2",
0780         .num_channels = ARRAY_SIZE(adis16475_channels),
0781         .channels = adis16475_channels,
0782         .gyro_max_val = 1,
0783         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0784         .accel_max_val = 1,
0785         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0786         .temp_scale = 100,
0787         .int_clk = 2000,
0788         .max_dec = 1999,
0789         .sync = adis16475_sync_mode,
0790         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0791         .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
0792     },
0793     [ADIS16465_3] = {
0794         .name = "adis16465-3",
0795         .num_channels = ARRAY_SIZE(adis16475_channels),
0796         .channels = adis16475_channels,
0797         .gyro_max_val = 1,
0798         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0799         .accel_max_val = 1,
0800         .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
0801         .temp_scale = 100,
0802         .int_clk = 2000,
0803         .max_dec = 1999,
0804         .sync = adis16475_sync_mode,
0805         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0806         .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
0807     },
0808     [ADIS16467_1] = {
0809         .name = "adis16467-1",
0810         .num_channels = ARRAY_SIZE(adis16475_channels),
0811         .channels = adis16475_channels,
0812         .gyro_max_val = 1,
0813         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0814         .accel_max_val = 1,
0815         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0816         .temp_scale = 100,
0817         .int_clk = 2000,
0818         .max_dec = 1999,
0819         .sync = adis16475_sync_mode,
0820         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0821         .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
0822     },
0823     [ADIS16467_2] = {
0824         .name = "adis16467-2",
0825         .num_channels = ARRAY_SIZE(adis16475_channels),
0826         .channels = adis16475_channels,
0827         .gyro_max_val = 1,
0828         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0829         .accel_max_val = 1,
0830         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0831         .temp_scale = 100,
0832         .int_clk = 2000,
0833         .max_dec = 1999,
0834         .sync = adis16475_sync_mode,
0835         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0836         .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
0837     },
0838     [ADIS16467_3] = {
0839         .name = "adis16467-3",
0840         .num_channels = ARRAY_SIZE(adis16475_channels),
0841         .channels = adis16475_channels,
0842         .gyro_max_val = 1,
0843         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0844         .accel_max_val = 1,
0845         .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
0846         .temp_scale = 100,
0847         .int_clk = 2000,
0848         .max_dec = 1999,
0849         .sync = adis16475_sync_mode,
0850         .num_sync = ARRAY_SIZE(adis16475_sync_mode),
0851         .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
0852     },
0853     [ADIS16500] = {
0854         .name = "adis16500",
0855         .num_channels = ARRAY_SIZE(adis16475_channels),
0856         .channels = adis16475_channels,
0857         .gyro_max_val = 1,
0858         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0859         .accel_max_val = 392,
0860         .accel_max_scale = 32000 << 16,
0861         .temp_scale = 100,
0862         .int_clk = 2000,
0863         .max_dec = 1999,
0864         .sync = adis16475_sync_mode,
0865         /* pulse sync not supported */
0866         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0867         .has_burst32 = true,
0868         .adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts),
0869     },
0870     [ADIS16505_1] = {
0871         .name = "adis16505-1",
0872         .num_channels = ARRAY_SIZE(adis16475_channels),
0873         .channels = adis16475_channels,
0874         .gyro_max_val = 1,
0875         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0876         .accel_max_val = 78,
0877         .accel_max_scale = 32000 << 16,
0878         .temp_scale = 100,
0879         .int_clk = 2000,
0880         .max_dec = 1999,
0881         .sync = adis16475_sync_mode,
0882         /* pulse sync not supported */
0883         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0884         .has_burst32 = true,
0885         .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
0886     },
0887     [ADIS16505_2] = {
0888         .name = "adis16505-2",
0889         .num_channels = ARRAY_SIZE(adis16475_channels),
0890         .channels = adis16475_channels,
0891         .gyro_max_val = 1,
0892         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0893         .accel_max_val = 78,
0894         .accel_max_scale = 32000 << 16,
0895         .temp_scale = 100,
0896         .int_clk = 2000,
0897         .max_dec = 1999,
0898         .sync = adis16475_sync_mode,
0899         /* pulse sync not supported */
0900         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0901         .has_burst32 = true,
0902         .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
0903     },
0904     [ADIS16505_3] = {
0905         .name = "adis16505-3",
0906         .num_channels = ARRAY_SIZE(adis16475_channels),
0907         .channels = adis16475_channels,
0908         .gyro_max_val = 1,
0909         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0910         .accel_max_val = 78,
0911         .accel_max_scale = 32000 << 16,
0912         .temp_scale = 100,
0913         .int_clk = 2000,
0914         .max_dec = 1999,
0915         .sync = adis16475_sync_mode,
0916         /* pulse sync not supported */
0917         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0918         .has_burst32 = true,
0919         .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
0920     },
0921     [ADIS16507_1] = {
0922         .name = "adis16507-1",
0923         .num_channels = ARRAY_SIZE(adis16475_channels),
0924         .channels = adis16475_channels,
0925         .gyro_max_val = 1,
0926         .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
0927         .accel_max_val = 392,
0928         .accel_max_scale = 32000 << 16,
0929         .temp_scale = 100,
0930         .int_clk = 2000,
0931         .max_dec = 1999,
0932         .sync = adis16475_sync_mode,
0933         /* pulse sync not supported */
0934         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0935         .has_burst32 = true,
0936         .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
0937     },
0938     [ADIS16507_2] = {
0939         .name = "adis16507-2",
0940         .num_channels = ARRAY_SIZE(adis16475_channels),
0941         .channels = adis16475_channels,
0942         .gyro_max_val = 1,
0943         .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
0944         .accel_max_val = 392,
0945         .accel_max_scale = 32000 << 16,
0946         .temp_scale = 100,
0947         .int_clk = 2000,
0948         .max_dec = 1999,
0949         .sync = adis16475_sync_mode,
0950         /* pulse sync not supported */
0951         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0952         .has_burst32 = true,
0953         .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
0954     },
0955     [ADIS16507_3] = {
0956         .name = "adis16507-3",
0957         .num_channels = ARRAY_SIZE(adis16475_channels),
0958         .channels = adis16475_channels,
0959         .gyro_max_val = 1,
0960         .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
0961         .accel_max_val = 392,
0962         .accel_max_scale = 32000 << 16,
0963         .temp_scale = 100,
0964         .int_clk = 2000,
0965         .max_dec = 1999,
0966         .sync = adis16475_sync_mode,
0967         /* pulse sync not supported */
0968         .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
0969         .has_burst32 = true,
0970         .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
0971     },
0972 };
0973 
0974 static const struct iio_info adis16475_info = {
0975     .read_raw = &adis16475_read_raw,
0976     .write_raw = &adis16475_write_raw,
0977     .update_scan_mode = adis_update_scan_mode,
0978     .debugfs_reg_access = adis_debugfs_reg_access,
0979 };
0980 
0981 static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
0982                    const bool burst32)
0983 {
0984     int i;
0985     /* extra 6 elements for low gyro and accel */
0986     const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA :
0987         ADIS16475_BURST_MAX_DATA;
0988 
0989     for (i = 0; i < sz - 2; i++)
0990         crc -= buffer[i];
0991 
0992     return crc == 0;
0993 }
0994 
0995 static void adis16475_burst32_check(struct adis16475 *st)
0996 {
0997     int ret;
0998     struct adis *adis = &st->adis;
0999 
1000     if (!st->info->has_burst32)
1001         return;
1002 
1003     if (st->lsb_flag && !st->burst32) {
1004         const u16 en = ADIS16500_BURST32(1);
1005 
1006         ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1007                      ADIS16500_BURST32_MASK, en);
1008         if (ret)
1009             return;
1010 
1011         st->burst32 = true;
1012 
1013         /*
1014          * In 32-bit mode we need extra 2 bytes for all gyro
1015          * and accel channels.
1016          */
1017         adis->burst_extra_len = 6 * sizeof(u16);
1018         adis->xfer[1].len += 6 * sizeof(u16);
1019         dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d",
1020             adis->xfer[1].len);
1021 
1022     } else if (!st->lsb_flag && st->burst32) {
1023         const u16 en = ADIS16500_BURST32(0);
1024 
1025         ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1026                      ADIS16500_BURST32_MASK, en);
1027         if (ret)
1028             return;
1029 
1030         st->burst32 = false;
1031 
1032         /* Remove the extra bits */
1033         adis->burst_extra_len = 0;
1034         adis->xfer[1].len -= 6 * sizeof(u16);
1035         dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n",
1036             adis->xfer[1].len);
1037     }
1038 }
1039 
1040 static irqreturn_t adis16475_trigger_handler(int irq, void *p)
1041 {
1042     struct iio_poll_func *pf = p;
1043     struct iio_dev *indio_dev = pf->indio_dev;
1044     struct adis16475 *st = iio_priv(indio_dev);
1045     struct adis *adis = &st->adis;
1046     int ret, bit, i = 0;
1047     __be16 *buffer;
1048     u16 crc;
1049     bool valid;
1050     /* offset until the first element after gyro and accel */
1051     const u8 offset = st->burst32 ? 13 : 7;
1052 
1053     ret = spi_sync(adis->spi, &adis->msg);
1054     if (ret)
1055         goto check_burst32;
1056 
1057     buffer = adis->buffer;
1058 
1059     crc = be16_to_cpu(buffer[offset + 2]);
1060     valid = adis16475_validate_crc(adis->buffer, crc, st->burst32);
1061     if (!valid) {
1062         dev_err(&adis->spi->dev, "Invalid crc\n");
1063         goto check_burst32;
1064     }
1065 
1066     for_each_set_bit(bit, indio_dev->active_scan_mask,
1067              indio_dev->masklength) {
1068         /*
1069          * When burst mode is used, system flags is the first data
1070          * channel in the sequence, but the scan index is 7.
1071          */
1072         switch (bit) {
1073         case ADIS16475_SCAN_TEMP:
1074             st->data[i++] = buffer[offset];
1075             break;
1076         case ADIS16475_SCAN_GYRO_X ... ADIS16475_SCAN_ACCEL_Z:
1077             /*
1078              * The first 2 bytes on the received data are the
1079              * DIAG_STAT reg, hence the +1 offset here...
1080              */
1081             if (st->burst32) {
1082                 /* upper 16 */
1083                 st->data[i++] = buffer[bit * 2 + 2];
1084                 /* lower 16 */
1085                 st->data[i++] = buffer[bit * 2 + 1];
1086             } else {
1087                 st->data[i++] = buffer[bit + 1];
1088                 /*
1089                  * Don't bother in doing the manual read if the
1090                  * device supports burst32. burst32 will be
1091                  * enabled in the next call to
1092                  * adis16475_burst32_check()...
1093                  */
1094                 if (st->lsb_flag && !st->info->has_burst32) {
1095                     u16 val = 0;
1096                     const u32 reg = ADIS16475_REG_X_GYRO_L +
1097                         bit * 4;
1098 
1099                     adis_read_reg_16(adis, reg, &val);
1100                     st->data[i++] = cpu_to_be16(val);
1101                 } else {
1102                     /* lower not used */
1103                     st->data[i++] = 0;
1104                 }
1105             }
1106             break;
1107         }
1108     }
1109 
1110     iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
1111 check_burst32:
1112     /*
1113      * We only check the burst mode at the end of the current capture since
1114      * it takes a full data ready cycle for the device to update the burst
1115      * array.
1116      */
1117     adis16475_burst32_check(st);
1118     iio_trigger_notify_done(indio_dev->trig);
1119 
1120     return IRQ_HANDLED;
1121 }
1122 
1123 static void adis16475_disable_clk(void *data)
1124 {
1125     clk_disable_unprepare((struct clk *)data);
1126 }
1127 
1128 static int adis16475_config_sync_mode(struct adis16475 *st)
1129 {
1130     int ret;
1131     struct device *dev = &st->adis.spi->dev;
1132     const struct adis16475_sync *sync;
1133     u32 sync_mode;
1134 
1135     /* default to internal clk */
1136     st->clk_freq = st->info->int_clk * 1000;
1137 
1138     ret = device_property_read_u32(dev, "adi,sync-mode", &sync_mode);
1139     if (ret)
1140         return 0;
1141 
1142     if (sync_mode >= st->info->num_sync) {
1143         dev_err(dev, "Invalid sync mode: %u for %s\n", sync_mode,
1144             st->info->name);
1145         return -EINVAL;
1146     }
1147 
1148     sync = &st->info->sync[sync_mode];
1149     st->sync_mode = sync->sync_mode;
1150 
1151     /* All the other modes require external input signal */
1152     if (sync->sync_mode != ADIS16475_SYNC_OUTPUT) {
1153         struct clk *clk = devm_clk_get(dev, NULL);
1154 
1155         if (IS_ERR(clk))
1156             return PTR_ERR(clk);
1157 
1158         ret = clk_prepare_enable(clk);
1159         if (ret)
1160             return ret;
1161 
1162         ret = devm_add_action_or_reset(dev, adis16475_disable_clk, clk);
1163         if (ret)
1164             return ret;
1165 
1166         st->clk_freq = clk_get_rate(clk);
1167         if (st->clk_freq < sync->min_rate ||
1168             st->clk_freq > sync->max_rate) {
1169             dev_err(dev,
1170                 "Clk rate:%u not in a valid range:[%u %u]\n",
1171                 st->clk_freq, sync->min_rate, sync->max_rate);
1172             return -EINVAL;
1173         }
1174 
1175         if (sync->sync_mode == ADIS16475_SYNC_SCALED) {
1176             u16 up_scale;
1177 
1178             /*
1179              * In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
1180              * Hence, default the IMU sample rate to the highest multiple of the input
1181              * clock lower than the IMU max sample rate. The optimal range is
1182              * 1900-2100 sps...
1183              */
1184             up_scale = 2100 / st->clk_freq;
1185 
1186             ret = __adis_write_reg_16(&st->adis,
1187                           ADIS16475_REG_UP_SCALE,
1188                           up_scale);
1189             if (ret)
1190                 return ret;
1191         }
1192 
1193         st->clk_freq *= 1000;
1194     }
1195     /*
1196      * Keep in mind that the mask for the clk modes in adis1650*
1197      * chips is different (1100 instead of 11100). However, we
1198      * are not configuring BIT(4) in these chips and the default
1199      * value is 0, so we are fine in doing the below operations.
1200      * I'm keeping this for simplicity and avoiding extra variables
1201      * in chip_info.
1202      */
1203     ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1204                  ADIS16475_SYNC_MODE_MASK, sync->sync_mode);
1205     if (ret)
1206         return ret;
1207 
1208     usleep_range(250, 260);
1209 
1210     return 0;
1211 }
1212 
1213 static int adis16475_config_irq_pin(struct adis16475 *st)
1214 {
1215     int ret;
1216     struct irq_data *desc;
1217     u32 irq_type;
1218     u16 val = 0;
1219     u8 polarity;
1220     struct spi_device *spi = st->adis.spi;
1221 
1222     desc = irq_get_irq_data(spi->irq);
1223     if (!desc) {
1224         dev_err(&spi->dev, "Could not find IRQ %d\n", spi->irq);
1225         return -EINVAL;
1226     }
1227     /*
1228      * It is possible to configure the data ready polarity. Furthermore, we
1229      * need to update the adis struct if we want data ready as active low.
1230      */
1231     irq_type = irqd_get_trigger_type(desc);
1232     if (irq_type == IRQ_TYPE_EDGE_RISING) {
1233         polarity = 1;
1234         st->adis.irq_flag = IRQF_TRIGGER_RISING;
1235     } else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
1236         polarity = 0;
1237         st->adis.irq_flag = IRQF_TRIGGER_FALLING;
1238     } else {
1239         dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1240             irq_type);
1241         return -EINVAL;
1242     }
1243 
1244     val = ADIS16475_MSG_CTRL_DR_POL(polarity);
1245     ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1246                  ADIS16475_MSG_CTRL_DR_POL_MASK, val);
1247     if (ret)
1248         return ret;
1249     /*
1250      * There is a delay writing to any bits written to the MSC_CTRL
1251      * register. It should not be bigger than 200us, so 250 should be more
1252      * than enough!
1253      */
1254     usleep_range(250, 260);
1255 
1256     return 0;
1257 }
1258 
1259 static const struct of_device_id adis16475_of_match[] = {
1260     { .compatible = "adi,adis16470",
1261         .data = &adis16475_chip_info[ADIS16470] },
1262     { .compatible = "adi,adis16475-1",
1263         .data = &adis16475_chip_info[ADIS16475_1] },
1264     { .compatible = "adi,adis16475-2",
1265         .data = &adis16475_chip_info[ADIS16475_2] },
1266     { .compatible = "adi,adis16475-3",
1267         .data = &adis16475_chip_info[ADIS16475_3] },
1268     { .compatible = "adi,adis16477-1",
1269         .data = &adis16475_chip_info[ADIS16477_1] },
1270     { .compatible = "adi,adis16477-2",
1271         .data = &adis16475_chip_info[ADIS16477_2] },
1272     { .compatible = "adi,adis16477-3",
1273         .data = &adis16475_chip_info[ADIS16477_3] },
1274     { .compatible = "adi,adis16465-1",
1275         .data = &adis16475_chip_info[ADIS16465_1] },
1276     { .compatible = "adi,adis16465-2",
1277         .data = &adis16475_chip_info[ADIS16465_2] },
1278     { .compatible = "adi,adis16465-3",
1279         .data = &adis16475_chip_info[ADIS16465_3] },
1280     { .compatible = "adi,adis16467-1",
1281         .data = &adis16475_chip_info[ADIS16467_1] },
1282     { .compatible = "adi,adis16467-2",
1283         .data = &adis16475_chip_info[ADIS16467_2] },
1284     { .compatible = "adi,adis16467-3",
1285         .data = &adis16475_chip_info[ADIS16467_3] },
1286     { .compatible = "adi,adis16500",
1287         .data = &adis16475_chip_info[ADIS16500] },
1288     { .compatible = "adi,adis16505-1",
1289         .data = &adis16475_chip_info[ADIS16505_1] },
1290     { .compatible = "adi,adis16505-2",
1291         .data = &adis16475_chip_info[ADIS16505_2] },
1292     { .compatible = "adi,adis16505-3",
1293         .data = &adis16475_chip_info[ADIS16505_3] },
1294     { .compatible = "adi,adis16507-1",
1295         .data = &adis16475_chip_info[ADIS16507_1] },
1296     { .compatible = "adi,adis16507-2",
1297         .data = &adis16475_chip_info[ADIS16507_2] },
1298     { .compatible = "adi,adis16507-3",
1299         .data = &adis16475_chip_info[ADIS16507_3] },
1300     { },
1301 };
1302 MODULE_DEVICE_TABLE(of, adis16475_of_match);
1303 
1304 static int adis16475_probe(struct spi_device *spi)
1305 {
1306     struct iio_dev *indio_dev;
1307     struct adis16475 *st;
1308     int ret;
1309 
1310     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1311     if (!indio_dev)
1312         return -ENOMEM;
1313 
1314     st = iio_priv(indio_dev);
1315 
1316     st->info = device_get_match_data(&spi->dev);
1317     if (!st->info)
1318         return -EINVAL;
1319 
1320     ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
1321     if (ret)
1322         return ret;
1323 
1324     indio_dev->name = st->info->name;
1325     indio_dev->channels = st->info->channels;
1326     indio_dev->num_channels = st->info->num_channels;
1327     indio_dev->info = &adis16475_info;
1328     indio_dev->modes = INDIO_DIRECT_MODE;
1329 
1330     ret = __adis_initial_startup(&st->adis);
1331     if (ret)
1332         return ret;
1333 
1334     ret = adis16475_config_irq_pin(st);
1335     if (ret)
1336         return ret;
1337 
1338     ret = adis16475_config_sync_mode(st);
1339     if (ret)
1340         return ret;
1341 
1342     ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
1343                          adis16475_trigger_handler);
1344     if (ret)
1345         return ret;
1346 
1347     ret = devm_iio_device_register(&spi->dev, indio_dev);
1348     if (ret)
1349         return ret;
1350 
1351     adis16475_debugfs_init(indio_dev);
1352 
1353     return 0;
1354 }
1355 
1356 static struct spi_driver adis16475_driver = {
1357     .driver = {
1358         .name = "adis16475",
1359         .of_match_table = adis16475_of_match,
1360     },
1361     .probe = adis16475_probe,
1362 };
1363 module_spi_driver(adis16475_driver);
1364 
1365 MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
1366 MODULE_DESCRIPTION("Analog Devices ADIS16475 IMU driver");
1367 MODULE_LICENSE("GPL");
1368 MODULE_IMPORT_NS(IIO_ADISLIB);
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