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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
0004  *
0005  * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
0006  *  Andrew F. Davis <afd@ti.com>
0007  */
0008 
0009 #include <linux/device.h>
0010 #include <linux/err.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/regmap.h>
0015 #include <linux/spi/spi.h>
0016 #include <linux/sysfs.h>
0017 #include <linux/regulator/consumer.h>
0018 
0019 #include <linux/iio/iio.h>
0020 #include <linux/iio/sysfs.h>
0021 #include <linux/iio/buffer.h>
0022 #include <linux/iio/trigger.h>
0023 #include <linux/iio/triggered_buffer.h>
0024 #include <linux/iio/trigger_consumer.h>
0025 
0026 #include <asm/unaligned.h>
0027 
0028 #include "afe440x.h"
0029 
0030 #define AFE4403_DRIVER_NAME     "afe4403"
0031 
0032 /* AFE4403 Registers */
0033 #define AFE4403_TIAGAIN         0x20
0034 #define AFE4403_TIA_AMB_GAIN        0x21
0035 
0036 enum afe4403_fields {
0037     /* Gains */
0038     F_RF_LED1, F_CF_LED1,
0039     F_RF_LED, F_CF_LED,
0040 
0041     /* LED Current */
0042     F_ILED1, F_ILED2,
0043 
0044     /* sentinel */
0045     F_MAX_FIELDS
0046 };
0047 
0048 static const struct reg_field afe4403_reg_fields[] = {
0049     /* Gains */
0050     [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
0051     [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
0052     [F_RF_LED]  = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
0053     [F_CF_LED]  = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
0054     /* LED Current */
0055     [F_ILED1]   = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
0056     [F_ILED2]   = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
0057 };
0058 
0059 /**
0060  * struct afe4403_data - AFE4403 device instance data
0061  * @dev: Device structure
0062  * @spi: SPI device handle
0063  * @regmap: Register map of the device
0064  * @fields: Register fields of the device
0065  * @regulator: Pointer to the regulator for the IC
0066  * @trig: IIO trigger for this device
0067  * @irq: ADC_RDY line interrupt number
0068  * @buffer: Used to construct data layout to push into IIO buffer.
0069  */
0070 struct afe4403_data {
0071     struct device *dev;
0072     struct spi_device *spi;
0073     struct regmap *regmap;
0074     struct regmap_field *fields[F_MAX_FIELDS];
0075     struct regulator *regulator;
0076     struct iio_trigger *trig;
0077     int irq;
0078     /* Ensure suitable alignment for timestamp */
0079     s32 buffer[8] __aligned(8);
0080 };
0081 
0082 enum afe4403_chan_id {
0083     LED2 = 1,
0084     ALED2,
0085     LED1,
0086     ALED1,
0087     LED2_ALED2,
0088     LED1_ALED1,
0089 };
0090 
0091 static const unsigned int afe4403_channel_values[] = {
0092     [LED2] = AFE440X_LED2VAL,
0093     [ALED2] = AFE440X_ALED2VAL,
0094     [LED1] = AFE440X_LED1VAL,
0095     [ALED1] = AFE440X_ALED1VAL,
0096     [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
0097     [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
0098 };
0099 
0100 static const unsigned int afe4403_channel_leds[] = {
0101     [LED2] = F_ILED2,
0102     [LED1] = F_ILED1,
0103 };
0104 
0105 static const struct iio_chan_spec afe4403_channels[] = {
0106     /* ADC values */
0107     AFE440X_INTENSITY_CHAN(LED2, 0),
0108     AFE440X_INTENSITY_CHAN(ALED2, 0),
0109     AFE440X_INTENSITY_CHAN(LED1, 0),
0110     AFE440X_INTENSITY_CHAN(ALED1, 0),
0111     AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
0112     AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
0113     /* LED current */
0114     AFE440X_CURRENT_CHAN(LED2),
0115     AFE440X_CURRENT_CHAN(LED1),
0116 };
0117 
0118 static const struct afe440x_val_table afe4403_res_table[] = {
0119     { 500000 }, { 250000 }, { 100000 }, { 50000 },
0120     { 25000 }, { 10000 }, { 1000000 }, { 0 },
0121 };
0122 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
0123 
0124 static const struct afe440x_val_table afe4403_cap_table[] = {
0125     { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
0126     { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
0127     { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
0128     { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
0129     { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
0130     { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
0131     { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
0132     { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
0133 };
0134 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
0135 
0136 static ssize_t afe440x_show_register(struct device *dev,
0137                      struct device_attribute *attr,
0138                      char *buf)
0139 {
0140     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0141     struct afe4403_data *afe = iio_priv(indio_dev);
0142     struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
0143     unsigned int reg_val;
0144     int vals[2];
0145     int ret;
0146 
0147     ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
0148     if (ret)
0149         return ret;
0150 
0151     if (reg_val >= afe440x_attr->table_size)
0152         return -EINVAL;
0153 
0154     vals[0] = afe440x_attr->val_table[reg_val].integer;
0155     vals[1] = afe440x_attr->val_table[reg_val].fract;
0156 
0157     return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
0158 }
0159 
0160 static ssize_t afe440x_store_register(struct device *dev,
0161                       struct device_attribute *attr,
0162                       const char *buf, size_t count)
0163 {
0164     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0165     struct afe4403_data *afe = iio_priv(indio_dev);
0166     struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
0167     int val, integer, fract, ret;
0168 
0169     ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
0170     if (ret)
0171         return ret;
0172 
0173     for (val = 0; val < afe440x_attr->table_size; val++)
0174         if (afe440x_attr->val_table[val].integer == integer &&
0175             afe440x_attr->val_table[val].fract == fract)
0176             break;
0177     if (val == afe440x_attr->table_size)
0178         return -EINVAL;
0179 
0180     ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
0181     if (ret)
0182         return ret;
0183 
0184     return count;
0185 }
0186 
0187 static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
0188 static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
0189 
0190 static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
0191 static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
0192 
0193 static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
0194 static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
0195 
0196 static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
0197 static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
0198 
0199 static struct attribute *afe440x_attributes[] = {
0200     &dev_attr_in_intensity_resistance_available.attr,
0201     &dev_attr_in_intensity_capacitance_available.attr,
0202     &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
0203     &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
0204     &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
0205     &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
0206     &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
0207     &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
0208     &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
0209     &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
0210     NULL
0211 };
0212 
0213 static const struct attribute_group afe440x_attribute_group = {
0214     .attrs = afe440x_attributes
0215 };
0216 
0217 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
0218 {
0219     u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
0220     u8 rx[3];
0221     int ret;
0222 
0223     /* Enable reading from the device */
0224     ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
0225     if (ret)
0226         return ret;
0227 
0228     ret = spi_write_then_read(afe->spi, &reg, 1, rx, sizeof(rx));
0229     if (ret)
0230         return ret;
0231 
0232     *val = get_unaligned_be24(&rx[0]);
0233 
0234     /* Disable reading from the device */
0235     tx[3] = AFE440X_CONTROL0_WRITE;
0236     ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
0237     if (ret)
0238         return ret;
0239 
0240     return 0;
0241 }
0242 
0243 static int afe4403_read_raw(struct iio_dev *indio_dev,
0244                 struct iio_chan_spec const *chan,
0245                 int *val, int *val2, long mask)
0246 {
0247     struct afe4403_data *afe = iio_priv(indio_dev);
0248     unsigned int reg = afe4403_channel_values[chan->address];
0249     unsigned int field = afe4403_channel_leds[chan->address];
0250     int ret;
0251 
0252     switch (chan->type) {
0253     case IIO_INTENSITY:
0254         switch (mask) {
0255         case IIO_CHAN_INFO_RAW:
0256             ret = afe4403_read(afe, reg, val);
0257             if (ret)
0258                 return ret;
0259             return IIO_VAL_INT;
0260         }
0261         break;
0262     case IIO_CURRENT:
0263         switch (mask) {
0264         case IIO_CHAN_INFO_RAW:
0265             ret = regmap_field_read(afe->fields[field], val);
0266             if (ret)
0267                 return ret;
0268             return IIO_VAL_INT;
0269         case IIO_CHAN_INFO_SCALE:
0270             *val = 0;
0271             *val2 = 800000;
0272             return IIO_VAL_INT_PLUS_MICRO;
0273         }
0274         break;
0275     default:
0276         break;
0277     }
0278 
0279     return -EINVAL;
0280 }
0281 
0282 static int afe4403_write_raw(struct iio_dev *indio_dev,
0283                  struct iio_chan_spec const *chan,
0284                  int val, int val2, long mask)
0285 {
0286     struct afe4403_data *afe = iio_priv(indio_dev);
0287     unsigned int field = afe4403_channel_leds[chan->address];
0288 
0289     switch (chan->type) {
0290     case IIO_CURRENT:
0291         switch (mask) {
0292         case IIO_CHAN_INFO_RAW:
0293             return regmap_field_write(afe->fields[field], val);
0294         }
0295         break;
0296     default:
0297         break;
0298     }
0299 
0300     return -EINVAL;
0301 }
0302 
0303 static const struct iio_info afe4403_iio_info = {
0304     .attrs = &afe440x_attribute_group,
0305     .read_raw = afe4403_read_raw,
0306     .write_raw = afe4403_write_raw,
0307 };
0308 
0309 static irqreturn_t afe4403_trigger_handler(int irq, void *private)
0310 {
0311     struct iio_poll_func *pf = private;
0312     struct iio_dev *indio_dev = pf->indio_dev;
0313     struct afe4403_data *afe = iio_priv(indio_dev);
0314     int ret, bit, i = 0;
0315     u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
0316     u8 rx[3];
0317 
0318     /* Enable reading from the device */
0319     ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
0320     if (ret)
0321         goto err;
0322 
0323     for_each_set_bit(bit, indio_dev->active_scan_mask,
0324              indio_dev->masklength) {
0325         ret = spi_write_then_read(afe->spi,
0326                       &afe4403_channel_values[bit], 1,
0327                       rx, sizeof(rx));
0328         if (ret)
0329             goto err;
0330 
0331         afe->buffer[i++] = get_unaligned_be24(&rx[0]);
0332     }
0333 
0334     /* Disable reading from the device */
0335     tx[3] = AFE440X_CONTROL0_WRITE;
0336     ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
0337     if (ret)
0338         goto err;
0339 
0340     iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
0341                        pf->timestamp);
0342 err:
0343     iio_trigger_notify_done(indio_dev->trig);
0344 
0345     return IRQ_HANDLED;
0346 }
0347 
0348 #define AFE4403_TIMING_PAIRS            \
0349     { AFE440X_LED2STC,  0x000050 }, \
0350     { AFE440X_LED2ENDC, 0x0003e7 }, \
0351     { AFE440X_LED1LEDSTC,   0x0007d0 }, \
0352     { AFE440X_LED1LEDENDC,  0x000bb7 }, \
0353     { AFE440X_ALED2STC, 0x000438 }, \
0354     { AFE440X_ALED2ENDC,    0x0007cf }, \
0355     { AFE440X_LED1STC,  0x000820 }, \
0356     { AFE440X_LED1ENDC, 0x000bb7 }, \
0357     { AFE440X_LED2LEDSTC,   0x000000 }, \
0358     { AFE440X_LED2LEDENDC,  0x0003e7 }, \
0359     { AFE440X_ALED1STC, 0x000c08 }, \
0360     { AFE440X_ALED1ENDC,    0x000f9f }, \
0361     { AFE440X_LED2CONVST,   0x0003ef }, \
0362     { AFE440X_LED2CONVEND,  0x0007cf }, \
0363     { AFE440X_ALED2CONVST,  0x0007d7 }, \
0364     { AFE440X_ALED2CONVEND, 0x000bb7 }, \
0365     { AFE440X_LED1CONVST,   0x000bbf }, \
0366     { AFE440X_LED1CONVEND,  0x009c3f }, \
0367     { AFE440X_ALED1CONVST,  0x000fa7 }, \
0368     { AFE440X_ALED1CONVEND, 0x001387 }, \
0369     { AFE440X_ADCRSTSTCT0,  0x0003e8 }, \
0370     { AFE440X_ADCRSTENDCT0, 0x0003eb }, \
0371     { AFE440X_ADCRSTSTCT1,  0x0007d0 }, \
0372     { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
0373     { AFE440X_ADCRSTSTCT2,  0x000bb8 }, \
0374     { AFE440X_ADCRSTENDCT2, 0x000bbb }, \
0375     { AFE440X_ADCRSTSTCT3,  0x000fa0 }, \
0376     { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
0377     { AFE440X_PRPCOUNT, 0x009c3f }, \
0378     { AFE440X_PDNCYCLESTC,  0x001518 }, \
0379     { AFE440X_PDNCYCLEENDC, 0x00991f }
0380 
0381 static const struct reg_sequence afe4403_reg_sequences[] = {
0382     AFE4403_TIMING_PAIRS,
0383     { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
0384     { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
0385 };
0386 
0387 static const struct regmap_range afe4403_yes_ranges[] = {
0388     regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
0389 };
0390 
0391 static const struct regmap_access_table afe4403_volatile_table = {
0392     .yes_ranges = afe4403_yes_ranges,
0393     .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
0394 };
0395 
0396 static const struct regmap_config afe4403_regmap_config = {
0397     .reg_bits = 8,
0398     .val_bits = 24,
0399 
0400     .max_register = AFE440X_PDNCYCLEENDC,
0401     .cache_type = REGCACHE_RBTREE,
0402     .volatile_table = &afe4403_volatile_table,
0403 };
0404 
0405 static const struct of_device_id afe4403_of_match[] = {
0406     { .compatible = "ti,afe4403", },
0407     { /* sentinel */ }
0408 };
0409 MODULE_DEVICE_TABLE(of, afe4403_of_match);
0410 
0411 static int afe4403_suspend(struct device *dev)
0412 {
0413     struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
0414     struct afe4403_data *afe = iio_priv(indio_dev);
0415     int ret;
0416 
0417     ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
0418                  AFE440X_CONTROL2_PDN_AFE,
0419                  AFE440X_CONTROL2_PDN_AFE);
0420     if (ret)
0421         return ret;
0422 
0423     ret = regulator_disable(afe->regulator);
0424     if (ret) {
0425         dev_err(dev, "Unable to disable regulator\n");
0426         return ret;
0427     }
0428 
0429     return 0;
0430 }
0431 
0432 static int afe4403_resume(struct device *dev)
0433 {
0434     struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
0435     struct afe4403_data *afe = iio_priv(indio_dev);
0436     int ret;
0437 
0438     ret = regulator_enable(afe->regulator);
0439     if (ret) {
0440         dev_err(dev, "Unable to enable regulator\n");
0441         return ret;
0442     }
0443 
0444     ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
0445                  AFE440X_CONTROL2_PDN_AFE, 0);
0446     if (ret)
0447         return ret;
0448 
0449     return 0;
0450 }
0451 
0452 static DEFINE_SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend,
0453                 afe4403_resume);
0454 
0455 static int afe4403_probe(struct spi_device *spi)
0456 {
0457     struct iio_dev *indio_dev;
0458     struct afe4403_data *afe;
0459     int i, ret;
0460 
0461     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe));
0462     if (!indio_dev)
0463         return -ENOMEM;
0464 
0465     afe = iio_priv(indio_dev);
0466     spi_set_drvdata(spi, indio_dev);
0467 
0468     afe->dev = &spi->dev;
0469     afe->spi = spi;
0470     afe->irq = spi->irq;
0471 
0472     afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
0473     if (IS_ERR(afe->regmap)) {
0474         dev_err(afe->dev, "Unable to allocate register map\n");
0475         return PTR_ERR(afe->regmap);
0476     }
0477 
0478     for (i = 0; i < F_MAX_FIELDS; i++) {
0479         afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
0480                              afe4403_reg_fields[i]);
0481         if (IS_ERR(afe->fields[i])) {
0482             dev_err(afe->dev, "Unable to allocate regmap fields\n");
0483             return PTR_ERR(afe->fields[i]);
0484         }
0485     }
0486 
0487     afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
0488     if (IS_ERR(afe->regulator))
0489         return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
0490                      "Unable to get regulator\n");
0491 
0492     ret = regulator_enable(afe->regulator);
0493     if (ret) {
0494         dev_err(afe->dev, "Unable to enable regulator\n");
0495         return ret;
0496     }
0497 
0498     ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
0499                AFE440X_CONTROL0_SW_RESET);
0500     if (ret) {
0501         dev_err(afe->dev, "Unable to reset device\n");
0502         goto err_disable_reg;
0503     }
0504 
0505     ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
0506                      ARRAY_SIZE(afe4403_reg_sequences));
0507     if (ret) {
0508         dev_err(afe->dev, "Unable to set register defaults\n");
0509         goto err_disable_reg;
0510     }
0511 
0512     indio_dev->modes = INDIO_DIRECT_MODE;
0513     indio_dev->channels = afe4403_channels;
0514     indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
0515     indio_dev->name = AFE4403_DRIVER_NAME;
0516     indio_dev->info = &afe4403_iio_info;
0517 
0518     if (afe->irq > 0) {
0519         afe->trig = devm_iio_trigger_alloc(afe->dev,
0520                            "%s-dev%d",
0521                            indio_dev->name,
0522                            iio_device_id(indio_dev));
0523         if (!afe->trig) {
0524             dev_err(afe->dev, "Unable to allocate IIO trigger\n");
0525             ret = -ENOMEM;
0526             goto err_disable_reg;
0527         }
0528 
0529         iio_trigger_set_drvdata(afe->trig, indio_dev);
0530 
0531         ret = iio_trigger_register(afe->trig);
0532         if (ret) {
0533             dev_err(afe->dev, "Unable to register IIO trigger\n");
0534             goto err_disable_reg;
0535         }
0536 
0537         ret = devm_request_threaded_irq(afe->dev, afe->irq,
0538                         iio_trigger_generic_data_rdy_poll,
0539                         NULL, IRQF_ONESHOT,
0540                         AFE4403_DRIVER_NAME,
0541                         afe->trig);
0542         if (ret) {
0543             dev_err(afe->dev, "Unable to request IRQ\n");
0544             goto err_trig;
0545         }
0546     }
0547 
0548     ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
0549                      afe4403_trigger_handler, NULL);
0550     if (ret) {
0551         dev_err(afe->dev, "Unable to setup buffer\n");
0552         goto err_trig;
0553     }
0554 
0555     ret = iio_device_register(indio_dev);
0556     if (ret) {
0557         dev_err(afe->dev, "Unable to register IIO device\n");
0558         goto err_buff;
0559     }
0560 
0561     return 0;
0562 
0563 err_buff:
0564     iio_triggered_buffer_cleanup(indio_dev);
0565 err_trig:
0566     if (afe->irq > 0)
0567         iio_trigger_unregister(afe->trig);
0568 err_disable_reg:
0569     regulator_disable(afe->regulator);
0570 
0571     return ret;
0572 }
0573 
0574 static void afe4403_remove(struct spi_device *spi)
0575 {
0576     struct iio_dev *indio_dev = spi_get_drvdata(spi);
0577     struct afe4403_data *afe = iio_priv(indio_dev);
0578     int ret;
0579 
0580     iio_device_unregister(indio_dev);
0581 
0582     iio_triggered_buffer_cleanup(indio_dev);
0583 
0584     if (afe->irq > 0)
0585         iio_trigger_unregister(afe->trig);
0586 
0587     ret = regulator_disable(afe->regulator);
0588     if (ret)
0589         dev_warn(afe->dev, "Unable to disable regulator\n");
0590 }
0591 
0592 static const struct spi_device_id afe4403_ids[] = {
0593     { "afe4403", 0 },
0594     { /* sentinel */ }
0595 };
0596 MODULE_DEVICE_TABLE(spi, afe4403_ids);
0597 
0598 static struct spi_driver afe4403_spi_driver = {
0599     .driver = {
0600         .name = AFE4403_DRIVER_NAME,
0601         .of_match_table = afe4403_of_match,
0602         .pm = pm_sleep_ptr(&afe4403_pm_ops),
0603     },
0604     .probe = afe4403_probe,
0605     .remove = afe4403_remove,
0606     .id_table = afe4403_ids,
0607 };
0608 module_spi_driver(afe4403_spi_driver);
0609 
0610 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
0611 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
0612 MODULE_LICENSE("GPL v2");
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