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0008 #include <linux/interrupt.h>
0009 #include <linux/irq.h>
0010 #include <linux/delay.h>
0011 #include <linux/mutex.h>
0012 #include <linux/device.h>
0013 #include <linux/kernel.h>
0014 #include <linux/spi/spi.h>
0015 #include <linux/slab.h>
0016 #include <linux/sysfs.h>
0017 #include <linux/list.h>
0018 #include <linux/module.h>
0019
0020 #include <linux/iio/iio.h>
0021 #include <linux/iio/sysfs.h>
0022
0023 #define ADXRS450_STARTUP_DELAY 50
0024
0025
0026 #define ADXRS450_SENSOR_DATA (0x20 << 24)
0027 #define ADXRS450_WRITE_DATA (0x40 << 24)
0028 #define ADXRS450_READ_DATA (0x80 << 24)
0029
0030 #define ADXRS450_RATE1 0x00
0031 #define ADXRS450_TEMP1 0x02
0032 #define ADXRS450_LOCST1 0x04
0033 #define ADXRS450_HICST1 0x06
0034 #define ADXRS450_QUAD1 0x08
0035 #define ADXRS450_FAULT1 0x0A
0036 #define ADXRS450_PID1 0x0C
0037 #define ADXRS450_SNH 0x0E
0038 #define ADXRS450_SNL 0x10
0039 #define ADXRS450_DNC1 0x12
0040
0041 #define ADXRS450_P 0x01
0042 #define ADXRS450_CHK 0x02
0043 #define ADXRS450_CST 0x04
0044 #define ADXRS450_PWR 0x08
0045 #define ADXRS450_POR 0x10
0046 #define ADXRS450_NVM 0x20
0047 #define ADXRS450_Q 0x40
0048 #define ADXRS450_PLL 0x80
0049 #define ADXRS450_UV 0x100
0050 #define ADXRS450_OV 0x200
0051 #define ADXRS450_AMP 0x400
0052 #define ADXRS450_FAIL 0x800
0053
0054 #define ADXRS450_WRERR_MASK (0x7 << 29)
0055
0056 #define ADXRS450_MAX_RX 4
0057 #define ADXRS450_MAX_TX 4
0058
0059 #define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
0060
0061 enum {
0062 ID_ADXRS450,
0063 ID_ADXRS453,
0064 };
0065
0066
0067
0068
0069
0070
0071
0072
0073 struct adxrs450_state {
0074 struct spi_device *us;
0075 struct mutex buf_lock;
0076 __be32 tx __aligned(IIO_DMA_MINALIGN);
0077 __be32 rx;
0078
0079 };
0080
0081
0082
0083
0084
0085
0086
0087
0088 static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
0089 u8 reg_address,
0090 u16 *val)
0091 {
0092 struct adxrs450_state *st = iio_priv(indio_dev);
0093 u32 tx;
0094 int ret;
0095 struct spi_transfer xfers[] = {
0096 {
0097 .tx_buf = &st->tx,
0098 .bits_per_word = 8,
0099 .len = sizeof(st->tx),
0100 .cs_change = 1,
0101 }, {
0102 .rx_buf = &st->rx,
0103 .bits_per_word = 8,
0104 .len = sizeof(st->rx),
0105 },
0106 };
0107
0108 mutex_lock(&st->buf_lock);
0109 tx = ADXRS450_READ_DATA | (reg_address << 17);
0110
0111 if (!(hweight32(tx) & 1))
0112 tx |= ADXRS450_P;
0113
0114 st->tx = cpu_to_be32(tx);
0115 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
0116 if (ret) {
0117 dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
0118 reg_address);
0119 goto error_ret;
0120 }
0121
0122 *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
0123
0124 error_ret:
0125 mutex_unlock(&st->buf_lock);
0126 return ret;
0127 }
0128
0129
0130
0131
0132
0133
0134
0135
0136 static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
0137 u8 reg_address,
0138 u16 val)
0139 {
0140 struct adxrs450_state *st = iio_priv(indio_dev);
0141 u32 tx;
0142 int ret;
0143
0144 mutex_lock(&st->buf_lock);
0145 tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
0146
0147 if (!(hweight32(tx) & 1))
0148 tx |= ADXRS450_P;
0149
0150 st->tx = cpu_to_be32(tx);
0151 ret = spi_write(st->us, &st->tx, sizeof(st->tx));
0152 if (ret)
0153 dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
0154 reg_address);
0155 usleep_range(100, 1000);
0156 mutex_unlock(&st->buf_lock);
0157 return ret;
0158 }
0159
0160
0161
0162
0163
0164
0165 static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
0166 {
0167 struct adxrs450_state *st = iio_priv(indio_dev);
0168 int ret;
0169 struct spi_transfer xfers[] = {
0170 {
0171 .tx_buf = &st->tx,
0172 .bits_per_word = 8,
0173 .len = sizeof(st->tx),
0174 .cs_change = 1,
0175 }, {
0176 .rx_buf = &st->rx,
0177 .bits_per_word = 8,
0178 .len = sizeof(st->rx),
0179 },
0180 };
0181
0182 mutex_lock(&st->buf_lock);
0183 st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
0184
0185 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
0186 if (ret) {
0187 dev_err(&st->us->dev, "Problem while reading sensor data\n");
0188 goto error_ret;
0189 }
0190
0191 *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
0192
0193 error_ret:
0194 mutex_unlock(&st->buf_lock);
0195 return ret;
0196 }
0197
0198
0199
0200
0201
0202
0203
0204 static int adxrs450_spi_initial(struct adxrs450_state *st,
0205 u32 *val, char chk)
0206 {
0207 int ret;
0208 u32 tx;
0209 struct spi_transfer xfers = {
0210 .tx_buf = &st->tx,
0211 .rx_buf = &st->rx,
0212 .bits_per_word = 8,
0213 .len = sizeof(st->tx),
0214 };
0215
0216 mutex_lock(&st->buf_lock);
0217 tx = ADXRS450_SENSOR_DATA;
0218 if (chk)
0219 tx |= (ADXRS450_CHK | ADXRS450_P);
0220 st->tx = cpu_to_be32(tx);
0221 ret = spi_sync_transfer(st->us, &xfers, 1);
0222 if (ret) {
0223 dev_err(&st->us->dev, "Problem while reading initializing data\n");
0224 goto error_ret;
0225 }
0226
0227 *val = be32_to_cpu(st->rx);
0228
0229 error_ret:
0230 mutex_unlock(&st->buf_lock);
0231 return ret;
0232 }
0233
0234
0235 static int adxrs450_initial_setup(struct iio_dev *indio_dev)
0236 {
0237 u32 t;
0238 u16 data;
0239 int ret;
0240 struct adxrs450_state *st = iio_priv(indio_dev);
0241
0242 msleep(ADXRS450_STARTUP_DELAY*2);
0243 ret = adxrs450_spi_initial(st, &t, 1);
0244 if (ret)
0245 return ret;
0246 if (t != 0x01)
0247 dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
0248
0249 msleep(ADXRS450_STARTUP_DELAY);
0250 ret = adxrs450_spi_initial(st, &t, 0);
0251 if (ret)
0252 return ret;
0253
0254 msleep(ADXRS450_STARTUP_DELAY);
0255 ret = adxrs450_spi_initial(st, &t, 0);
0256 if (ret)
0257 return ret;
0258 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
0259 dev_err(&st->us->dev, "The second response is not correct!\n");
0260 return -EIO;
0261
0262 }
0263 ret = adxrs450_spi_initial(st, &t, 0);
0264 if (ret)
0265 return ret;
0266 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
0267 dev_err(&st->us->dev, "The third response is not correct!\n");
0268 return -EIO;
0269
0270 }
0271 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
0272 if (ret)
0273 return ret;
0274 if (data & 0x0fff) {
0275 dev_err(&st->us->dev, "The device is not in normal status!\n");
0276 return -EINVAL;
0277 }
0278
0279 return 0;
0280 }
0281
0282 static int adxrs450_write_raw(struct iio_dev *indio_dev,
0283 struct iio_chan_spec const *chan,
0284 int val,
0285 int val2,
0286 long mask)
0287 {
0288 int ret;
0289 switch (mask) {
0290 case IIO_CHAN_INFO_CALIBBIAS:
0291 if (val < -0x400 || val >= 0x400)
0292 return -EINVAL;
0293 ret = adxrs450_spi_write_reg_16(indio_dev,
0294 ADXRS450_DNC1, val);
0295 break;
0296 default:
0297 ret = -EINVAL;
0298 break;
0299 }
0300 return ret;
0301 }
0302
0303 static int adxrs450_read_raw(struct iio_dev *indio_dev,
0304 struct iio_chan_spec const *chan,
0305 int *val,
0306 int *val2,
0307 long mask)
0308 {
0309 int ret;
0310 s16 t;
0311
0312 switch (mask) {
0313 case IIO_CHAN_INFO_RAW:
0314 switch (chan->type) {
0315 case IIO_ANGL_VEL:
0316 ret = adxrs450_spi_sensor_data(indio_dev, &t);
0317 if (ret)
0318 break;
0319 *val = t;
0320 ret = IIO_VAL_INT;
0321 break;
0322 case IIO_TEMP:
0323 ret = adxrs450_spi_read_reg_16(indio_dev,
0324 ADXRS450_TEMP1, &t);
0325 if (ret)
0326 break;
0327 *val = (t >> 6) + 225;
0328 ret = IIO_VAL_INT;
0329 break;
0330 default:
0331 ret = -EINVAL;
0332 break;
0333 }
0334 break;
0335 case IIO_CHAN_INFO_SCALE:
0336 switch (chan->type) {
0337 case IIO_ANGL_VEL:
0338 *val = 0;
0339 *val2 = 218166;
0340 return IIO_VAL_INT_PLUS_NANO;
0341 case IIO_TEMP:
0342 *val = 200;
0343 *val2 = 0;
0344 return IIO_VAL_INT;
0345 default:
0346 return -EINVAL;
0347 }
0348 case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
0349 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
0350 if (ret)
0351 break;
0352 *val = t;
0353 ret = IIO_VAL_INT;
0354 break;
0355 case IIO_CHAN_INFO_CALIBBIAS:
0356 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
0357 if (ret)
0358 break;
0359 *val = sign_extend32(t, 9);
0360 ret = IIO_VAL_INT;
0361 break;
0362 default:
0363 ret = -EINVAL;
0364 break;
0365 }
0366
0367 return ret;
0368 }
0369
0370 static const struct iio_chan_spec adxrs450_channels[2][2] = {
0371 [ID_ADXRS450] = {
0372 {
0373 .type = IIO_ANGL_VEL,
0374 .modified = 1,
0375 .channel2 = IIO_MOD_Z,
0376 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0377 BIT(IIO_CHAN_INFO_CALIBBIAS) |
0378 BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) |
0379 BIT(IIO_CHAN_INFO_SCALE),
0380 }, {
0381 .type = IIO_TEMP,
0382 .indexed = 1,
0383 .channel = 0,
0384 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0385 BIT(IIO_CHAN_INFO_SCALE),
0386 }
0387 },
0388 [ID_ADXRS453] = {
0389 {
0390 .type = IIO_ANGL_VEL,
0391 .modified = 1,
0392 .channel2 = IIO_MOD_Z,
0393 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0394 BIT(IIO_CHAN_INFO_SCALE) |
0395 BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW),
0396 }, {
0397 .type = IIO_TEMP,
0398 .indexed = 1,
0399 .channel = 0,
0400 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0401 BIT(IIO_CHAN_INFO_SCALE),
0402 }
0403 },
0404 };
0405
0406 static const struct iio_info adxrs450_info = {
0407 .read_raw = &adxrs450_read_raw,
0408 .write_raw = &adxrs450_write_raw,
0409 };
0410
0411 static int adxrs450_probe(struct spi_device *spi)
0412 {
0413 int ret;
0414 struct adxrs450_state *st;
0415 struct iio_dev *indio_dev;
0416
0417
0418 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0419 if (!indio_dev)
0420 return -ENOMEM;
0421 st = iio_priv(indio_dev);
0422 st->us = spi;
0423 mutex_init(&st->buf_lock);
0424
0425 spi_set_drvdata(spi, indio_dev);
0426
0427 indio_dev->info = &adxrs450_info;
0428 indio_dev->modes = INDIO_DIRECT_MODE;
0429 indio_dev->channels =
0430 adxrs450_channels[spi_get_device_id(spi)->driver_data];
0431 indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
0432 indio_dev->name = spi->dev.driver->name;
0433
0434 ret = devm_iio_device_register(&spi->dev, indio_dev);
0435 if (ret)
0436 return ret;
0437
0438
0439 ret = adxrs450_initial_setup(indio_dev);
0440 if (ret)
0441 return ret;
0442
0443 return 0;
0444 }
0445
0446 static const struct spi_device_id adxrs450_id[] = {
0447 {"adxrs450", ID_ADXRS450},
0448 {"adxrs453", ID_ADXRS453},
0449 {}
0450 };
0451 MODULE_DEVICE_TABLE(spi, adxrs450_id);
0452
0453 static struct spi_driver adxrs450_driver = {
0454 .driver = {
0455 .name = "adxrs450",
0456 },
0457 .probe = adxrs450_probe,
0458 .id_table = adxrs450_id,
0459 };
0460 module_spi_driver(adxrs450_driver);
0461
0462 MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
0463 MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
0464 MODULE_LICENSE("GPL v2");