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0007 #include <linux/bitfield.h>
0008 #include <linux/bits.h>
0009 #include <linux/clk.h>
0010 #include <linux/device.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/iio/iio.h>
0013 #include <linux/limits.h>
0014 #include <linux/kernel.h>
0015 #include <linux/module.h>
0016 #include <linux/mod_devicetable.h>
0017 #include <linux/mutex.h>
0018 #include <linux/of.h>
0019 #include <linux/property.h>
0020 #include <linux/regmap.h>
0021 #include <linux/regulator/consumer.h>
0022 #include <linux/spi/spi.h>
0023
0024 #define LTC2688_DAC_CHANNELS 16
0025
0026 #define LTC2688_CMD_CH_CODE(x) (0x00 + (x))
0027 #define LTC2688_CMD_CH_SETTING(x) (0x10 + (x))
0028 #define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x))
0029 #define LTC2688_CMD_CH_GAIN(x) (0x30 + (x))
0030 #define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x))
0031
0032 #define LTC2688_CMD_CONFIG 0x70
0033 #define LTC2688_CMD_POWERDOWN 0x71
0034 #define LTC2688_CMD_A_B_SELECT 0x72
0035 #define LTC2688_CMD_SW_TOGGLE 0x73
0036 #define LTC2688_CMD_TOGGLE_DITHER_EN 0x74
0037 #define LTC2688_CMD_THERMAL_STAT 0x77
0038 #define LTC2688_CMD_UPDATE_ALL 0x7C
0039 #define LTC2688_CMD_NOOP 0xFF
0040
0041 #define LTC2688_READ_OPERATION 0x80
0042
0043
0044 #define LTC2688_CH_SPAN_MSK GENMASK(2, 0)
0045 #define LTC2688_CH_OVERRANGE_MSK BIT(3)
0046 #define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4)
0047 #define LTC2688_CH_TGP_MAX 3
0048 #define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6)
0049 #define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9)
0050 #define LTC2688_CH_MODE_MSK BIT(11)
0051
0052 #define LTC2688_DITHER_RAW_MASK GENMASK(15, 2)
0053 #define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2)
0054 #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1)
0055 #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1)
0056
0057
0058 #define LTC2688_CONFIG_RST BIT(15)
0059 #define LTC2688_CONFIG_EXT_REF BIT(1)
0060
0061 #define LTC2688_DITHER_FREQ_AVAIL_N 5
0062
0063 enum {
0064 LTC2688_SPAN_RANGE_0V_5V,
0065 LTC2688_SPAN_RANGE_0V_10V,
0066 LTC2688_SPAN_RANGE_M5V_5V,
0067 LTC2688_SPAN_RANGE_M10V_10V,
0068 LTC2688_SPAN_RANGE_M15V_15V,
0069 LTC2688_SPAN_RANGE_MAX
0070 };
0071
0072 enum {
0073 LTC2688_MODE_DEFAULT,
0074 LTC2688_MODE_DITHER_TOGGLE,
0075 };
0076
0077 struct ltc2688_chan {
0078 long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N];
0079 bool overrange;
0080 bool toggle_chan;
0081 u8 mode;
0082 };
0083
0084 struct ltc2688_state {
0085 struct spi_device *spi;
0086 struct regmap *regmap;
0087 struct regulator_bulk_data regulators[2];
0088 struct ltc2688_chan channels[LTC2688_DAC_CHANNELS];
0089 struct iio_chan_spec *iio_chan;
0090
0091 struct mutex lock;
0092 int vref;
0093
0094
0095
0096
0097 u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
0098 u8 rx_data[3];
0099 };
0100
0101 static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size,
0102 void *val, size_t val_size)
0103 {
0104 struct ltc2688_state *st = context;
0105 struct spi_transfer xfers[] = {
0106 {
0107 .tx_buf = st->tx_data,
0108 .bits_per_word = 8,
0109 .len = reg_size + val_size,
0110 .cs_change = 1,
0111 }, {
0112 .tx_buf = st->tx_data + 3,
0113 .rx_buf = st->rx_data,
0114 .bits_per_word = 8,
0115 .len = reg_size + val_size,
0116 },
0117 };
0118 int ret;
0119
0120 memcpy(st->tx_data, reg, reg_size);
0121
0122 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
0123 if (ret)
0124 return ret;
0125
0126 memcpy(val, &st->rx_data[1], val_size);
0127
0128 return 0;
0129 }
0130
0131 static int ltc2688_spi_write(void *context, const void *data, size_t count)
0132 {
0133 struct ltc2688_state *st = context;
0134
0135 return spi_write(st->spi, data, count);
0136 }
0137
0138 static int ltc2688_span_get(const struct ltc2688_state *st, int c)
0139 {
0140 int ret, reg, span;
0141
0142 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), ®);
0143 if (ret)
0144 return ret;
0145
0146 span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg);
0147
0148 if (span >= LTC2688_SPAN_RANGE_MAX)
0149 return -EIO;
0150
0151 return span;
0152 }
0153
0154 static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = {
0155 {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000},
0156 };
0157
0158 static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val)
0159 {
0160 const struct ltc2688_chan *chan = &st->channels[c];
0161 int span, fs;
0162
0163 span = ltc2688_span_get(st, c);
0164 if (span < 0)
0165 return span;
0166
0167 fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0];
0168 if (chan->overrange)
0169 fs = mult_frac(fs, 105, 100);
0170
0171 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096);
0172
0173 return 0;
0174 }
0175
0176 static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val)
0177 {
0178 int span;
0179
0180 span = ltc2688_span_get(st, c);
0181 if (span < 0)
0182 return span;
0183
0184 if (ltc2688_span_helper[span][0] < 0)
0185 *val = -32768;
0186 else
0187 *val = 0;
0188
0189 return 0;
0190 }
0191
0192 enum {
0193 LTC2688_INPUT_A,
0194 LTC2688_INPUT_B,
0195 LTC2688_INPUT_B_AVAIL,
0196 LTC2688_DITHER_OFF,
0197 LTC2688_DITHER_FREQ_AVAIL,
0198 };
0199
0200 static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input,
0201 u16 code)
0202 {
0203 struct ltc2688_chan *c = &st->channels[chan];
0204 int ret, reg;
0205
0206
0207 if (!c->toggle_chan && input == LTC2688_INPUT_B) {
0208 if (code > LTC2688_DITHER_RAW_MAX_VAL)
0209 return -EINVAL;
0210
0211 code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code);
0212 }
0213
0214 mutex_lock(&st->lock);
0215
0216 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
0217 input << chan);
0218 if (ret)
0219 goto out_unlock;
0220
0221
0222
0223
0224
0225 if (c->mode == LTC2688_MODE_DEFAULT)
0226 reg = LTC2688_CMD_CH_CODE_UPDATE(chan);
0227 else
0228 reg = LTC2688_CMD_CH_CODE(chan);
0229
0230 ret = regmap_write(st->regmap, reg, code);
0231 out_unlock:
0232 mutex_unlock(&st->lock);
0233 return ret;
0234 }
0235
0236 static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input,
0237 u32 *code)
0238 {
0239 struct ltc2688_chan *c = &st->channels[chan];
0240 int ret;
0241
0242 mutex_lock(&st->lock);
0243 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
0244 input << chan);
0245 if (ret)
0246 goto out_unlock;
0247
0248 ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code);
0249 out_unlock:
0250 mutex_unlock(&st->lock);
0251
0252 if (!c->toggle_chan && input == LTC2688_INPUT_B)
0253 *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code);
0254
0255 return ret;
0256 }
0257
0258 static const int ltc2688_raw_range[] = {0, 1, U16_MAX};
0259
0260 static int ltc2688_read_avail(struct iio_dev *indio_dev,
0261 struct iio_chan_spec const *chan,
0262 const int **vals, int *type, int *length,
0263 long info)
0264 {
0265 switch (info) {
0266 case IIO_CHAN_INFO_RAW:
0267 *vals = ltc2688_raw_range;
0268 *type = IIO_VAL_INT;
0269 return IIO_AVAIL_RANGE;
0270 default:
0271 return -EINVAL;
0272 }
0273 }
0274
0275 static int ltc2688_read_raw(struct iio_dev *indio_dev,
0276 struct iio_chan_spec const *chan, int *val,
0277 int *val2, long info)
0278 {
0279 struct ltc2688_state *st = iio_priv(indio_dev);
0280 int ret;
0281
0282 switch (info) {
0283 case IIO_CHAN_INFO_RAW:
0284 ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A,
0285 val);
0286 if (ret)
0287 return ret;
0288
0289 return IIO_VAL_INT;
0290 case IIO_CHAN_INFO_OFFSET:
0291 ret = ltc2688_offset_get(st, chan->channel, val);
0292 if (ret)
0293 return ret;
0294
0295 return IIO_VAL_INT;
0296 case IIO_CHAN_INFO_SCALE:
0297 ret = ltc2688_scale_get(st, chan->channel, val);
0298 if (ret)
0299 return ret;
0300
0301 *val2 = 16;
0302 return IIO_VAL_FRACTIONAL_LOG2;
0303 case IIO_CHAN_INFO_CALIBBIAS:
0304 ret = regmap_read(st->regmap,
0305 LTC2688_CMD_CH_OFFSET(chan->channel), val);
0306 if (ret)
0307 return ret;
0308
0309 *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val);
0310 return IIO_VAL_INT;
0311 case IIO_CHAN_INFO_CALIBSCALE:
0312 ret = regmap_read(st->regmap,
0313 LTC2688_CMD_CH_GAIN(chan->channel), val);
0314 if (ret)
0315 return ret;
0316
0317 return IIO_VAL_INT;
0318 default:
0319 return -EINVAL;
0320 }
0321 }
0322
0323 static int ltc2688_write_raw(struct iio_dev *indio_dev,
0324 struct iio_chan_spec const *chan, int val,
0325 int val2, long info)
0326 {
0327 struct ltc2688_state *st = iio_priv(indio_dev);
0328
0329 switch (info) {
0330 case IIO_CHAN_INFO_RAW:
0331 if (val > U16_MAX || val < 0)
0332 return -EINVAL;
0333
0334 return ltc2688_dac_code_write(st, chan->channel,
0335 LTC2688_INPUT_A, val);
0336 case IIO_CHAN_INFO_CALIBBIAS:
0337 if (val > LTC2688_CH_CALIBBIAS_MAX_VAL)
0338 return -EINVAL;
0339
0340 return regmap_write(st->regmap,
0341 LTC2688_CMD_CH_OFFSET(chan->channel),
0342 FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val));
0343 case IIO_CHAN_INFO_CALIBSCALE:
0344 return regmap_write(st->regmap,
0345 LTC2688_CMD_CH_GAIN(chan->channel), val);
0346 default:
0347 return -EINVAL;
0348 }
0349 }
0350
0351 static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev,
0352 uintptr_t private,
0353 const struct iio_chan_spec *chan,
0354 const char *buf, size_t len)
0355 {
0356 struct ltc2688_state *st = iio_priv(indio_dev);
0357 struct ltc2688_chan *c = &st->channels[chan->channel];
0358 int ret;
0359 bool en;
0360
0361 ret = kstrtobool(buf, &en);
0362 if (ret)
0363 return ret;
0364
0365 mutex_lock(&st->lock);
0366 ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN,
0367 BIT(chan->channel), en << chan->channel);
0368 if (ret)
0369 goto out_unlock;
0370
0371 c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT;
0372 out_unlock:
0373 mutex_unlock(&st->lock);
0374
0375 return ret ?: len;
0376 }
0377
0378 static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev,
0379 uintptr_t private,
0380 const struct iio_chan_spec *chan,
0381 char *buf)
0382 {
0383 const struct ltc2688_state *st = iio_priv(indio_dev);
0384 int ret;
0385 u32 val;
0386
0387 ret = regmap_read(st->regmap, private, &val);
0388 if (ret)
0389 return ret;
0390
0391 return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel)));
0392 }
0393
0394 static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev,
0395 uintptr_t private,
0396 const struct iio_chan_spec *chan,
0397 const char *buf, size_t len)
0398 {
0399 const struct ltc2688_state *st = iio_priv(indio_dev);
0400 int ret;
0401 bool en;
0402
0403 ret = kstrtobool(buf, &en);
0404 if (ret)
0405 return ret;
0406
0407 ret = regmap_update_bits(st->regmap, private, BIT(chan->channel),
0408 en << chan->channel);
0409 if (ret)
0410 return ret;
0411
0412 return len;
0413 }
0414
0415 static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st,
0416 const struct ltc2688_chan *chan,
0417 char *buf)
0418 {
0419 int sz = 0;
0420 u32 f;
0421
0422 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
0423 sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]);
0424
0425 buf[sz - 1] = '\n';
0426
0427 return sz;
0428 }
0429
0430 static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev,
0431 uintptr_t private,
0432 const struct iio_chan_spec *chan,
0433 char *buf)
0434 {
0435 const struct ltc2688_state *st = iio_priv(indio_dev);
0436 const struct ltc2688_chan *c = &st->channels[chan->channel];
0437 u32 reg, freq;
0438 int ret;
0439
0440 if (private == LTC2688_DITHER_FREQ_AVAIL)
0441 return ltc2688_dither_freq_avail(st, c, buf);
0442
0443 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
0444 ®);
0445 if (ret)
0446 return ret;
0447
0448 freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg);
0449 if (freq >= ARRAY_SIZE(c->dither_frequency))
0450 return -EIO;
0451
0452 return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]);
0453 }
0454
0455 static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev,
0456 uintptr_t private,
0457 const struct iio_chan_spec *chan,
0458 const char *buf, size_t len)
0459 {
0460 const struct ltc2688_state *st = iio_priv(indio_dev);
0461 const struct ltc2688_chan *c = &st->channels[chan->channel];
0462 long val;
0463 u32 freq;
0464 int ret;
0465
0466 if (private == LTC2688_DITHER_FREQ_AVAIL)
0467 return -EINVAL;
0468
0469 ret = kstrtol(buf, 10, &val);
0470 if (ret)
0471 return ret;
0472
0473 for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) {
0474 if (val == c->dither_frequency[freq])
0475 break;
0476 }
0477
0478 if (freq == ARRAY_SIZE(c->dither_frequency))
0479 return -EINVAL;
0480
0481 ret = regmap_update_bits(st->regmap,
0482 LTC2688_CMD_CH_SETTING(chan->channel),
0483 LTC2688_CH_DIT_PER_MSK,
0484 FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq));
0485 if (ret)
0486 return ret;
0487
0488 return len;
0489 }
0490
0491 static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev,
0492 uintptr_t private,
0493 const struct iio_chan_spec *chan,
0494 char *buf)
0495 {
0496 struct ltc2688_state *st = iio_priv(indio_dev);
0497 int ret;
0498 u32 val;
0499
0500 if (private == LTC2688_INPUT_B_AVAIL)
0501 return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0],
0502 ltc2688_raw_range[1],
0503 ltc2688_raw_range[2] / 4);
0504
0505 if (private == LTC2688_DITHER_OFF)
0506 return sysfs_emit(buf, "0\n");
0507
0508 ret = ltc2688_dac_code_read(st, chan->channel, private, &val);
0509 if (ret)
0510 return ret;
0511
0512 return sysfs_emit(buf, "%u\n", val);
0513 }
0514
0515 static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev,
0516 uintptr_t private,
0517 const struct iio_chan_spec *chan,
0518 const char *buf, size_t len)
0519 {
0520 struct ltc2688_state *st = iio_priv(indio_dev);
0521 int ret;
0522 u16 val;
0523
0524 if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF)
0525 return -EINVAL;
0526
0527 ret = kstrtou16(buf, 10, &val);
0528 if (ret)
0529 return ret;
0530
0531 ret = ltc2688_dac_code_write(st, chan->channel, private, val);
0532 if (ret)
0533 return ret;
0534
0535 return len;
0536 }
0537
0538 static int ltc2688_get_dither_phase(struct iio_dev *dev,
0539 const struct iio_chan_spec *chan)
0540 {
0541 struct ltc2688_state *st = iio_priv(dev);
0542 int ret, regval;
0543
0544 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
0545 ®val);
0546 if (ret)
0547 return ret;
0548
0549 return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval);
0550 }
0551
0552 static int ltc2688_set_dither_phase(struct iio_dev *dev,
0553 const struct iio_chan_spec *chan,
0554 unsigned int phase)
0555 {
0556 struct ltc2688_state *st = iio_priv(dev);
0557
0558 return regmap_update_bits(st->regmap,
0559 LTC2688_CMD_CH_SETTING(chan->channel),
0560 LTC2688_CH_DIT_PH_MSK,
0561 FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase));
0562 }
0563
0564 static int ltc2688_reg_access(struct iio_dev *indio_dev,
0565 unsigned int reg,
0566 unsigned int writeval,
0567 unsigned int *readval)
0568 {
0569 struct ltc2688_state *st = iio_priv(indio_dev);
0570
0571 if (readval)
0572 return regmap_read(st->regmap, reg, readval);
0573
0574 return regmap_write(st->regmap, reg, writeval);
0575 }
0576
0577 static const char * const ltc2688_dither_phase[] = {
0578 "0", "1.5708", "3.14159", "4.71239",
0579 };
0580
0581 static const struct iio_enum ltc2688_dither_phase_enum = {
0582 .items = ltc2688_dither_phase,
0583 .num_items = ARRAY_SIZE(ltc2688_dither_phase),
0584 .set = ltc2688_set_dither_phase,
0585 .get = ltc2688_get_dither_phase,
0586 };
0587
0588 #define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \
0589 .name = _name, \
0590 .read = (_read), \
0591 .write = (_write), \
0592 .private = (_what), \
0593 .shared = (_shared), \
0594 }
0595
0596
0597
0598
0599
0600 static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = {
0601 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
0602 ltc2688_dac_input_read, ltc2688_dac_input_write),
0603 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
0604 ltc2688_dac_input_read, ltc2688_dac_input_write),
0605 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
0606 IIO_SEPARATE, ltc2688_reg_bool_get,
0607 ltc2688_dither_toggle_set),
0608 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
0609 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
0610 LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE,
0611 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
0612 {}
0613 };
0614
0615 static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = {
0616 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
0617 ltc2688_dac_input_read, ltc2688_dac_input_write),
0618 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
0619 ltc2688_dac_input_read, ltc2688_dac_input_write),
0620 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
0621 IIO_SEPARATE, ltc2688_reg_bool_get,
0622 ltc2688_dither_toggle_set),
0623 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
0624 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
0625 {}
0626 };
0627
0628 static struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = {
0629 LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE,
0630 ltc2688_dac_input_read, ltc2688_dac_input_write),
0631 LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL,
0632 IIO_SEPARATE, ltc2688_dac_input_read,
0633 ltc2688_dac_input_write),
0634 LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE,
0635 ltc2688_dac_input_read, ltc2688_dac_input_write),
0636
0637
0638
0639
0640 LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE,
0641 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
0642 LTC2688_CHAN_EXT_INFO("dither_frequency_available",
0643 LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE,
0644 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
0645 IIO_ENUM("dither_phase", IIO_SEPARATE, <c2688_dither_phase_enum),
0646 IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE,
0647 <c2688_dither_phase_enum),
0648 LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN,
0649 IIO_SEPARATE, ltc2688_reg_bool_get,
0650 ltc2688_dither_toggle_set),
0651 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
0652 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
0653 {}
0654 };
0655
0656 static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = {
0657 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
0658 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
0659 {}
0660 };
0661
0662 #define LTC2688_CHANNEL(_chan) { \
0663 .type = IIO_VOLTAGE, \
0664 .indexed = 1, \
0665 .output = 1, \
0666 .channel = (_chan), \
0667 .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
0668 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \
0669 BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \
0670 .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \
0671 .ext_info = ltc2688_ext_info, \
0672 }
0673
0674 static const struct iio_chan_spec ltc2688_channels[] = {
0675 LTC2688_CHANNEL(0),
0676 LTC2688_CHANNEL(1),
0677 LTC2688_CHANNEL(2),
0678 LTC2688_CHANNEL(3),
0679 LTC2688_CHANNEL(4),
0680 LTC2688_CHANNEL(5),
0681 LTC2688_CHANNEL(6),
0682 LTC2688_CHANNEL(7),
0683 LTC2688_CHANNEL(8),
0684 LTC2688_CHANNEL(9),
0685 LTC2688_CHANNEL(10),
0686 LTC2688_CHANNEL(11),
0687 LTC2688_CHANNEL(12),
0688 LTC2688_CHANNEL(13),
0689 LTC2688_CHANNEL(14),
0690 LTC2688_CHANNEL(15),
0691 };
0692
0693 static void ltc2688_clk_disable(void *clk)
0694 {
0695 clk_disable_unprepare(clk);
0696 }
0697
0698 static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = {
0699 4, 8, 16, 32, 64,
0700 };
0701
0702 static int ltc2688_tgp_clk_setup(struct ltc2688_state *st,
0703 struct ltc2688_chan *chan,
0704 struct fwnode_handle *node, int tgp)
0705 {
0706 struct device *dev = &st->spi->dev;
0707 unsigned long rate;
0708 struct clk *clk;
0709 int ret, f;
0710
0711 clk = devm_get_clk_from_child(dev, to_of_node(node), NULL);
0712 if (IS_ERR(clk))
0713 return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n");
0714
0715 ret = clk_prepare_enable(clk);
0716 if (ret)
0717 return dev_err_probe(dev, ret, "failed to enable tgp clk.\n");
0718
0719 ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk);
0720 if (ret)
0721 return ret;
0722
0723 if (chan->toggle_chan)
0724 return 0;
0725
0726
0727 rate = clk_get_rate(clk);
0728 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
0729 chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]);
0730
0731 return 0;
0732 }
0733
0734 static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max)
0735 {
0736 u32 span;
0737
0738 for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) {
0739 if (min == ltc2688_span_helper[span][0] &&
0740 max == ltc2688_span_helper[span][1])
0741 return span;
0742 }
0743
0744 return -EINVAL;
0745 }
0746
0747 static int ltc2688_channel_config(struct ltc2688_state *st)
0748 {
0749 struct device *dev = &st->spi->dev;
0750 struct fwnode_handle *child;
0751 u32 reg, clk_input, val, tmp[2];
0752 int ret, span;
0753
0754 device_for_each_child_node(dev, child) {
0755 struct ltc2688_chan *chan;
0756
0757 ret = fwnode_property_read_u32(child, "reg", ®);
0758 if (ret) {
0759 fwnode_handle_put(child);
0760 return dev_err_probe(dev, ret,
0761 "Failed to get reg property\n");
0762 }
0763
0764 if (reg >= LTC2688_DAC_CHANNELS) {
0765 fwnode_handle_put(child);
0766 return dev_err_probe(dev, -EINVAL,
0767 "reg bigger than: %d\n",
0768 LTC2688_DAC_CHANNELS);
0769 }
0770
0771 val = 0;
0772 chan = &st->channels[reg];
0773 if (fwnode_property_read_bool(child, "adi,toggle-mode")) {
0774 chan->toggle_chan = true;
0775
0776 st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info;
0777
0778
0779
0780
0781 __clear_bit(IIO_CHAN_INFO_RAW,
0782 &st->iio_chan[reg].info_mask_separate);
0783 }
0784
0785 ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt",
0786 tmp, ARRAY_SIZE(tmp));
0787 if (!ret) {
0788 span = ltc2688_span_lookup(st, (int)tmp[0] / 1000,
0789 tmp[1] / 1000);
0790 if (span < 0) {
0791 fwnode_handle_put(child);
0792 return dev_err_probe(dev, -EINVAL,
0793 "output range not valid:[%d %d]\n",
0794 tmp[0], tmp[1]);
0795 }
0796
0797 val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span);
0798 }
0799
0800 ret = fwnode_property_read_u32(child, "adi,toggle-dither-input",
0801 &clk_input);
0802 if (!ret) {
0803 if (clk_input >= LTC2688_CH_TGP_MAX) {
0804 fwnode_handle_put(child);
0805 return dev_err_probe(dev, -EINVAL,
0806 "toggle-dither-input inv value(%d)\n",
0807 clk_input);
0808 }
0809
0810 ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input);
0811 if (ret) {
0812 fwnode_handle_put(child);
0813 return ret;
0814 }
0815
0816
0817
0818
0819
0820 val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1);
0821
0822
0823
0824
0825
0826
0827
0828
0829 if (!chan->toggle_chan) {
0830 val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1);
0831 st->iio_chan[reg].ext_info = ltc2688_dither_ext_info;
0832 } else {
0833
0834 st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info;
0835 }
0836 }
0837
0838 if (fwnode_property_read_bool(child, "adi,overrange")) {
0839 chan->overrange = true;
0840 val |= LTC2688_CH_OVERRANGE_MSK;
0841 }
0842
0843 if (!val)
0844 continue;
0845
0846 ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg),
0847 val);
0848 if (ret) {
0849 fwnode_handle_put(child);
0850 return dev_err_probe(dev, -EINVAL,
0851 "failed to set chan settings\n");
0852 }
0853 }
0854
0855 return 0;
0856 }
0857
0858 static int ltc2688_setup(struct ltc2688_state *st, struct regulator *vref)
0859 {
0860 struct device *dev = &st->spi->dev;
0861 struct gpio_desc *gpio;
0862 int ret;
0863
0864
0865
0866
0867
0868 gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH);
0869 if (IS_ERR(gpio))
0870 return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio");
0871 if (gpio) {
0872 usleep_range(1000, 1200);
0873
0874 gpiod_set_value_cansleep(gpio, 0);
0875 } else {
0876 ret = regmap_update_bits(st->regmap, LTC2688_CMD_CONFIG,
0877 LTC2688_CONFIG_RST,
0878 LTC2688_CONFIG_RST);
0879 if (ret)
0880 return ret;
0881 }
0882
0883 usleep_range(10000, 12000);
0884
0885
0886
0887
0888
0889 st->iio_chan = devm_kmemdup(dev, ltc2688_channels,
0890 sizeof(ltc2688_channels), GFP_KERNEL);
0891 if (!st->iio_chan)
0892 return -ENOMEM;
0893
0894 ret = ltc2688_channel_config(st);
0895 if (ret)
0896 return ret;
0897
0898 if (!vref)
0899 return 0;
0900
0901 return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
0902 LTC2688_CONFIG_EXT_REF);
0903 }
0904
0905 static void ltc2688_disable_regulators(void *data)
0906 {
0907 struct ltc2688_state *st = data;
0908
0909 regulator_bulk_disable(ARRAY_SIZE(st->regulators), st->regulators);
0910 }
0911
0912 static void ltc2688_disable_regulator(void *regulator)
0913 {
0914 regulator_disable(regulator);
0915 }
0916
0917 static bool ltc2688_reg_readable(struct device *dev, unsigned int reg)
0918 {
0919 switch (reg) {
0920 case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15):
0921 return true;
0922 case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT:
0923 return true;
0924 default:
0925 return false;
0926 }
0927 }
0928
0929 static bool ltc2688_reg_writable(struct device *dev, unsigned int reg)
0930 {
0931
0932
0933
0934
0935
0936 if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT)
0937 return true;
0938
0939 return false;
0940 }
0941
0942 static struct regmap_bus ltc2688_regmap_bus = {
0943 .read = ltc2688_spi_read,
0944 .write = ltc2688_spi_write,
0945 .read_flag_mask = LTC2688_READ_OPERATION,
0946 .reg_format_endian_default = REGMAP_ENDIAN_BIG,
0947 .val_format_endian_default = REGMAP_ENDIAN_BIG,
0948 };
0949
0950 static const struct regmap_config ltc2688_regmap_config = {
0951 .reg_bits = 8,
0952 .val_bits = 16,
0953 .readable_reg = ltc2688_reg_readable,
0954 .writeable_reg = ltc2688_reg_writable,
0955
0956 .max_register = LTC2688_CMD_UPDATE_ALL,
0957 };
0958
0959 static const struct iio_info ltc2688_info = {
0960 .write_raw = ltc2688_write_raw,
0961 .read_raw = ltc2688_read_raw,
0962 .read_avail = ltc2688_read_avail,
0963 .debugfs_reg_access = ltc2688_reg_access,
0964 };
0965
0966 static int ltc2688_probe(struct spi_device *spi)
0967 {
0968 struct ltc2688_state *st;
0969 struct iio_dev *indio_dev;
0970 struct regulator *vref_reg;
0971 struct device *dev = &spi->dev;
0972 int ret;
0973
0974 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
0975 if (!indio_dev)
0976 return -ENOMEM;
0977
0978 st = iio_priv(indio_dev);
0979 st->spi = spi;
0980
0981
0982 st->tx_data[3] = LTC2688_CMD_NOOP;
0983 mutex_init(&st->lock);
0984
0985 st->regmap = devm_regmap_init(dev, <c2688_regmap_bus, st,
0986 <c2688_regmap_config);
0987 if (IS_ERR(st->regmap))
0988 return dev_err_probe(dev, PTR_ERR(st->regmap),
0989 "Failed to init regmap");
0990
0991 st->regulators[0].supply = "vcc";
0992 st->regulators[1].supply = "iovcc";
0993 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(st->regulators),
0994 st->regulators);
0995 if (ret)
0996 return dev_err_probe(dev, ret, "Failed to get regulators\n");
0997
0998 ret = regulator_bulk_enable(ARRAY_SIZE(st->regulators), st->regulators);
0999 if (ret)
1000 return dev_err_probe(dev, ret, "Failed to enable regulators\n");
1001
1002 ret = devm_add_action_or_reset(dev, ltc2688_disable_regulators, st);
1003 if (ret)
1004 return ret;
1005
1006 vref_reg = devm_regulator_get_optional(dev, "vref");
1007 if (IS_ERR(vref_reg)) {
1008 if (PTR_ERR(vref_reg) != -ENODEV)
1009 return dev_err_probe(dev, PTR_ERR(vref_reg),
1010 "Failed to get vref regulator");
1011
1012 vref_reg = NULL;
1013
1014 st->vref = 4096;
1015 } else {
1016 ret = regulator_enable(vref_reg);
1017 if (ret)
1018 return dev_err_probe(dev, ret,
1019 "Failed to enable vref regulators\n");
1020
1021 ret = devm_add_action_or_reset(dev, ltc2688_disable_regulator,
1022 vref_reg);
1023 if (ret)
1024 return ret;
1025
1026 ret = regulator_get_voltage(vref_reg);
1027 if (ret < 0)
1028 return dev_err_probe(dev, ret, "Failed to get vref\n");
1029
1030 st->vref = ret / 1000;
1031 }
1032
1033 ret = ltc2688_setup(st, vref_reg);
1034 if (ret)
1035 return ret;
1036
1037 indio_dev->name = "ltc2688";
1038 indio_dev->info = <c2688_info;
1039 indio_dev->modes = INDIO_DIRECT_MODE;
1040 indio_dev->channels = st->iio_chan;
1041 indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels);
1042
1043 return devm_iio_device_register(dev, indio_dev);
1044 }
1045
1046 static const struct of_device_id ltc2688_of_id[] = {
1047 { .compatible = "adi,ltc2688" },
1048 {}
1049 };
1050 MODULE_DEVICE_TABLE(of, ltc2688_of_id);
1051
1052 static const struct spi_device_id ltc2688_id[] = {
1053 { "ltc2688" },
1054 {}
1055 };
1056 MODULE_DEVICE_TABLE(spi, ltc2688_id);
1057
1058 static struct spi_driver ltc2688_driver = {
1059 .driver = {
1060 .name = "ltc2688",
1061 .of_match_table = ltc2688_of_id,
1062 },
1063 .probe = ltc2688_probe,
1064 .id_table = ltc2688_id,
1065 };
1066 module_spi_driver(ltc2688_driver);
1067
1068 MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
1069 MODULE_DESCRIPTION("Analog Devices LTC2688 DAC");
1070 MODULE_LICENSE("GPL");