0001
0002
0003
0004
0005
0006
0007
0008
0009 #include <linux/interrupt.h>
0010 #include <linux/fs.h>
0011 #include <linux/device.h>
0012 #include <linux/kernel.h>
0013 #include <linux/spi/spi.h>
0014 #include <linux/slab.h>
0015 #include <linux/sysfs.h>
0016 #include <linux/regulator/consumer.h>
0017 #include <linux/module.h>
0018 #include <linux/bitops.h>
0019
0020 #include <linux/iio/iio.h>
0021 #include <linux/iio/sysfs.h>
0022 #include <linux/iio/dac/ad5791.h>
0023
0024 #define AD5791_DAC_MASK GENMASK(19, 0)
0025
0026 #define AD5791_CMD_READ BIT(23)
0027 #define AD5791_CMD_WRITE 0
0028 #define AD5791_ADDR(addr) ((addr) << 20)
0029
0030
0031 #define AD5791_ADDR_NOOP 0
0032 #define AD5791_ADDR_DAC0 1
0033 #define AD5791_ADDR_CTRL 2
0034 #define AD5791_ADDR_CLRCODE 3
0035 #define AD5791_ADDR_SW_CTRL 4
0036
0037
0038 #define AD5791_CTRL_RBUF BIT(1)
0039 #define AD5791_CTRL_OPGND BIT(2)
0040 #define AD5791_CTRL_DACTRI BIT(3)
0041 #define AD5791_CTRL_BIN2SC BIT(4)
0042 #define AD5791_CTRL_SDODIS BIT(5)
0043 #define AD5761_CTRL_LINCOMP(x) ((x) << 6)
0044
0045 #define AD5791_LINCOMP_0_10 0
0046 #define AD5791_LINCOMP_10_12 1
0047 #define AD5791_LINCOMP_12_16 2
0048 #define AD5791_LINCOMP_16_19 3
0049 #define AD5791_LINCOMP_19_20 12
0050
0051 #define AD5780_LINCOMP_0_10 0
0052 #define AD5780_LINCOMP_10_20 12
0053
0054
0055 #define AD5791_SWCTRL_LDAC BIT(0)
0056 #define AD5791_SWCTRL_CLR BIT(1)
0057 #define AD5791_SWCTRL_RESET BIT(2)
0058
0059 #define AD5791_DAC_PWRDN_6K 0
0060 #define AD5791_DAC_PWRDN_3STATE 1
0061
0062
0063
0064
0065
0066
0067 struct ad5791_chip_info {
0068 int (*get_lin_comp) (unsigned int span);
0069 };
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081
0082
0083
0084 struct ad5791_state {
0085 struct spi_device *spi;
0086 struct regulator *reg_vdd;
0087 struct regulator *reg_vss;
0088 const struct ad5791_chip_info *chip_info;
0089 unsigned short vref_mv;
0090 unsigned int vref_neg_mv;
0091 unsigned ctrl;
0092 unsigned pwr_down_mode;
0093 bool pwr_down;
0094
0095 union {
0096 __be32 d32;
0097 u8 d8[4];
0098 } data[3] __aligned(IIO_DMA_MINALIGN);
0099 };
0100
0101 enum ad5791_supported_device_ids {
0102 ID_AD5760,
0103 ID_AD5780,
0104 ID_AD5781,
0105 ID_AD5791,
0106 };
0107
0108 static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val)
0109 {
0110 st->data[0].d32 = cpu_to_be32(AD5791_CMD_WRITE |
0111 AD5791_ADDR(addr) |
0112 (val & AD5791_DAC_MASK));
0113
0114 return spi_write(st->spi, &st->data[0].d8[1], 3);
0115 }
0116
0117 static int ad5791_spi_read(struct ad5791_state *st, u8 addr, u32 *val)
0118 {
0119 int ret;
0120 struct spi_transfer xfers[] = {
0121 {
0122 .tx_buf = &st->data[0].d8[1],
0123 .bits_per_word = 8,
0124 .len = 3,
0125 .cs_change = 1,
0126 }, {
0127 .tx_buf = &st->data[1].d8[1],
0128 .rx_buf = &st->data[2].d8[1],
0129 .bits_per_word = 8,
0130 .len = 3,
0131 },
0132 };
0133
0134 st->data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
0135 AD5791_ADDR(addr));
0136 st->data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
0137
0138 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
0139
0140 *val = be32_to_cpu(st->data[2].d32);
0141
0142 return ret;
0143 }
0144
0145 static const char * const ad5791_powerdown_modes[] = {
0146 "6kohm_to_gnd",
0147 "three_state",
0148 };
0149
0150 static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
0151 const struct iio_chan_spec *chan)
0152 {
0153 struct ad5791_state *st = iio_priv(indio_dev);
0154
0155 return st->pwr_down_mode;
0156 }
0157
0158 static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
0159 const struct iio_chan_spec *chan, unsigned int mode)
0160 {
0161 struct ad5791_state *st = iio_priv(indio_dev);
0162
0163 st->pwr_down_mode = mode;
0164
0165 return 0;
0166 }
0167
0168 static const struct iio_enum ad5791_powerdown_mode_enum = {
0169 .items = ad5791_powerdown_modes,
0170 .num_items = ARRAY_SIZE(ad5791_powerdown_modes),
0171 .get = ad5791_get_powerdown_mode,
0172 .set = ad5791_set_powerdown_mode,
0173 };
0174
0175 static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
0176 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
0177 {
0178 struct ad5791_state *st = iio_priv(indio_dev);
0179
0180 return sysfs_emit(buf, "%d\n", st->pwr_down);
0181 }
0182
0183 static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
0184 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
0185 size_t len)
0186 {
0187 bool pwr_down;
0188 int ret;
0189 struct ad5791_state *st = iio_priv(indio_dev);
0190
0191 ret = kstrtobool(buf, &pwr_down);
0192 if (ret)
0193 return ret;
0194
0195 if (!pwr_down) {
0196 st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
0197 } else {
0198 if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
0199 st->ctrl |= AD5791_CTRL_OPGND;
0200 else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
0201 st->ctrl |= AD5791_CTRL_DACTRI;
0202 }
0203 st->pwr_down = pwr_down;
0204
0205 ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl);
0206
0207 return ret ? ret : len;
0208 }
0209
0210 static int ad5791_get_lin_comp(unsigned int span)
0211 {
0212 if (span <= 10000)
0213 return AD5791_LINCOMP_0_10;
0214 else if (span <= 12000)
0215 return AD5791_LINCOMP_10_12;
0216 else if (span <= 16000)
0217 return AD5791_LINCOMP_12_16;
0218 else if (span <= 19000)
0219 return AD5791_LINCOMP_16_19;
0220 else
0221 return AD5791_LINCOMP_19_20;
0222 }
0223
0224 static int ad5780_get_lin_comp(unsigned int span)
0225 {
0226 if (span <= 10000)
0227 return AD5780_LINCOMP_0_10;
0228 else
0229 return AD5780_LINCOMP_10_20;
0230 }
0231 static const struct ad5791_chip_info ad5791_chip_info_tbl[] = {
0232 [ID_AD5760] = {
0233 .get_lin_comp = ad5780_get_lin_comp,
0234 },
0235 [ID_AD5780] = {
0236 .get_lin_comp = ad5780_get_lin_comp,
0237 },
0238 [ID_AD5781] = {
0239 .get_lin_comp = ad5791_get_lin_comp,
0240 },
0241 [ID_AD5791] = {
0242 .get_lin_comp = ad5791_get_lin_comp,
0243 },
0244 };
0245
0246 static int ad5791_read_raw(struct iio_dev *indio_dev,
0247 struct iio_chan_spec const *chan,
0248 int *val,
0249 int *val2,
0250 long m)
0251 {
0252 struct ad5791_state *st = iio_priv(indio_dev);
0253 u64 val64;
0254 int ret;
0255
0256 switch (m) {
0257 case IIO_CHAN_INFO_RAW:
0258 ret = ad5791_spi_read(st, chan->address, val);
0259 if (ret)
0260 return ret;
0261 *val &= AD5791_DAC_MASK;
0262 *val >>= chan->scan_type.shift;
0263 return IIO_VAL_INT;
0264 case IIO_CHAN_INFO_SCALE:
0265 *val = st->vref_mv;
0266 *val2 = (1 << chan->scan_type.realbits) - 1;
0267 return IIO_VAL_FRACTIONAL;
0268 case IIO_CHAN_INFO_OFFSET:
0269 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
0270 do_div(val64, st->vref_mv);
0271 *val = -val64;
0272 return IIO_VAL_INT;
0273 default:
0274 return -EINVAL;
0275 }
0276
0277 };
0278
0279 static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
0280 {
0281 .name = "powerdown",
0282 .shared = IIO_SHARED_BY_TYPE,
0283 .read = ad5791_read_dac_powerdown,
0284 .write = ad5791_write_dac_powerdown,
0285 },
0286 IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
0287 &ad5791_powerdown_mode_enum),
0288 IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5791_powerdown_mode_enum),
0289 { },
0290 };
0291
0292 #define AD5791_CHAN(bits, _shift) { \
0293 .type = IIO_VOLTAGE, \
0294 .output = 1, \
0295 .indexed = 1, \
0296 .address = AD5791_ADDR_DAC0, \
0297 .channel = 0, \
0298 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0299 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
0300 BIT(IIO_CHAN_INFO_OFFSET), \
0301 .scan_type = { \
0302 .sign = 'u', \
0303 .realbits = (bits), \
0304 .storagebits = 24, \
0305 .shift = (_shift), \
0306 }, \
0307 .ext_info = ad5791_ext_info, \
0308 }
0309
0310 static const struct iio_chan_spec ad5791_channels[] = {
0311 [ID_AD5760] = AD5791_CHAN(16, 4),
0312 [ID_AD5780] = AD5791_CHAN(18, 2),
0313 [ID_AD5781] = AD5791_CHAN(18, 2),
0314 [ID_AD5791] = AD5791_CHAN(20, 0)
0315 };
0316
0317 static int ad5791_write_raw(struct iio_dev *indio_dev,
0318 struct iio_chan_spec const *chan,
0319 int val,
0320 int val2,
0321 long mask)
0322 {
0323 struct ad5791_state *st = iio_priv(indio_dev);
0324
0325 switch (mask) {
0326 case IIO_CHAN_INFO_RAW:
0327 val &= GENMASK(chan->scan_type.realbits - 1, 0);
0328 val <<= chan->scan_type.shift;
0329
0330 return ad5791_spi_write(st, chan->address, val);
0331
0332 default:
0333 return -EINVAL;
0334 }
0335 }
0336
0337 static const struct iio_info ad5791_info = {
0338 .read_raw = &ad5791_read_raw,
0339 .write_raw = &ad5791_write_raw,
0340 };
0341
0342 static int ad5791_probe(struct spi_device *spi)
0343 {
0344 struct ad5791_platform_data *pdata = spi->dev.platform_data;
0345 struct iio_dev *indio_dev;
0346 struct ad5791_state *st;
0347 int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
0348
0349 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0350 if (!indio_dev)
0351 return -ENOMEM;
0352 st = iio_priv(indio_dev);
0353 st->reg_vdd = devm_regulator_get(&spi->dev, "vdd");
0354 if (!IS_ERR(st->reg_vdd)) {
0355 ret = regulator_enable(st->reg_vdd);
0356 if (ret)
0357 return ret;
0358
0359 ret = regulator_get_voltage(st->reg_vdd);
0360 if (ret < 0)
0361 goto error_disable_reg_pos;
0362
0363 pos_voltage_uv = ret;
0364 }
0365
0366 st->reg_vss = devm_regulator_get(&spi->dev, "vss");
0367 if (!IS_ERR(st->reg_vss)) {
0368 ret = regulator_enable(st->reg_vss);
0369 if (ret)
0370 goto error_disable_reg_pos;
0371
0372 ret = regulator_get_voltage(st->reg_vss);
0373 if (ret < 0)
0374 goto error_disable_reg_neg;
0375
0376 neg_voltage_uv = ret;
0377 }
0378
0379 st->pwr_down = true;
0380 st->spi = spi;
0381
0382 if (!IS_ERR(st->reg_vss) && !IS_ERR(st->reg_vdd)) {
0383 st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
0384 st->vref_neg_mv = neg_voltage_uv / 1000;
0385 } else if (pdata) {
0386 st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
0387 st->vref_neg_mv = pdata->vref_neg_mv;
0388 } else {
0389 dev_warn(&spi->dev, "reference voltage unspecified\n");
0390 }
0391
0392 ret = ad5791_spi_write(st, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
0393 if (ret)
0394 goto error_disable_reg_neg;
0395
0396 st->chip_info = &ad5791_chip_info_tbl[spi_get_device_id(spi)
0397 ->driver_data];
0398
0399
0400 st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
0401 | ((pdata && pdata->use_rbuf_gain2) ? 0 : AD5791_CTRL_RBUF) |
0402 AD5791_CTRL_BIN2SC;
0403
0404 ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl |
0405 AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
0406 if (ret)
0407 goto error_disable_reg_neg;
0408
0409 spi_set_drvdata(spi, indio_dev);
0410 indio_dev->info = &ad5791_info;
0411 indio_dev->modes = INDIO_DIRECT_MODE;
0412 indio_dev->channels
0413 = &ad5791_channels[spi_get_device_id(spi)->driver_data];
0414 indio_dev->num_channels = 1;
0415 indio_dev->name = spi_get_device_id(st->spi)->name;
0416 ret = iio_device_register(indio_dev);
0417 if (ret)
0418 goto error_disable_reg_neg;
0419
0420 return 0;
0421
0422 error_disable_reg_neg:
0423 if (!IS_ERR(st->reg_vss))
0424 regulator_disable(st->reg_vss);
0425 error_disable_reg_pos:
0426 if (!IS_ERR(st->reg_vdd))
0427 regulator_disable(st->reg_vdd);
0428 return ret;
0429 }
0430
0431 static void ad5791_remove(struct spi_device *spi)
0432 {
0433 struct iio_dev *indio_dev = spi_get_drvdata(spi);
0434 struct ad5791_state *st = iio_priv(indio_dev);
0435
0436 iio_device_unregister(indio_dev);
0437 if (!IS_ERR(st->reg_vdd))
0438 regulator_disable(st->reg_vdd);
0439
0440 if (!IS_ERR(st->reg_vss))
0441 regulator_disable(st->reg_vss);
0442 }
0443
0444 static const struct spi_device_id ad5791_id[] = {
0445 {"ad5760", ID_AD5760},
0446 {"ad5780", ID_AD5780},
0447 {"ad5781", ID_AD5781},
0448 {"ad5790", ID_AD5791},
0449 {"ad5791", ID_AD5791},
0450 {}
0451 };
0452 MODULE_DEVICE_TABLE(spi, ad5791_id);
0453
0454 static struct spi_driver ad5791_driver = {
0455 .driver = {
0456 .name = "ad5791",
0457 },
0458 .probe = ad5791_probe,
0459 .remove = ad5791_remove,
0460 .id_table = ad5791_id,
0461 };
0462 module_spi_driver(ad5791_driver);
0463
0464 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0465 MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
0466 MODULE_LICENSE("GPL v2");